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STM32F405RGT7

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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docs stm32f405rgt7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
viewers stm32f405rgt7: viewers · Ray 11d ago
package.json Publish 0.1.0 · Ray 11d ago
page.json Set visibility: public · Ray 11d ago
README.md Initial commit: component/stm32f405rgt7 · Ray 11d ago
stm32f405rgt7-etched.fit.json stm32f405rgt7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
stm32f405rgt7-etched.glb stm32f405rgt7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
stm32f405rgt7-etched.step stm32f405rgt7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
stm32f405rgt7.glb Publish 0.1.0 · Ray 11d ago
stm32f405rgt7.kicad_mod Publish 0.1.0 · Ray 11d ago
stm32f405rgt7.kicad_sym Publish 0.1.0 · Ray 11d ago
stm32f405rgt7.lbr Publish 0.1.0 · Ray 11d ago
stm32f405rgt7.step Publish 0.1.0 · Ray 11d ago

STM32F405RGT7

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F405RGT7 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup battery power input (1.8-3.6V) for RTC, 32 kHz oscillator and backup registers/backup SRAM when VDD is not present.
2 PC13 bidirectional 5V-tolerant I/O supplied through an internal power switch limited to 3 mA (output speed must not exceed 2 MHz with 30 pF load, not usable as current source); alternate function EVENTOUT; additional functions RTC_OUT, RTC_TAMP1, RTC_TS.
3 PC14/OSC32_IN bidirectional 5V-tolerant I/O supplied through the same limited (3 mA) power switch as PC13; also the 32.768 kHz low-speed external oscillator input (OSC32_IN) and EVENTOUT alternate function.
4 PC15/OSC32_OUT bidirectional 5V-tolerant I/O supplied through the same limited (3 mA) power switch as PC13; also the 32.768 kHz low-speed external oscillator output (OSC32_OUT) and EVENTOUT alternate function.
5 PH0/OSC_IN bidirectional 5V-tolerant I/O; also the 4-26 MHz high-speed external crystal oscillator input (OSC_IN) and EVENTOUT alternate function.
6 PH1/OSC_OUT bidirectional 5V-tolerant I/O; also the 4-26 MHz high-speed external crystal oscillator output (OSC_OUT) and EVENTOUT alternate function.
7 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor; driving it low resets the device.
8 PC0 bidirectional 5V-tolerant fast I/O; alternate functions OTG_HS_ULPI_STP/EVENTOUT; additional function ADC1/2/3 channel 10 analog input (ADC123_IN10).
9 PC1 bidirectional 5V-tolerant fast I/O; alternate functions ETH_MDC/EVENTOUT; additional function ADC1/2/3 channel 11 analog input (ADC123_IN11).
10 PC2 bidirectional 5V-tolerant fast I/O; alternate functions SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/EVENTOUT; additional function ADC123_IN12.
11 PC3 bidirectional 5V-tolerant fast I/O; alternate functions SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT; additional function ADC123_IN13.
12 VSSA power_in Analog ground supply pin for the ADC, DAC and reset blocks.
13 VDDA power_in Analog power supply pin (1.8-3.6V) for the ADC, DAC and reset blocks.
14 PA0/WKUP bidirectional 5V-tolerant I/O and Standby-mode wake-up input (WKUP); alternate functions USART2_CTS/UART4_TX/ETH_MII_CRS/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT; additional function ADC123_IN0/WKUP; if BYPASS_REG is tied high (UFBGA176/WLCSP90 only) this pin acts as an internal active-low reset.
15 PA1 bidirectional 5V-tolerant fast I/O; alternate functions USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIM2_CH2/EVENTOUT; additional function ADC123_IN1.
16 PA2 bidirectional 5V-tolerant fast I/O; alternate functions USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/EVENTOUT; additional function ADC123_IN2.
17 PA3 bidirectional 5V-tolerant fast I/O; alternate functions USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT; additional function ADC123_IN3.
18 VSS power_in Digital ground supply pin.
19 VDD power_in Digital power supply pin, 1.8V to 3.6V.
20 PA4 bidirectional 3.3V-tolerant I/O directly connected to the ADC (TTa); alternate functions SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WS/EVENTOUT; additional function ADC12_IN4/DAC_OUT1.
21 PA5 bidirectional 3.3V-tolerant I/O directly connected to the ADC (TTa); alternate functions SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CH1N/EVENTOUT; additional function ADC12_IN5/DAC_OUT2.
22 PA6 bidirectional 5V-tolerant fast I/O; alternate functions SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKIN/EVENTOUT; additional function ADC12_IN6.
23 PA7 bidirectional 5V-tolerant fast I/O; alternate functions SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/ETH_RMII_CRS_DV/EVENTOUT; additional function ADC12_IN7.
24 PC4 bidirectional 5V-tolerant fast I/O; alternate functions ETH_RMII_RX_D0/ETH_MII_RX_D0/EVENTOUT; additional function ADC12_IN14.
25 PC5 bidirectional 5V-tolerant fast I/O; alternate functions ETH_RMII_RX_D1/ETH_MII_RX_D1/EVENTOUT; additional function ADC12_IN15.
26 PB0 bidirectional 5V-tolerant fast I/O; alternate functions TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/EVENTOUT; additional function ADC12_IN8.
27 PB1 bidirectional 5V-tolerant fast I/O; alternate functions TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/TIM1_CH3N/EVENTOUT; additional function ADC12_IN9.
28 PB2/BOOT1 bidirectional 5V-tolerant I/O also used as BOOT1, sampled together with BOOT0 at reset to select the boot source; alternate function EVENTOUT.
29 PB10 bidirectional 5V-tolerant fast I/O; alternate functions SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3/EVENTOUT.
30 PB11 bidirectional 5V-tolerant fast I/O; alternate functions I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4/EVENTOUT.
31 VCAP_1 power_out Internal voltage regulator output requiring an external decoupling capacitor (see VCAP_1/VCAP_2 operating conditions) to stabilize the core supply.
32 VDD power_in Digital power supply pin, 1.8V to 3.6V.
33 PB12 bidirectional 5V-tolerant fast I/O; alternate functions SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID/EVENTOUT.
34 PB13 bidirectional 5V-tolerant fast I/O; alternate functions SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT; additional function OTG_HS_VBUS.
35 PB14 bidirectional 5V-tolerant fast I/O; alternate functions SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD/EVENTOUT.
36 PB15 bidirectional 5V-tolerant fast I/O; alternate functions SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP/EVENTOUT; additional function RTC_REFIN.
37 PC6 bidirectional 5V-tolerant fast I/O; alternate functions I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1/EVENTOUT.
38 PC7 bidirectional 5V-tolerant fast I/O; alternate functions I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2/EVENTOUT.
39 PC8 bidirectional 5V-tolerant fast I/O; alternate functions TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2/EVENTOUT.
40 PC9 bidirectional 5V-tolerant fast I/O; alternate functions I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4/EVENTOUT.
41 PA8 bidirectional 5V-tolerant fast I/O; alternate functions MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT.
42 PA9 bidirectional 5V-tolerant fast I/O; alternate functions USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0/EVENTOUT; additional function OTG_FS_VBUS.
43 PA10 bidirectional 5V-tolerant fast I/O; alternate functions USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1/EVENTOUT.
44 PA11 bidirectional 5V-tolerant fast I/O; alternate functions USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM/EVENTOUT.
45 PA12 bidirectional 5V-tolerant fast I/O; alternate functions USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP/EVENTOUT.
46 PA13 (JTMS-SWDIO) bidirectional 5V-tolerant fast I/O, default JTAG/SW debug port pin JTMS-SWDIO after reset; alternate function EVENTOUT.
47 VCAP_2 power_out Internal voltage regulator output requiring an external decoupling capacitor (see VCAP_1/VCAP_2 operating conditions) to stabilize the core supply.
48 VDD power_in Digital power supply pin, 1.8V to 3.6V.
49 PA14 (JTCK/SWCLK) bidirectional 5V-tolerant fast I/O, default JTAG/SW debug port pin JTCK-SWCLK after reset; alternate function EVENTOUT.
50 PA15 (JTDI) bidirectional 5V-tolerant fast I/O, default JTAG debug pin JTDI after reset; alternate functions SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS/EVENTOUT.
51 PC10 bidirectional 5V-tolerant fast I/O; alternate functions SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT.
52 PC11 bidirectional 5V-tolerant fast I/O; alternate functions UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD/EVENTOUT.
53 PC12 bidirectional 5V-tolerant fast I/O; alternate functions UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT.
54 PD2 bidirectional 5V-tolerant fast I/O; alternate functions TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/EVENTOUT.
55 PB3 (JTDO/TRACESWO) bidirectional 5V-tolerant fast I/O, default JTAG debug pin JTDO/TRACESWO after reset; alternate functions SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK/EVENTOUT.
56 PB4 (NJTRST) bidirectional 5V-tolerant fast I/O, default JTAG debug pin NJTRST after reset; alternate functions SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD/EVENTOUT.
57 PB5 bidirectional 5V-tolerant fast I/O; alternate functions I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD/EVENTOUT.
58 PB6 bidirectional 5V-tolerant fast I/O; alternate functions I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX/EVENTOUT.
59 PB7 bidirectional 5V-tolerant fast I/O; alternate functions I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2/EVENTOUT.
60 BOOT0 input Dedicated boot-mode select input, sampled together with BOOT1 (PB2) at reset to choose boot from Flash, system memory or embedded SRAM; also used as VPP (programming voltage) function.
61 PB8 bidirectional 5V-tolerant fast I/O; alternate functions TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX/EVENTOUT.
62 PB9 bidirectional 5V-tolerant fast I/O; alternate functions SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX/EVENTOUT.
63 VSS power_in Digital ground supply pin.
64 VDD power_in Digital power supply pin, 1.8V to 3.6V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F405RGT7
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f405rgt7-etched.step / stm32f405rgt7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f405rgt7.step / stm32f405rgt7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (203 pp, sha256 1356a8eec66c7d48, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF