# STM32F401RCT7TR

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F401RCT7TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply input for the RTC (listed as VBAT supply for RTC, 1 µA @25 °C in the features). |
| 2 | PC13 | bidirectional | 5 V tolerant I/O (FT) supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz max with 30 pF and it must not source current such as driving an LED; alternate function EVENTOUT, additional functions RTC_TAMP1, RTC_OUT, RTC_TS. |
| 3 | PC14-OSC32_IN (PC14) | bidirectional | 5 V tolerant I/O (FT, except in oscillator mode) supplied through the power switch with the same 3 mA and 2 MHz/30 pF output limits as PC13; additional function OSC32_IN. |
| 4 | PC15-OSC32_OUT (PC15) | bidirectional | 5 V tolerant I/O (FT, except in oscillator mode) supplied through the power switch with the same 3 mA and 2 MHz/30 pF output limits as PC13; additional function OSC32_OUT. |
| 5 | PH0-OSC_IN | bidirectional | 5 V tolerant I/O (FT, except in oscillator mode); alternate function EVENTOUT, additional function OSC_IN for the 4-26 MHz HSE oscillator input. |
| 6 | PH1-OSC_OUT (PH1) | bidirectional | 5 V tolerant I/O (FT, except in oscillator mode); alternate function EVENTOUT, additional function OSC_OUT for the 4-26 MHz HSE oscillator output. |
| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor (5 V tolerant I/O, FT). |
| 8 | PC0 | bidirectional | 5 V tolerant I/O (FT) with alternate function EVENTOUT and additional function ADC1_IN10 analog input. |
| 9 | PC1 | bidirectional | 5 V tolerant I/O (FT) with alternate function EVENTOUT and additional function ADC1_IN11 analog input. |
| 10 | PC2 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI2_MISO, I2S2ext_SD, EVENTOUT and additional function ADC1_IN12 analog input. |
| 11 | PC3 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI2_MOSI/I2S2_SD, EVENTOUT and additional function ADC1_IN13 analog input. |
| 12 | VSSA/VREF- | power_in | Analog ground and negative reference voltage pin for the ADC (VREF- is referenced in the ADC characteristics). |
| 13 | VDDA/VREF+ | power_in | Analog supply and positive ADC reference voltage pin; VDD/VDDA minimum was changed to 1.7 V in revision 4. |
| 14 | PA0 | bidirectional | 5 V tolerant I/O (FT) with alternate functions USART2_CTS, TIM2_CH1/TIM2_ETR, TIM5_CH1, EVENTOUT and additional functions ADC1_IN0, WKUP. |
| 15 | PA1 | bidirectional | 5 V tolerant I/O (FT) with alternate functions USART2_RTS, TIM2_CH2, TIM5_CH2, EVENTOUT and additional function ADC1_IN1. |
| 16 | PA2 | bidirectional | 5 V tolerant I/O (FT) with alternate functions USART2_TX, TIM2_CH3, TIM5_CH3, TIM9_CH1, EVENTOUT and additional function ADC1_IN2. |
| 17 | PA3 | bidirectional | 5 V tolerant I/O (FT) with alternate functions USART2_RX, TIM2_CH4, TIM5_CH4, TIM9_CH2, EVENTOUT and additional function ADC1_IN3. |
| 18 | VSS | power_in | Ground pin of the device. |
| 19 | VDD | power_in | Application supply pin; the device operates from 1.7 V to 3.6 V for the application supply and I/Os. |
| 20 | PA4 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, EVENTOUT and additional function ADC1_IN4. |
| 21 | PA5 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI1_SCK, TIM2_CH1/TIM2_ETR, EVENTOUT and additional function ADC1_IN5. |
| 22 | PA6 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI1_MISO, TIM1_BKIN, TIM3_CH1, EVENTOUT and additional function ADC1_IN6. |
| 23 | PA7 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, TIM1_CH1N, TIM3_CH2, EVENTOUT and additional function ADC1_IN7. |
| 24 | PC4 | bidirectional | 5 V tolerant I/O (FT) with alternate function EVENTOUT and additional function ADC1_IN14 analog input. |
| 25 | PC5 | bidirectional | 5 V tolerant I/O (FT) with alternate function EVENTOUT and additional function ADC1_IN15 analog input. |
| 26 | PB0 | bidirectional | 5 V tolerant I/O (FT) with alternate functions TIM1_CH2N, TIM3_CH3, EVENTOUT and additional function ADC1_IN8. |
| 27 | PB1 | bidirectional | 5 V tolerant I/O (FT) with alternate functions TIM1_CH3N, TIM3_CH4, EVENTOUT and additional function ADC1_IN9. |
| 28 | PB2 | bidirectional | 5 V tolerant I/O (FT) with alternate function EVENTOUT and additional function BOOT1. |
| 29 | PB10 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI2_SCK/I2S2_CK, I2C2_SCL, TIM2_CH3, EVENTOUT. |
| 30 | VCAP_1 | power_out | Internal voltage regulator decoupling pin that requires an external capacitor (see Section 6.3.2, VCAP_1/VCAP_2 external capacitors). |
| 31 | VSS | power_in | Ground pin of the device. |
| 32 | VDD | power_in | Application supply pin; the device operates from 1.7 V to 3.6 V for the application supply and I/Os. |
| 33 | PB12 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI2_NSS/I2S2_WS, I2C2_SMBA, TIM1_BKIN, EVENTOUT. |
| 34 | PB13 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI2_SCK/I2S2_CK, TIM1_CH1N, EVENTOUT. |
| 35 | PB14 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI2_MISO, I2S2ext_SD, TIM1_CH2N, EVENTOUT. |
| 36 | PB15 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI2_MOSI/I2S2_SD, TIM1_CH3N, EVENTOUT and additional function RTC_REFIN. |
| 37 | PC6 | bidirectional | 5 V tolerant I/O (FT) with alternate functions I2S2_MCK, USART6_TX, TIM3_CH1, SDIO_D6, EVENTOUT. |
| 38 | PC7 | bidirectional | 5 V tolerant I/O (FT) with alternate functions I2S3_MCK, USART6_RX, TIM3_CH2, SDIO_D7, EVENTOUT. |
| 39 | PC8 | bidirectional | 5 V tolerant I/O (FT) with alternate functions USART6_CK, TIM3_CH3, SDIO_D0, EVENTOUT. |
| 40 | PC9 | bidirectional | 5 V tolerant I/O (FT) with alternate functions I2S_CKIN, I2C3_SDA, TIM3_CH4, SDIO_D1, MCO_2, EVENTOUT. |
| 41 | PA8 | bidirectional | 5 V tolerant I/O (FT) with alternate functions I2C3_SCL, USART1_CK, TIM1_CH1, OTG_FS_SOF, MCO_1, EVENTOUT. |
| 42 | PA9 | bidirectional | 5 V tolerant I/O (FT) with alternate functions I2C3_SMBA, USART1_TX, TIM1_CH2, EVENTOUT and additional function OTG_FS_VBUS. |
| 43 | PA10 | bidirectional | 5 V tolerant I/O (FT) with alternate functions USART1_RX, TIM1_CH3, OTG_FS_ID, EVENTOUT. |
| 44 | PA11 | bidirectional | 5 V tolerant I/O (FT) with alternate functions USART1_CTS, USART6_TX, TIM1_CH4, OTG_FS_DM, EVENTOUT. |
| 45 | PA12 | bidirectional | 5 V tolerant I/O (FT) with alternate functions USART1_RTS, USART6_RX, TIM1_ETR, OTG_FS_DP, EVENTOUT. |
| 46 | PA13 (JTMS-SWDIO) | bidirectional | 5 V tolerant I/O (FT) whose function after reset is JTMS-SWDIO (SWD data), with alternate function EVENTOUT. |
| 47 | VSS | power_in | Ground pin of the device. |
| 48 | VDD | power_in | Application supply pin; the device operates from 1.7 V to 3.6 V for the application supply and I/Os. |
| 49 | PA14 (JTCK-SWCLK) | bidirectional | 5 V tolerant I/O (FT) whose function after reset is JTCK-SWCLK (SWD clock), with alternate function EVENTOUT. |
| 50 | PA15 (JTDI) | bidirectional | 5 V tolerant I/O (FT) with alternate functions JTDI, SPI1_NSS, SPI3_NSS/I2S3_WS, TIM2_CH1/TIM2_ETR, EVENTOUT. |
| 51 | PC10 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI3_SCK/I2S3_CK, SDIO_D2, EVENTOUT. |
| 52 | PC11 | bidirectional | 5 V tolerant I/O (FT) with alternate functions I2S3ext_SD, SPI3_MISO, SDIO_D3, EVENTOUT. |
| 53 | PC12 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI3_MOSI/I2S3_SD, SDIO_CK, EVENTOUT. |
| 54 | PD2 | bidirectional | 5 V tolerant I/O (FT) with alternate functions TIM3_ETR, SDIO_CMD, EVENTOUT. |
| 55 | PB3 (JTDO-SWO) | bidirectional | 5 V tolerant I/O (FT) whose function after reset is JTDO-SWO, with alternate functions SPI1_SCK, SPI3_SCK/I2S3_CK, I2C2_SDA, TIM2_CH2, EVENTOUT. |
| 56 | PB4 (NJTRST) | bidirectional | 5 V tolerant I/O (FT) whose function after reset is NJTRST, with alternate functions SPI1_MISO, SPI3_MISO, I2S3ext_SD, I2C3_SDA, TIM3_CH1, EVENTOUT. |
| 57 | PB5 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, SPI3_MOSI/I2S3_SD, I2C1_SMBA, TIM3_CH2, EVENTOUT. |
| 58 | PB6 | bidirectional | 5 V tolerant I/O (FT) with alternate functions I2C1_SCL, USART1_TX, TIM4_CH1, EVENTOUT. |
| 59 | PB7 | bidirectional | 5 V tolerant I/O (FT) with alternate functions I2C1_SDA, USART1_RX, TIM4_CH2, EVENTOUT. |
| 60 | BOOT0 | input | Dedicated BOOT0 boot-mode input pin (also listed as VPP in the pin table). |
| 61 | PB8 | bidirectional | 5 V tolerant I/O (FT) with alternate functions I2C1_SCL, TIM4_CH3, TIM10_CH1, SDIO_D4, EVENTOUT. |
| 62 | PB9 | bidirectional | 5 V tolerant I/O (FT) with alternate functions SPI2_NSS/I2S2_WS, I2C1_SDA, TIM4_CH4, TIM11_CH1, SDIO_D5, EVENTOUT. |
| 63 | VSS | power_in | Ground pin of the device. |
| 64 | VDD | power_in | Application supply pin; the device operates from 1.7 V to 3.6 V for the application supply and I/Os. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `STM32F401RCT7TR`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `stm32f401rct7tr-etched.step` / `stm32f401rct7tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f401rct7tr.step` / `stm32f401rct7tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941900351221760) (139 pp, sha256 `42bb8b899325fa29`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f401rct7tr-datasheet.pdf)