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STM32F401CEU6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32F401CEU6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)

STM32F401CEU6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Battery supply voltage input, 1.7 V to 3.6 V, for RTC and backup power functions.
2 PC13 bidirectional General-purpose I/O port C bit 13, 5V tolerant with 3 mA maximum current output for RTC functions.
3 PC14-OSC32_IN bidirectional General-purpose I/O port C bit 14, 5V tolerant, configurable as 32 kHz oscillator input (OSC32_IN).
4 PC15-OSC32_OUT bidirectional General-purpose I/O port C bit 15, 5V tolerant, configurable as 32 kHz oscillator output (OSC32_OUT).
5 PH0-OSC_IN bidirectional General-purpose I/O port H bit 0, 5V tolerant, configurable as 4-26 MHz crystal oscillator input (OSC_IN).
6 PH1-OSC_OUT bidirectional General-purpose I/O port H bit 1, 5V tolerant, configurable as 4-26 MHz crystal oscillator output (OSC_OUT).
7 NRST bidirectional Reset input pin with embedded weak pull-up resistor (100 kΩ typical), active low logic level.
8 VSSA/VREF- power_in Analog ground and negative reference voltage pin for ADC, voltage range -0.3 V to VDDA.
9 VDDA/VREF+ power_in Analog supply and positive reference voltage pin for ADC, 1.7 V to 3.6 V input range.
10 PA0 bidirectional General-purpose I/O port A bit 0 with 5V tolerance, supports ADC1_IN0, USART2_CTS, and wake-up (WKUP) alternate functions.
11 PA1 bidirectional General-purpose I/O port A bit 1 with 5V tolerance, supports ADC1_IN1 and USART2_RTS alternate functions.
12 PA2 bidirectional General-purpose I/O port A bit 2 with 5V tolerance, supports ADC1_IN2 and USART2_TX alternate functions.
13 PA3 bidirectional General-purpose I/O port A bit 3 with 5V tolerance, supports ADC1_IN3 and USART2_RX alternate functions.
14 PA4 bidirectional General-purpose I/O port A bit 4 with 5V tolerance, supports ADC1_IN4, SPI1_NSS, and USART2_CK alternate functions.
15 PA5 bidirectional General-purpose I/O port A bit 5 with 5V tolerance, supports ADC1_IN5 and SPI1_SCK alternate functions.
16 PA6 bidirectional General-purpose I/O port A bit 6 with 5V tolerance, supports ADC1_IN6, SPI1_MISO, and TIM1_BKIN alternate functions.
17 PA7 bidirectional General-purpose I/O port A bit 7 with 5V tolerance, supports ADC1_IN7, SPI1_MOSI, and TIM1_CH1N alternate functions.
18 PB0 bidirectional General-purpose I/O port B bit 0 with 5V tolerance, supports ADC1_IN8 and TIM1_CH2N alternate functions.
19 PB1 bidirectional General-purpose I/O port B bit 1 with 5V tolerance, supports ADC1_IN9 and TIM1_CH3N alternate functions.
20 PB2 bidirectional General-purpose I/O port B bit 2 with 5V tolerance, supports BOOT1 alternate function for boot mode selection.
21 PB10 bidirectional General-purpose I/O port B bit 10 with 5V tolerance, supports I2C2_SCL, SPI2_SCK/I2S2_CK, and TIM2_CH3 functions.
22 VCAP1 power_in Internal regulator output capacitor supply pin requiring 100 nF external capacitor for core voltage regulation.
23 VSS power_in Ground pin connection to device reference.
24 VDD power_in Digital supply voltage input, 1.7 V to 3.6 V.
25 PB12 bidirectional General-purpose I/O port B bit 12 with 5V tolerance, supports I2C2_SMBA, SPI2_NSS/I2S2_WS, and TIM1_BKIN functions.
26 PB13 bidirectional General-purpose I/O port B bit 13 with 5V tolerance, supports SPI2_SCK/I2S2_CK and TIM1_CH1N alternate functions.
27 PB14 bidirectional General-purpose I/O port B bit 14 with 5V tolerance, supports SPI2_MISO, I2S2ext_SD, and TIM1_CH2N functions.
28 PB15 bidirectional General-purpose I/O port B bit 15 with 5V tolerance, supports SPI2_MOSI/I2S2_SD and RTC_REFIN alternate functions.
29 PA8 bidirectional General-purpose I/O port A bit 8 with 5V tolerance, supports I2C3_SCL, USART1_CK, TIM1_CH1, and MCO_1 alternate functions.
30 PA9 bidirectional General-purpose I/O port A bit 9 with 5V tolerance, supports I2C3_SMBA, USART1_TX, TIM1_CH2, and OTG_FS_VBUS functions.
31 PA10 bidirectional General-purpose I/O port A bit 10 with 5V tolerance, supports USART1_RX, TIM1_CH3, and OTG_FS_ID alternate functions.
32 PA11 bidirectional General-purpose I/O port A bit 11 with 5V tolerance, supports USART1_CTS, TIM1_CH4, and OTG_FS_DM alternate functions.
33 PA12 bidirectional General-purpose I/O port A bit 12 with 5V tolerance, supports USART1_RTS, TIM1_ETR, and OTG_FS_DP alternate functions.
34 PA13 bidirectional General-purpose I/O port A bit 13 configurable as JTMS-SWDIO for serial wire debug (SWD) and JTAG test mode select interface.
35 VSS power_in Ground pin connection to device reference.
36 VDD power_in Digital supply voltage input, 1.7 V to 3.6 V.
37 PA14 bidirectional General-purpose I/O port A bit 14 configurable as JTCK-SWCLK for debug clock and serial wire clock interface.
38 PA15 bidirectional General-purpose I/O port A bit 15 configurable as JTDI for JTAG test data input with SPI and timer alternate functions.
39 PB3 bidirectional General-purpose I/O port B bit 3 configurable as JTDO-SWO for JTAG test data output and serial wire output with SPI and I2C functions.
40 PB4 bidirectional General-purpose I/O port B bit 4 configurable as NJTRST for JTAG reset with SPI, I2C, and timer alternate functions.
41 PB5 bidirectional General-purpose I/O port B bit 5 with 5V tolerance, supports SPI1_MOSI, SPI3_MOSI/I2S3_SD, and I2C1_SMBA functions.
42 PB6 bidirectional General-purpose I/O port B bit 6 with 5V tolerance, supports I2C1_SCL, USART1_TX, and TIM4_CH1 alternate functions.
43 PB7 bidirectional General-purpose I/O port B bit 7 with 5V tolerance, supports I2C1_SDA, USART1_RX, and TIM4_CH2 alternate functions.
44 BOOT0 input Boot select input pin for choosing between main flash memory and system bootloader execution at device reset.
45 PB8 bidirectional General-purpose I/O port B bit 8 with 5V tolerance, supports I2C1_SCL, TIM4_CH3, TIM10_CH1, and SDIO_D4 functions.
46 PB9 bidirectional General-purpose I/O port B bit 9 with 5V tolerance, supports I2C1_SDA, SPI2_NSS/I2S2_WS, TIM4_CH4, and SDIO_D5 functions.
47 VSS power_in Ground pin connection to device reference.
48 VDD power_in Digital supply voltage input, 1.7 V to 3.6 V.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-48(7x7)
Category Embedded Processors & Controllers
Pins 49

CAD (KiCad official)

  • Symbol: STM32F401CEU6
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f401ceu6-etched.step / stm32f401ceu6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f401ceu6.step / stm32f401ceu6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (135 pp, sha256 7daad2163948dcbe, retrieved 2026-10-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF