component
STM32F373VCT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSTM32F373VCT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
STM32F373VCT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 3.3V tolerant I/O for touch sensing input TSC_G7_IO1, trace clock output TRACECLK. |
| 2 | PE3 | bidirectional | 3.3V tolerant I/O for touch sensing input TSC_G7_IO2, trace data output TRACED0. |
| 3 | PE4 | bidirectional | 3.3V tolerant I/O for touch sensing input TSC_G7_IO3, trace data output TRACED1. |
| 4 | PE5 | bidirectional | 3.3V tolerant I/O for touch sensing input TSC_G7_IO4, trace data output TRACED2. |
| 5 | PE6 | bidirectional | 3.3V tolerant I/O for trace data output TRACED3, wakeup input WKUP3, RTC tamper detection. |
| 6 | VBAT | power_in | Backup battery supply for RTC and backup registers when VDD is absent, 1.65 to 3.6 V. |
| 7 | PC13 | bidirectional | Standard 3.3V I/O for RTC functions and wakeup events, maximum output 2 MHz with 30 pF load. |
| 8 | PC14-OSC32_IN | bidirectional | Standard 3.3V I/O for OSC32_IN low-speed oscillator input for RTC clock. |
| 9 | PC15-OSC32_OUT | bidirectional | Standard 3.3V I/O for OSC32_OUT low-speed oscillator output for RTC clock. |
| 10 | PF9 | bidirectional | 5V tolerant I/O for timer TIM14 channel 1 output compare/PWM. |
| 11 | PF10 | bidirectional | 5V tolerant I/O without alternate function. |
| 12 | PF0-OSC_IN | bidirectional | 5V tolerant FM+ I2C open-drain I/O for I2C2 SDA with FM+ 1 MHz capability, also OSC_IN. |
| 13 | PF1-OSC_OUT | bidirectional | 5V tolerant FM+ I2C open-drain I/O for I2C2 SCL with FM+ 1 MHz capability, also OSC_OUT. |
| 14 | NRST | input | Bidirectional reset pin with internal weak pull-up resistor, active low, filtered by 100 ns. |
| 15 | PC0 | bidirectional | 3.3V tolerant ADC input pin for TIM5_CH1_ETR trigger and ADC_IN10 analog input. |
| 16 | PC1 | bidirectional | 3.3V tolerant ADC input pin for TIM5_CH2 trigger and ADC_IN11 analog input. |
| 17 | PC2 | bidirectional | 3.3V tolerant ADC input pin for SPI2 MISO/I2S2 MCK or TIM5_CH3, ADC_IN12 analog input. |
| 18 | PC3 | bidirectional | 3.3V tolerant ADC input pin for SPI2 MOSI/I2S2 SD or TIM5_CH4, ADC_IN13 analog input. |
| 19 | PF2 | bidirectional | 5V tolerant I2C open-drain I/O for I2C2 SMBus alert. |
| 20 | VSSA/VREF- | power_in | Analog ground and negative reference voltage for ADC/DAC, must be at VSS potential. |
| 21 | VDDA | power_in | Analog power supply 2.4 to 3.6 V for ADC, DAC, comparators; must power on ≥ VDD. |
| 22 | VREF+ | power_in | Positive reference voltage for 12-bit ADC, DAC and comparators, 2.4 to 3.6 V. |
| 23 | PA0 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 1 I/O, timer/USART alternate functions, ADC_IN0. |
| 24 | PA1 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 1 I/O, SPI3/USART2/timer alternates, ADC_IN1. |
| 25 | PA2 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 1 I/O, USART2/timer alternates, ADC_IN2. |
| 26 | PA3 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 1 I/O, USART2/timer alternates, ADC_IN3. |
| 27 | PF4 | bidirectional | 5V tolerant I/O without alternate function. |
| 28 | VDD | power_in | |
| 29 | PA4 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 2 I/O, SPI/timer/USART alternates, DAC1_OUT1, ADC_IN4. |
| 30 | PA5 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 2 I/O, SPI/timer alternates, DAC1_OUT2, ADC_IN5. |
| 31 | PA6 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 2 I/O, SPI/timer alternates, DAC2_OUT1, ADC_IN6. |
| 32 | PA7 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 2 I/O, SPI/timer alternates, ADC_IN7. |
| 33 | PC4 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 3 I/O, timer/USART alternates, ADC_IN14. |
| 34 | PC5 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 3 I/O, USART1 alternates, ADC_IN15. |
| 35 | PB0 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 3 I/O, timer/SPI alternates, ADC_IN8, SDADC1 input. |
| 36 | PB1 | bidirectional | 3.3V tolerant ADC input TSC touch sensing group 3 I/O, timer alternates, ADC_IN9, SDADC1 inputs. |
| 37 | PB2 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for sigma-delta ADC analog inputs. |
| 38 | PE7 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for sigma-delta ADC analog inputs. |
| 39 | PE8 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for sigma-delta ADC1/2 analog inputs. |
| 40 | PE9 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for sigma-delta ADC1/2 analog inputs. |
| 41 | PE10 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for SDADC1 analog input. |
| 42 | PE11 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for SDADC1/2 analog inputs. |
| 43 | PE12 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for SDADC1/2 analog inputs. |
| 44 | PE13 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for SDADC1/2 analog inputs. |
| 45 | PE14 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for SDADC2 analog inputs. |
| 46 | PE15 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for USART3_RX or SDADC2 analog input. |
| 47 | PB10 | bidirectional | Standard 3.3V I/O powered by VDDSD12 for SPI2/CEC/TSC alternates, SDADC2 input. |
| 48 | VREFSD- | power_in | Sigma-delta ADC negative reference voltage, must equal or be below VSSA. |
| 49 | VSSSD | power_in | Sigma-delta ADC ground connection for SDADC1/2/3. |
| 50 | VDDSD12 | power_in | Sigma-delta ADC1/2 power supply 2.2 to 3.6 V, independent from VDD. |
| 51 | VDDSD3 | power_in | Sigma-delta ADC3 power supply 2.2 to 3.6 V, independent from VDD. |
| 52 | VREFSD+ | power_in | Sigma-delta ADC positive reference voltage, 1.1 to VDDSD3, with external 1-10 µF capacitor. |
| 53 | PB14 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for SPI2/timer/USART/TSC alternates, SDADC3 input. |
| 54 | PB15 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for SPI2/timer/USART/RTC alternates, SDADC3 inputs. |
| 55 | PD8 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for SPI2/USART3/TSC alternates, SDADC3_AIN6P input. |
| 56 | PD9 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for USART3/TSC alternates, SDADC3 inputs. |
| 57 | PD10 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for USART3 clock, SDADC3_AIN4P input. |
| 58 | PD11 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for USART3 CTS, SDADC3 inputs. |
| 59 | PD12 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for USART3/timer/TSC alternates, SDADC3 input. |
| 60 | PD13 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for timer/TSC alternates, SDADC3 inputs. |
| 61 | PD14 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for timer/TSC alternates, SDADC3_AIN0P input. |
| 62 | PD15 | bidirectional | Standard 3.3V I/O powered by VDDSD3 for timer/TSC alternates, SDADC3_AIN0M input. |
| 63 | PC6 | bidirectional | 5V tolerant I/O for timer/SPI alternates without additional function. |
| 64 | PC7 | bidirectional | 5V tolerant I/O for timer/SPI alternates without additional function. |
| 65 | PC8 | bidirectional | 5V tolerant I/O for SPI1/timer alternates without additional function. |
| 66 | PC9 | bidirectional | 5V tolerant I/O for SPI1/timer alternates without additional function. |
| 67 | PA8 | bidirectional | 5V tolerant I/O for SPI2/I2C/USART/timer alternates, MCO clock output. |
| 68 | PA9 | bidirectional | 5V tolerant FM+ I/O for SPI2/I2C/USART/timer/TSC alternates, 1 MHz I2C capability. |
| 69 | PA10 | bidirectional | 5V tolerant FM+ I/O for SPI2/I2C/USART/timer/TSC alternates, 1 MHz I2C capability. |
| 70 | PA11 | bidirectional | 5V tolerant I/O for SPI/USART/CAN/USB/timer alternates, COMP1_OUT. |
| 71 | PA12 | bidirectional | 5V tolerant I/O for SPI/USART/CAN/USB/timer alternates, COMP2_OUT. |
| 72 | PA13 | bidirectional | 5V tolerant I/O for SPI/USART/timer/TSC/IR/JTAG alternates, SWDIO debug pin. |
| 73 | PF6 | bidirectional | 5V tolerant FM+ I/O for SPI1/I2C/USART/timer alternates, 1 MHz I2C capability. |
| 74 | VSS | power_in | |
| 75 | VDD | power_in | |
| 76 | PA14 | bidirectional | 5V tolerant FM+ I/O for I2C/timer/TSC/JTAG alternates, SWCLK debug pin. |
| 77 | PA15 | bidirectional | 5V tolerant FM+ I/O for SPI/I2C/timer/TSC/JTAG alternates. |
| 78 | PC10 | bidirectional | 5V tolerant I/O for SPI3/USART3/timer alternates without additional function. |
| 79 | PC11 | bidirectional | 5V tolerant I/O for SPI3/USART3/timer alternates without additional function. |
| 80 | PC12 | bidirectional | 5V tolerant I/O for SPI3/USART3/timer alternates without additional function. |
| 81 | PD0 | bidirectional | 5V tolerant I/O for CAN/timer alternates without additional function. |
| 82 | PD1 | bidirectional | 5V tolerant I/O for CAN/timer alternates without additional function. |
| 83 | PD2 | bidirectional | 5V tolerant I/O for timer external trigger alternate function. |
| 84 | PD3 | bidirectional | 5V tolerant I/O for SPI2/USART2 alternates without additional function. |
| 85 | PD4 | bidirectional | 5V tolerant I/O for SPI2/USART2 alternates without additional function. |
| 86 | PD5 | bidirectional | 5V tolerant I/O for USART2 transmit alternate function. |
| 87 | PD6 | bidirectional | 5V tolerant I/O for SPI2/USART2 alternates without additional function. |
| 88 | PD7 | bidirectional | 5V tolerant I/O for SPI2/USART2 alternates without additional function. |
| 89 | PB3 | bidirectional | 5V tolerant I/O for SPI/USART/timer/TSC/JTAG alternates, JTDO-TRACESWO output. |
| 90 | PB4 | bidirectional | 5V tolerant I/O for SPI/timer/TSC/JTAG alternates, NJTRST debug input. |
| 91 | PB5 | bidirectional | 5V tolerant I/O for SPI/I2C/USART/timer/TSC alternates without additional function. |
| 92 | PB6 | bidirectional | 5V tolerant FM+ I/O for I2C/USART/timer/TSC alternates, 1 MHz I2C capability. |
| 93 | PB7 | bidirectional | 5V tolerant FM+ I/O for I2C/USART/timer/TSC alternates, 1 MHz I2C capability. |
| 94 | BOOT0 | input | Boot mode selection pin, selects boot from flash memory, system memory, or SRAM. |
| 95 | PB8 | bidirectional | 5V tolerant FM+ I/O for SPI/I2C/USART/CAN/CEC/timer/TSC alternates, COMP1_OUT. |
| 96 | PB9 | bidirectional | 5V tolerant FM+ I/O for SPI/I2C/USART/CAN/timer alternates, COMP2_OUT. |
| 97 | PE0 | bidirectional | 5V tolerant I/O for USART1/timer alternates without additional function. |
| 98 | PE1 | bidirectional | 5V tolerant I/O for USART1 receive alternate function. |
| 99 | VSS | power_in | |
| 100 | VDD | power_in |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
STM32F373VCT6 - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
stm32f373vct6-etched.step/stm32f373vct6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f373vct6.step/stm32f373vct6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (137 pp, sha256
fd00ebf096b21764, retrieved 2026-09-29, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).