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STM32F373C8T6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F373C8T6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32F373C8T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup domain power supply (1.65 to 3.6 V) for RTC and backup registers when VDD is not present |
| 2 | PC13 | bidirectional | Standard 3.3V tolerant I/O pin supplied through power switch with limited sink current, supporting RTC alarm and calibration outputs |
| 3 | PC14 | bidirectional | Standard 3.3V tolerant I/O pin, alternate function as OSC32_IN for 32 kHz external crystal oscillator input |
| 4 | PC15 | bidirectional | Standard 3.3V tolerant I/O pin, alternate function as OSC32_OUT for 32 kHz external crystal oscillator output |
| 5 | PF0 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode, alternate function as I2C2_SDA or OSC_IN |
| 6 | PF1 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode, alternate function as I2C2_SCL or OSC_OUT |
| 7 | NRST | bidirectional | Device reset input/internal reset output (active low) with embedded weak pull-up resistor (25-55 kΩ) and Schmitt trigger |
| 8 | VSSA/VREF- | power_in | Analog ground and negative reference voltage for ADC, DAC, and comparators (0 V typical) |
| 9 | VDDA/VREF+ | power_in | Analog power supply (2.4 to 3.6 V) and positive reference voltage for ADC, DAC, and comparators |
| 10 | PA0 | bidirectional | 3.3V-tolerant I/O pin directly connected to ADC (ADC_IN0), supporting timer, USART, comparator, and touch sensing alternate functions |
| 11 | PA1 | bidirectional | 3.3V-tolerant I/O pin with ADC input (ADC_IN1), supporting SPI, timer, and RTC reference clock functions |
| 12 | PA2 | bidirectional | 3.3V-tolerant I/O pin with ADC input (ADC_IN2), supporting SPI, USART, timer, and comparator functions |
| 13 | PA3 | bidirectional | 3.3V-tolerant I/O pin with ADC input (ADC_IN3), supporting SPI, USART, timer, and comparator functions |
| 14 | PA4 | bidirectional | 3.3V-tolerant I/O pin with DAC1 output (DAC1_OUT1) and ADC input (ADC_IN4), supporting SPI, timer, and touch sensing functions |
| 15 | PA5 | bidirectional | 3.3V-tolerant I/O pin with DAC1 output (DAC1_OUT2) and ADC input (ADC_IN5), supporting SPI clock and timer functions |
| 16 | PA6 | bidirectional | 3.3V-tolerant I/O pin with DAC2 output (DAC2_OUT1) and ADC input (ADC_IN6), supporting SPI and timer functions |
| 17 | VDD_2 | power_in | Digital power supply pin (2.0 to 3.6 V) for I/O logic and internal core |
| 18 | PB0 | bidirectional | 3.3V-tolerant I/O pin with ADC input (ADC_IN8) and SDADC differential input (SDADC1_AIN6P), supporting SPI and timer functions |
| 19 | PB1 | bidirectional | 3.3V-tolerant I/O pin with ADC input (ADC_IN9) and SDADC inputs, supporting timer functions |
| 20 | PB2 | bidirectional | Standard 3.3V I/O pin powered by VDDSD12 supply with SDADC input connections (SDADC1_AIN4P, SDADC2_AIN6P) |
| 21 | PE8 | bidirectional | Standard 3.3V I/O pin powered by VDDSD12 supply with SDADC input connections (SDADC1_AIN8P, SDADC2_AIN8P) |
| 22 | PE9 | bidirectional | Standard 3.3V I/O pin powered by VDDSD12 supply with SDADC input and output connections |
| 23 | VREFSD- | power_in | SDADC negative reference voltage and ground input (0 V typical), shared with VSSSD |
| 24 | VDDSD | power_in | SDADC1, SDADC2, SDADC3 combined power supply (2.2 to 3.6 V for SDADC operation) |
| 25 | VREFSD+ | power_in | SDADC positive reference voltage (1.1 to VDDSD3), supports internal 1.2 V and 1.8 V buffered references with programmable gain |
| 26 | PB14 | bidirectional | Standard 3.3V I/O pin powered by VDDSD3 supply with SDADC differential input (SDADC3_AIN8P), supporting SPI and timer functions |
| 27 | PB15 | bidirectional | Standard 3.3V I/O pin powered by VDDSD3 supply with SDADC inputs and RTC reference clock, supporting SPI and timer functions |
| 28 | PD8 | bidirectional | Standard 3.3V I/O pin powered by VDDSD3 supply with SDADC input (SDADC3_AIN6P), supporting SPI and USART functions |
| 29 | PA8 | bidirectional | 5V-tolerant I/O pin supporting master clock output (MCO), I2C, USART, timer, and SPI alternate functions |
| 30 | PA9 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting I2C clock (I2C2_SCL), USART transmit, and timer functions |
| 31 | PA10 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting I2C data (I2C2_SDA), USART receive, and timer functions |
| 32 | PA11 | bidirectional | 5V-tolerant I/O pin supporting CAN receiver (CAN_RX), USB D- (USB_DM), SPI, and timer alternate functions |
| 33 | PA12 | bidirectional | 5V-tolerant I/O pin supporting CAN transmitter (CAN_TX), USB D+ (USB_DP), SPI, and timer alternate functions |
| 34 | PA13 | bidirectional | 5V-tolerant I/O pin supporting SWDIO debug interface (JTMS), infrared output (IR_OUT), SPI, USART, and timer functions |
| 35 | PF6 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting I2C clock (I2C2_SCL), SPI, USART, and timer functions |
| 36 | PF7 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting I2C data (I2C2_SDA) and USART clock functions |
| 37 | PA14 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting SWCLK debug interface (JTCK) and I2C data (I2C1_SDA) function |
| 38 | PA15 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting JTDI debug interface, I2C, SPI, and touch sensing functions |
| 39 | PB3 | bidirectional | 5V-tolerant I/O pin supporting SPI clock (SPI1_SCK/I2S1_CK), USART transmit, timer, and debug trace output (TRACESWO) functions |
| 40 | PB4 | bidirectional | 5V-tolerant I/O pin supporting SPI data input (SPI1_MISO), USART receive, timer, and NJTST debug functions |
| 41 | PB5 | bidirectional | 5V-tolerant I/O pin supporting SPI data output (SPI1_MOSI), I2C alternative clock (I2C1_SMBA), USART clock, and timer functions |
| 42 | PB6 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting I2C clock (I2C1_SCL), USART transmit, timer, and touch sensing functions |
| 43 | PB7 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting I2C data (I2C1_SDA), USART receive, timer, and touch sensing functions |
| 44 | BOOT0 | input | Dedicated boot pin selects boot source (system memory, user flash, or SRAM) on device startup; can sustain 0 to 5.5 V with pull-down |
| 45 | PB8 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting I2C clock (I2C1_SCL), CAN receiver (CAN_RX), SPI, timer, and touch sensing functions |
| 46 | PB9 | bidirectional | 5V-tolerant I/O pin in Fast Mode+ capable mode supporting I2C data (I2C1_SDA), CAN transmitter (CAN_TX), infrared output, timer, and touch sensing functions |
| 47 | VSS_1 | power_in | Digital ground return path for I/O logic and internal circuits |
| 48 | VDD_1 | power_in | Digital power supply (2.0 to 3.6 V) for core logic and I/O |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32F373C8T6 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32f373c8t6-etched.step/stm32f373c8t6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f373c8t6.step/stm32f373c8t6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (137 pp, sha256
fd00ebf096b21764, retrieved 2026-09-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).