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STM32F334K8U6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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STM32F334K8U6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)
STM32F334K8U6 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Digital power supply; the device voltage range for VDD and VDDA is stated as 2.0 to 3.6 V. |
| 2 | PF0 / OSC_IN | bidirectional | Five-volt tolerant (FT) I/O that is used as the OSC_IN input of the external 4 to 32 MHz crystal oscillator, with alternate function TIM1_CH3N. |
| 3 | PF1 / OSC_OUT | bidirectional | Five-volt tolerant (FT) I/O that is used as the OSC_OUT output of the external 4 to 32 MHz crystal oscillator. |
| 4 | NRST | bidirectional | Bi-directional active-low device reset input / internal reset output with an embedded weak pull-up resistor. |
| 5 | VDDA/VREF+ | power_in | Analog power supply and positive reference voltage for the analog peripherals, with analog supply ranges stated as 2.0 to 3.6 V for the ADC and 2.4 to 3.6 V for the DAC and OPAMP. |
| 6 | VSSA/VREF- | power_in | Analog ground and negative reference voltage for the analog peripherals. |
| 7 | PA0 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with fast ADC channel ADC1_IN1 and alternate functions including TIM2_CH1/TIM2_ETR, TSC_G1_IO1 and USART2_CTS. |
| 8 | PA1 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with fast ADC channel ADC1_IN2 and alternate functions including TIM2_CH2, TSC_G1_IO2, USART2_RTS_DE and TIM15_CH1N. |
| 9 | PA2 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with fast ADC channel ADC1_IN3, COMP2_INM input and alternate functions including TIM2_CH3, TSC_G1_IO3, USART2_TX and COMP2_OUT. |
| 10 | PA3 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with fast ADC channel ADC1_IN4 and alternate functions including TIM2_CH4, TSC_G1_IO4, USART2_RX and TIM15_CH2. |
| 11 | PA4 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC with reduced touch sensing sensitivity (recommended for use as a sampling capacitor I/O), also providing ADC2_IN1, DAC1_OUT1, and alternate functions including TIM3_CH2, TSC_G2_IO1, SPI1_NSS and USART2_CK. |
| 12 | PA5 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC with reduced touch sensing sensitivity (recommended for use as a sampling capacitor I/O), also providing ADC2_IN2, DAC1_OUT2, OPAMP2_VINM and alternate functions including TIM2_CH1/TIM2_ETR, TSC_G2_IO2 and SPI1_SCK. |
| 13 | PA6 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC with reduced touch sensing sensitivity (recommended for use as a sampling capacitor I/O), also providing ADC2_IN3, DAC2_OUT1, OPAMP2_VOUT and alternate functions including TIM16_CH1, TIM3_CH1, SPI1_MISO and TIM1_BKIN. |
| 14 | PA7 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with ADC2_IN4, COMP2_INP and OPAMP2_VINP functions and alternate functions including TIM17_CH1, TIM3_CH2, TSC_G2_IO4, SPI1_MOSI and TIM1_CH1N. |
| 15 | PB0 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with ADC1_IN11, COMP4_INP and OPAMP2_VINP functions and alternate functions including TIM3_CH3, TSC_G3_IO2 and TIM1_CH2N. |
| 16 | VSS | power_in | Digital ground. |
| 17 | VDD | power_in | Digital power supply; the device voltage range for VDD and VDDA is stated as 2.0 to 3.6 V. |
| 18 | PA8 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including MCO, TIM1_CH1, USART1_CK, HRTIM1_CHA1 and EVENTOUT. |
| 19 | PA9 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TSC_G4_IO1, TIM1_CH2, USART1_TX, TIM15_BKIN, TIM2_CH3 and HRTIM1_CHA2. |
| 20 | PA10 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TIM17_BKIN, TSC_G4_IO2, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4 and HRTIM1_CHB1. |
| 21 | PA11 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TIM1_CH1N, USART1_CTS, CAN_RX, TIM1_CH4, TIM1_BKIN2 and HRTIM1_CHB2. |
| 22 | PA12 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TIM16_CH1, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, CAN_TX, TIM1_ETR and HRTIM1_FLT1. |
| 23 | PA13 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including JTMS/SWDAT, TIM16_CH1N, TSC_G4_IO3, IR_OUT and USART3_CTS. |
| 24 | PA14 | bidirectional | Five-volt tolerant, FM+ capable (FTf) I/O with alternate functions including JTCK/SWCLK, TSC_G4_IO4, I2C1_SDA, TIM1_BKIN and USART2_TX. |
| 25 | PA15 | bidirectional | Five-volt tolerant, FM+ capable (FTf) I/O with alternate functions including JTDI, TIM2_CH1/TIM2_ETR, TSC_SYNC, I2C1_SCL, SPI1_NSS, USART2_RX and HRTIM1_FLT2. |
| 26 | PB3 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including JTDO/TRACESWO, TIM2_CH2, TSC_G5_IO1, SPI1_SCK, USART2_TX and HRTIM1_SCOUT. |
| 27 | PB4 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including NJTRST, TIM16_CH1, TIM3_CH1, TSC_G5_IO2, SPI1_MISO and USART2_RX. |
| 28 | PB5 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, USART2_CK and TIM17_CH1. |
| 29 | PB6 | bidirectional | Five-volt tolerant, FM+ capable (FTf) I/O with alternate functions including TIM16_CH1N, TSC_G5_IO3, I2C1_SCL, USART1_TX and HRTIM1_SCIN. |
| 30 | PB7 | bidirectional | Five-volt tolerant, FM+ capable (FTf) I/O with alternate functions including TIM17_CH1N, TSC_G5_IO4, I2C1_SDA, USART1_RX and TIM3_CH4. |
| 31 | BOOT0 | input | Dedicated BOOT0 pin that selects the boot memory (Flash, system memory or SRAM) according to the boot configuration. |
| 32 | VSS | power_in | Digital ground. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-32(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
STM32F334K8U6 - Footprint:
Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm - 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
- 3D model files:
stm32f334k8u6-etched.step/stm32f334k8u6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f334k8u6.step/stm32f334k8u6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (125 pp, sha256
4727fd8b6c87c9e0, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM32F334K8U6
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)
STM32F334K8U6 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Digital power supply; the device voltage range for VDD and VDDA is stated as 2.0 to 3.6 V. |
| 2 | PF0 / OSC_IN | bidirectional | Five-volt tolerant (FT) I/O that is used as the OSC_IN input of the external 4 to 32 MHz crystal oscillator, with alternate function TIM1_CH3N. |
| 3 | PF1 / OSC_OUT | bidirectional | Five-volt tolerant (FT) I/O that is used as the OSC_OUT output of the external 4 to 32 MHz crystal oscillator. |
| 4 | NRST | bidirectional | Bi-directional active-low device reset input / internal reset output with an embedded weak pull-up resistor. |
| 5 | VDDA/VREF+ | power_in | Analog power supply and positive reference voltage for the analog peripherals, with analog supply ranges stated as 2.0 to 3.6 V for the ADC and 2.4 to 3.6 V for the DAC and OPAMP. |
| 6 | VSSA/VREF- | power_in | Analog ground and negative reference voltage for the analog peripherals. |
| 7 | PA0 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with fast ADC channel ADC1_IN1 and alternate functions including TIM2_CH1/TIM2_ETR, TSC_G1_IO1 and USART2_CTS. |
| 8 | PA1 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with fast ADC channel ADC1_IN2 and alternate functions including TIM2_CH2, TSC_G1_IO2, USART2_RTS_DE and TIM15_CH1N. |
| 9 | PA2 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with fast ADC channel ADC1_IN3, COMP2_INM input and alternate functions including TIM2_CH3, TSC_G1_IO3, USART2_TX and COMP2_OUT. |
| 10 | PA3 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with fast ADC channel ADC1_IN4 and alternate functions including TIM2_CH4, TSC_G1_IO4, USART2_RX and TIM15_CH2. |
| 11 | PA4 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC with reduced touch sensing sensitivity (recommended for use as a sampling capacitor I/O), also providing ADC2_IN1, DAC1_OUT1, and alternate functions including TIM3_CH2, TSC_G2_IO1, SPI1_NSS and USART2_CK. |
| 12 | PA5 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC with reduced touch sensing sensitivity (recommended for use as a sampling capacitor I/O), also providing ADC2_IN2, DAC1_OUT2, OPAMP2_VINM and alternate functions including TIM2_CH1/TIM2_ETR, TSC_G2_IO2 and SPI1_SCK. |
| 13 | PA6 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC with reduced touch sensing sensitivity (recommended for use as a sampling capacitor I/O), also providing ADC2_IN3, DAC2_OUT1, OPAMP2_VOUT and alternate functions including TIM16_CH1, TIM3_CH1, SPI1_MISO and TIM1_BKIN. |
| 14 | PA7 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with ADC2_IN4, COMP2_INP and OPAMP2_VINP functions and alternate functions including TIM17_CH1, TIM3_CH2, TSC_G2_IO4, SPI1_MOSI and TIM1_CH1N. |
| 15 | PB0 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC, with ADC1_IN11, COMP4_INP and OPAMP2_VINP functions and alternate functions including TIM3_CH3, TSC_G3_IO2 and TIM1_CH2N. |
| 16 | VSS | power_in | Digital ground. |
| 17 | VDD | power_in | Digital power supply; the device voltage range for VDD and VDDA is stated as 2.0 to 3.6 V. |
| 18 | PA8 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including MCO, TIM1_CH1, USART1_CK, HRTIM1_CHA1 and EVENTOUT. |
| 19 | PA9 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TSC_G4_IO1, TIM1_CH2, USART1_TX, TIM15_BKIN, TIM2_CH3 and HRTIM1_CHA2. |
| 20 | PA10 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TIM17_BKIN, TSC_G4_IO2, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4 and HRTIM1_CHB1. |
| 21 | PA11 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TIM1_CH1N, USART1_CTS, CAN_RX, TIM1_CH4, TIM1_BKIN2 and HRTIM1_CHB2. |
| 22 | PA12 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TIM16_CH1, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, CAN_TX, TIM1_ETR and HRTIM1_FLT1. |
| 23 | PA13 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including JTMS/SWDAT, TIM16_CH1N, TSC_G4_IO3, IR_OUT and USART3_CTS. |
| 24 | PA14 | bidirectional | Five-volt tolerant, FM+ capable (FTf) I/O with alternate functions including JTCK/SWCLK, TSC_G4_IO4, I2C1_SDA, TIM1_BKIN and USART2_TX. |
| 25 | PA15 | bidirectional | Five-volt tolerant, FM+ capable (FTf) I/O with alternate functions including JTDI, TIM2_CH1/TIM2_ETR, TSC_SYNC, I2C1_SCL, SPI1_NSS, USART2_RX and HRTIM1_FLT2. |
| 26 | PB3 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including JTDO/TRACESWO, TIM2_CH2, TSC_G5_IO1, SPI1_SCK, USART2_TX and HRTIM1_SCOUT. |
| 27 | PB4 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including NJTRST, TIM16_CH1, TIM3_CH1, TSC_G5_IO2, SPI1_MISO and USART2_RX. |
| 28 | PB5 | bidirectional | Five-volt tolerant (FT) I/O with alternate functions including TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, USART2_CK and TIM17_CH1. |
| 29 | PB6 | bidirectional | Five-volt tolerant, FM+ capable (FTf) I/O with alternate functions including TIM16_CH1N, TSC_G5_IO3, I2C1_SCL, USART1_TX and HRTIM1_SCIN. |
| 30 | PB7 | bidirectional | Five-volt tolerant, FM+ capable (FTf) I/O with alternate functions including TIM17_CH1N, TSC_G5_IO4, I2C1_SDA, USART1_RX and TIM3_CH4. |
| 31 | BOOT0 | input | Dedicated BOOT0 pin that selects the boot memory (Flash, system memory or SRAM) according to the boot configuration. |
| 32 | VSS | power_in | Digital ground. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-32(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
## CAD (KiCad official)
- Symbol: `STM32F334K8U6`
- Footprint: `Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm`
- 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
- 3D model files: `stm32f334k8u6-etched.step` / `stm32f334k8u6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f334k8u6.step` / `stm32f334k8u6.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922755752738816) (125 pp, sha256 `4727fd8b6c87c9e0`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm32f334k8u6-datasheet.pdf)