component
STM32F334K6T7
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSTM32F334K6T7
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM32F334K6T7 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Digital power supply; the datasheet gives a VDD range of 2.0 to 3.6 V. |
| 2 | PF0 / OSC_IN | bidirectional | 5 V tolerant (FT) I/O, floating input after reset, also the OSC_IN input of the 4 to 32 MHz crystal oscillator; alternate function TIM1_CH3N. |
| 3 | PF1 / OSC_OUT | bidirectional | 5 V tolerant (FT) I/O, floating input after reset, also the OSC_OUT output of the 4 to 32 MHz crystal oscillator. |
| 4 | NRST | bidirectional | Active-low device reset input and internal reset output, with an embedded weak pull-up resistor (RST structure). |
| 5 | VDDA/VREF+ | power_in | Analog power supply and positive reference voltage; the datasheet gives a separate analog supply range of 2.0 to 3.6 V for the ADC. |
| 6 | PA0 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC (fast channel ADC1_IN1); alternate functions include TIM2_CH1/TIM2_ETR, TSC_G1_IO1 and USART2_CTS, and it also provides RTC_TAMP2/WKUP1. |
| 7 | PA1 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC (fast channel ADC1_IN2) and RTC_REFIN; alternate functions include TIM2_CH2, TSC_G1_IO2, USART2_RTS_DE and TIM15_CH1N. |
| 8 | PA2 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC (fast channel ADC1_IN3) and COMP2_INM; alternate functions include TIM2_CH3, TSC_G1_IO3, USART2_TX, COMP2_OUT and TIM15_CH1. |
| 9 | PA3 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC (fast channel ADC1_IN4); alternate functions include TIM2_CH4, TSC_G1_IO4, USART2_RX and TIM15_CH2. |
| 10 | PA4 | bidirectional | 3.3 V tolerant TTa I/O with ADC2_IN1 and DAC1_OUT1; it has reduced touch-sensing sensitivity and is recommended for use as a sampling capacitor I/O; alternate functions include TIM3_CH2, TSC_G2_IO1, SPI1_NSS and USART2_CK. |
| 11 | PA5 | bidirectional | 3.3 V tolerant TTa I/O with ADC2_IN2, DAC1_OUT2 and OPAMP2_VINM; it has reduced touch-sensing sensitivity and is recommended for use as a sampling capacitor I/O; alternate functions include TIM2_CH1/TIM2_ETR, TSC_G2_IO2 and SPI1_SCK. |
| 12 | PA6 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC with ADC2_IN3, DAC2_OUT1 and OPAMP2_VOUT; it has reduced touch-sensing sensitivity and is recommended for use as a sampling capacitor I/O; alternate functions include TIM16_CH1, TIM3_CH1, TSC_G2_IO3, SPI1_MISO, TIM1_BKIN and OPAMP2_DIG. |
| 13 | PA7 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC (ADC2_IN4) with COMP2_INP and OPAMP2_VINP; alternate functions include TIM17_CH1, TIM3_CH2, TSC_G2_IO4, SPI1_MOSI and TIM1_CH1N. |
| 14 | PB0 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC (ADC1_IN11) with COMP4_INP and OPAMP2_VINP; alternate functions include TIM3_CH3, TSC_G3_IO2 and TIM1_CH2N. |
| 15 | PB1 | bidirectional | 3.3 V tolerant TTa I/O directly connected to the ADC (ADC1_IN12); alternate functions include TIM3_CH4, TSC_G3_IO3, TIM1_CH3N, COMP4_OUT and HRTIM1_SCOUT. |
| 16 | VSS | power_in | Digital ground. |
| 17 | VDD | power_in | Digital power supply; the datasheet gives a VDD range of 2.0 to 3.6 V. |
| 18 | PA8 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include MCO, TIM1_CH1, USART1_CK and HRTIM1_CHA1. |
| 19 | PA9 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TSC_G4_IO1, TIM1_CH2, USART1_TX, TIM15_BKIN, TIM2_CH3 and HRTIM1_CHA2. |
| 20 | PA10 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM17_BKIN, TSC_G4_IO2, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4 and HRTIM1_CHB1. |
| 21 | PA11 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM1_CH1N, USART1_CTS, CAN_RX, TIM1_CH4, TIM1_BKIN2 and HRTIM1_CHB2. |
| 22 | PA12 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM16_CH1, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, CAN_TX, TIM1_ETR and HRTIM1_FLT1. |
| 23 | PA13 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include JTMS/SWDAT (SWD data), TIM16_CH1N, TSC_G4_IO3, IR_OUT and USART3_CTS. |
| 24 | PA14 | bidirectional | 5 V tolerant, FM+ capable (FTf) I/O; alternate functions include JTCK/SWCLK (SWD clock), TSC_G4_IO4, I2C1_SDA, TIM1_BKIN and USART2_TX. |
| 25 | PA15 | bidirectional | 5 V tolerant, FM+ capable (FTf) I/O; alternate functions include JTDI, TIM2_CH1/TIM2_ETR, TSC_SYNC, I2C1_SCL, SPI1_NSS, USART2_RX, TIM1_BKIN and HRTIM1_FLT2. |
| 26 | PB3 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include JTDO/TRACE SWO, TIM2_CH2, TSC_G5_IO1, SPI1_SCK, USART2_TX, TIM3_ETR and HRTIM1_EEV9. |
| 27 | PB4 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include NJTRST, TIM16_CH1, TIM3_CH1, TSC_G5_IO2, SPI1_MISO, USART2_RX, TIM17_BKIN and HRTIM1_EEV7. |
| 28 | PB5 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, USART2_CK, TIM17_CH1 and HRTIM1_EEV6. |
| 29 | PB6 | bidirectional | 5 V tolerant, FM+ capable (FTf) I/O; alternate functions include TIM16_CH1N, TSC_G5_IO3, I2C1_SCL, USART1_TX, HRTIM1_SCIN and HRTIM1_EEV4. |
| 30 | PB7 | bidirectional | 5 V tolerant, FM+ capable (FTf) I/O; alternate functions include TIM17_CH1N, TSC_G5_IO4, I2C1_SDA, USART1_RX, TIM3_CH4 and HRTIM1_EEV3. |
| 31 | BOOT0 | input | Dedicated BOOT0 pin (structure B) used for boot mode selection. |
| 32 | VSS | power_in | Digital ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
STM32F334K6T7 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32f334k6t7-etched.step/stm32f334k6t7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f334k6t7.step/stm32f334k6t7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (125 pp, sha256
4727fd8b6c87c9e0, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).