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3D Model

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Datasheet

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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32F303RBT6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F303RBT6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup power supply for the RTC and backup registers.
2	PC13	bidirectional	Standard 3.3 V I/O supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz max at 30 pF and it must not source current such as driving an LED.
3	PC14/OSC32_IN	bidirectional	Standard 3.3 V I/O supplied through the power switch (3 mA limit, 2 MHz max at 30 pF, no current sourcing), also used as OSC32_IN for the 32.768 kHz oscillator.
4	PC15/OSC32_OUT	bidirectional	Standard 3.3 V I/O supplied through the power switch (3 mA limit, 2 MHz max at 30 pF, no current sourcing), also used as OSC32_OUT for the 32.768 kHz oscillator.
5	PF0/OSC_IN	bidirectional	5 V tolerant FM+ capable I/O (FTf), also used as OSC_IN for the external crystal oscillator input.
6	PF1/OSC_OUT	bidirectional	5 V tolerant FM+ capable I/O (FTf), also used as OSC_OUT for the external crystal oscillator output.
7	NRST	bidirectional	Bidirectional device reset pin, active low, with embedded weak pull-up; acts as reset input and internal reset output.
8	PC0	bidirectional	3.3 V tolerant I/O directly connected to the ADC (ADC12_IN6), with COMP7_INM and EVENTOUT functions.
9	PC1	bidirectional	3.3 V tolerant I/O directly connected to the ADC (ADC12_IN7), with COMP7_INP and EVENTOUT functions.
10	PC2	bidirectional	3.3 V tolerant I/O directly connected to the ADC (ADC12_IN8), with COMP7_OUT and EVENTOUT functions.
11	PC3	bidirectional	3.3 V tolerant I/O directly connected to the ADC (ADC12_IN9), with TIM1_BKIN2 and EVENTOUT functions.
12	VSSA/VREF-	power_in	Analog ground and negative reference voltage.
13	VDDA/VREF+	power_in	Analog power supply (2.0 to 3.6 V) and positive reference voltage; on the 64-pin package VREF+ is internally connected to VDDA.
14	PA0	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC1_IN1, with USART2_CTS, TIM2_CH1_ETR, TSC_G1_IO1 and WKUP1 functions.
15	PA1	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC1_IN2, with USART2_RTS_DE, TIM2_CH2, TSC_G1_IO2 and RTC_REFIN functions.
16	PA2	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC1_IN3, with USART2_TX, TIM2_CH3, TSC_G1_IO3 and COMP2_OUT functions; reduced touch sensing sensitivity, recommended as sampling capacitor I/O.
17	PA3	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC1_IN4, with USART2_RX, TIM2_CH4, TSC_G1_IO4 and OPAMP1_VINM functions.
18	PF4	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC1_IN5, with COMP1_OUT and EVENTOUT functions.
19	VDD	power_in	Digital power supply (2.0 to 3.6 V).
20	PA4	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC2_IN1, with DAC1_OUT1, SPI1_NSS and USART2_CK functions; reduced touch sensing sensitivity, recommended as sampling capacitor I/O.
21	PA5	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC2_IN2, with DAC1_OUT2, SPI1_SCK and TSC_G2_IO2 functions; reduced touch sensing sensitivity, recommended as sampling capacitor I/O.
22	PA6	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC2_IN3, with SPI1_MISO, TIM16_CH1 and TIM3_CH1 functions; reduced touch sensing sensitivity, recommended as sampling capacitor I/O.
23	PA7	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC2_IN4, with SPI1_MOSI, TIM17_CH1 and TIM3_CH2 functions.
24	PC4	bidirectional	3.3 V tolerant I/O directly connected to ADC (ADC2_IN5), with USART1_TX and EVENTOUT functions.
25	PC5	bidirectional	3.3 V tolerant I/O directly connected to ADC (ADC2_IN11), with USART1_RX and TSC_G3_IO1 functions.
26	PB0	bidirectional	3.3 V tolerant I/O directly connected to ADC (ADC3_IN12), with TIM3_CH3, TIM1_CH2N and TSC_G3_IO2 functions.
27	PB1	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC3_IN1, with TIM3_CH4, TIM1_CH3N and COMP4_OUT functions; reduced touch sensing sensitivity, recommended as sampling capacitor I/O.
28	PB2	bidirectional	3.3 V tolerant I/O directly connected to ADC (ADC2_IN12), with TSC_G3_IO4 and COMP4_INM functions.
29	PB10	bidirectional	3.3 V tolerant I/O directly connected to ADC, with USART3_TX, TIM2_CH3 and TSC_SYNC functions.
30	PB11	bidirectional	3.3 V tolerant I/O directly connected to ADC, with USART3_RX, TIM2_CH4 and TSC_G6_IO1 functions.
31	VSS	power_in	Digital ground.
32	VDD	power_in	Digital power supply (2.0 to 3.6 V).
33	PB12	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC4_IN3, with SPI2_NSS, I2S2_WS, I2C2_SMBA and USART3_CK; reduced touch sensing sensitivity, recommended as sampling capacitor I/O.
34	PB13	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC3_IN5, with SPI2_SCK, I2S2_CK, USART3_CTS and TIM1_CH1N functions.
35	PB14	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC4_IN4, with SPI2_MISO, I2S2ext_SD, USART3_RTS_DE and TIM1_CH2N functions.
36	PB15	bidirectional	3.3 V tolerant I/O directly connected to ADC, fast ADC channel ADC4_IN5, with SPI2_MOSI, I2S2_SD, RTC_REFIN and TIM15_CH2 functions.
37	PC6	bidirectional	5 V tolerant I/O (FT) with I2S2_MCK, COMP6_OUT, TIM8_CH1 and TIM3_CH1 functions.
38	PC7	bidirectional	5 V tolerant I/O (FT) with I2S3_MCK, TIM8_CH2, TIM3_CH2 and COMP5_OUT functions.
39	PC8	bidirectional	5 V tolerant I/O (FT) with TIM8_CH3, TIM3_CH3 and COMP3_OUT functions.
40	PC9	bidirectional	5 V tolerant I/O (FT) with TIM8_CH4, TIM8_BKIN2, TIM3_CH4 and I2S_CKIN functions.
41	PA8	bidirectional	5 V tolerant I/O (FT) with MCO, I2C2_SMBA, USART1_CK, TIM1_CH1 and COMP3_OUT functions.
42	PA9	bidirectional	5 V tolerant FM+ capable I/O (FTf) with I2C2_SCL, USART1_TX, TIM1_CH2, TIM2_CH3 and COMP5_OUT functions.
43	PA10	bidirectional	5 V tolerant FM+ capable I/O (FTf) with I2C2_SDA, USART1_RX, TIM1_CH3, TIM2_CH4 and COMP6_OUT functions.
44	PA11	bidirectional	5 V tolerant I/O (FT) with USART1_CTS, USB_DM, CAN_RX, TIM1_CH1N and COMP1_OUT functions.
45	PA12	bidirectional	5 V tolerant I/O (FT) with USART1_RTS_DE, USB_DP, CAN_TX, TIM1_CH2N and COMP2_OUT functions.
46	PA13	bidirectional	5 V tolerant I/O (FT) with SWDIO-JTMS, IR_OUT, USART3_CTS, TIM4_CH3 and TIM16_CH1N functions.
47	VSS	power_in	Ground.
48	VDD	power_in	Digital power supply (2.0 to 3.6 V).
49	PA14	bidirectional	5 V tolerant FM+ capable I/O (FTf) with SWCLK-JTCK, I2C1_SDA, USART2_TX, TIM8_CH2 and TIM1_BKIN functions.
50	PA15	bidirectional	5 V tolerant FM+ capable I/O (FTf) with JTDI, I2C1_SCL, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_RX and TIM2_CH1_ETR functions.
51	PC10	bidirectional	5 V tolerant I/O (FT) with SPI3_SCK, I2S3_CK, USART3_TX, UART4_TX and TIM8_CH1N functions.
52	PC11	bidirectional	5 V tolerant I/O (FT) with SPI3_MISO, I2S3ext_SD, USART3_RX, UART4_RX and TIM8_CH2N functions.
53	PC12	bidirectional	5 V tolerant I/O (FT) with SPI3_MOSI, I2S3_SD, USART3_CK, UART5_TX and TIM8_CH3N functions.
54	PD2	bidirectional	5 V tolerant I/O (FT) with UART5_RX, TIM3_ETR and TIM8_BKIN functions.
55	PB3	bidirectional	5 V tolerant I/O (FT) with JTDO-TRACESWO, SPI3_SCK, I2S3_CK, SPI1_SCK, USART2_TX and TIM2_CH2 functions.
56	PB4	bidirectional	5 V tolerant I/O (FT) with NJTRST, SPI3_MISO, I2S3ext_SD, SPI1_MISO, USART2_RX and TIM3_CH1 functions.
57	PB5	bidirectional	5 V tolerant I/O (FT) with SPI3_MOSI, SPI1_MOSI, I2S3_SD, I2C1_SMBA, USART2_CK and TIM3_CH2 functions.
58	PB6	bidirectional	5 V tolerant FM+ capable I/O (FTf) with I2C1_SCL, USART1_TX, TIM16_CH1N, TIM4_CH1 and TIM8_CH1 functions.
59	PB7	bidirectional	5 V tolerant FM+ capable I/O (FTf) with I2C1_SDA, USART1_RX, TIM3_CH4, TIM4_CH2 and TIM17_CH1N functions.
60	BOOT0	input	Dedicated BOOT0 pin used for boot memory selection.
61	PB8	bidirectional	5 V tolerant FM+ capable I/O (FTf) with I2C1_SCL, CAN_RX, TIM16_CH1, TIM4_CH3 and COMP1_OUT functions.
62	PB9	bidirectional	5 V tolerant FM+ capable I/O (FTf) with I2C1_SDA, CAN_TX, TIM17_CH1, TIM4_CH4 and IR_OUT functions.
63	VSS	power_in	Ground.
64	VDD	power_in	Digital power supply (2.0 to 3.6 V).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: STM32F303RBT6TR
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: stm32f303rbt6tr-etched.step / stm32f303rbt6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f303rbt6tr.step / stm32f303rbt6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (149 pp, sha256 46c415ce4e7e8ebd, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF