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Ray Initial commit: component/stm32f302rdt7 5dd7691 1d ago

STM32F302RDT7

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F302RDT7 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply input for the RTC and backup registers (VBAT supply).
2 PC13 bidirectional Standard 3.3 V I/O supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with a 30 pF maximum load and it must not source current such as an LED; alternate functions EVENTOUT and TIM1_CH1N, additional WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT.
3 PC14 / OSC32_IN bidirectional Standard 3.3 V I/O supplied through the power switch with the same 3 mA, 2 MHz / 30 pF output limits as PC13; also the 32 kHz oscillator input OSC32_IN.
4 PC15 / OSC32_OUT bidirectional Standard 3.3 V I/O supplied through the power switch with the same 3 mA, 2 MHz / 30 pF output limits as PC13; also the 32 kHz oscillator output OSC32_OUT.
5 PF0-OSC_IN input 5 V tolerant FTf input (I2C FM+ option) used as the 4 to 32 MHz crystal oscillator input OSC_IN; alternate functions include I2C2_SDA, SPI2_NSS/I2S2_WS, TIM1_CH3N.
6 PF1-OSC_OUT output 5 V tolerant FTf output (I2C FM+ option) used as the crystal oscillator output OSC_OUT; alternate functions include I2C2_SCL and SPI2_SCK/I2S2_CK.
7 NRST bidirectional Bidirectional active-low device reset input and internal reset output with an embedded weak pull-up resistor.
8 PC0 bidirectional TTa 3.3 V tolerant I/O; alternate functions EVENTOUT and TIM1_CH1; additional function ADC12_IN6.
9 PC1 bidirectional TTa 3.3 V tolerant I/O; alternate functions EVENTOUT and TIM1_CH2; additional function ADC12_IN7.
10 PC2 bidirectional TTa 3.3 V tolerant I/O; alternate functions EVENTOUT and TIM1_CH3; additional function ADC12_IN8.
11 PC3 bidirectional TTa 3.3 V tolerant I/O; alternate functions EVENTOUT, TIM1_CH4 and TIM1_BKIN2; additional function ADC12_IN9.
12 VSSA power_in Analog ground for the ADC and analog peripherals.
13 VDDA power_in Analog supply: 2.0 V to 3.6 V for the ADC and comparators (DAC analog supply is 2.4 V to 3.6 V).
14 PA0 bidirectional TTa 3.3 V tolerant I/O; alternate functions TIM2_CH1/TIM2_ETR, TSC_G1_IO1, USART2_CTS, COMP1_OUT, EVENTOUT; additional ADC1_IN1, COMP1_INM, RTC_TAMP2, WKUP1.
15 PA1 bidirectional TTa 3.3 V tolerant I/O; alternate functions RTC_REFIN, TIM2_CH2, TSC_G1_IO2, USART2_RTS, TIM15_CH1N, EVENTOUT; additional ADC1_IN2, COMP1_INP, OPAMP1_VINP.
16 PA2 bidirectional TTa 3.3 V tolerant I/O with reduced touch sensing sensitivity (recommended as sampling capacitor I/O); alternate functions TIM2_CH3, TSC_G1_IO3, USART2_TX, COMP2_OUT, TIM15_CH1; additional ADC1_IN3, COMP2_INM, OPAMP1_VOUT.
17 PA3 bidirectional TTa 3.3 V tolerant I/O; alternate functions TIM2_CH4, TSC_G1_IO4, USART2_RX, TIM15_CH2; additional ADC1_IN4, OPAMP1_VINM/OPAMP1_VINP.
18 VSS power_in Digital ground.
19 VDD power_in Digital supply voltage, 2.0 V to 3.6 V.
20 PA4 bidirectional TTa 3.3 V tolerant I/O with reduced touch sensing sensitivity; alternate functions TIM3_CH2, TSC_G2_IO1, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, EVENTOUT; additional ADC2_IN1, DAC1_OUT1, COMP inputs.
21 PA5 bidirectional TTa 3.3 V tolerant I/O with reduced touch sensing sensitivity; alternate functions TIM2_CH1/TIM2_ETR, TSC_G2_IO2, SPI1_SCK, EVENTOUT; additional ADC2_IN2, COMP inputs, OPAMP1_VINP, OPAMP2_VINM.
22 PA6 bidirectional TTa 3.3 V tolerant I/O with reduced touch sensing sensitivity; alternate functions TIM16_CH1, TIM3_CH1, TSC_G2_IO3, SPI1_MISO, TIM1_BKIN, COMP1_OUT, EVENTOUT; additional ADC2_IN3, OPAMP2_VOUT.
23 PA7 bidirectional TTa 3.3 V tolerant I/O; alternate functions TIM17_CH1, TIM3_CH2, TSC_G2_IO4, SPI1_MOSI, TIM1_CH1N, EVENTOUT; additional ADC2_IN4, COMP2_INP, OPAMP1_VINP, OPAMP2_VINP.
24 PC4 bidirectional TTa 3.3 V tolerant I/O; alternate functions EVENTOUT, TIM1_ETR, USART1_TX; additional function ADC2_IN5.
25 PC5 bidirectional TTa 3.3 V tolerant I/O; alternate functions EVENTOUT, TIM15_BKIN, TSC_G3_IO1, USART1_RX; additional ADC2_IN11, OPAMP1_VINM, OPAMP2_VINM.
26 PB0 bidirectional TTa 3.3 V tolerant I/O; alternate functions TIM3_CH3, TSC_G3_IO2, TIM1_CH2N, EVENTOUT; additional COMP4_INP, OPAMP2_VINP.
27 PB1 bidirectional TTa 3.3 V tolerant I/O with reduced touch sensing sensitivity; alternate functions TIM3_CH4, TSC_G3_IO3, TIM1_CH3N, COMP4_OUT, EVENTOUT.
28 PB2 bidirectional TTa 3.3 V tolerant I/O; alternate function TSC_G3_IO4 and EVENTOUT; additional ADC2_IN12, COMP4_INM.
29 PB10 bidirectional TTa 3.3 V tolerant I/O; alternate functions TIM2_CH3, TSC_SYNC, USART3_TX, EVENTOUT.
30 PB11 bidirectional TTa 3.3 V tolerant I/O; alternate functions TIM2_CH4, TSC_G6_IO1, USART3_RX, EVENTOUT; additional ADC12_IN14, COMP6_INP.
31 VSS power_in Digital ground.
32 VDD power_in Digital supply voltage, 2.0 V to 3.6 V.
33 PB12 bidirectional TTa 3.3 V tolerant I/O with reduced touch sensing sensitivity; alternate functions TSC_G6_IO2, I2C2_SMBAL, SPI2_NSS/I2S2_WS, TIM1_BKIN, USART3_CK, EVENTOUT.
34 PB13 bidirectional TTa 3.3 V tolerant I/O; alternate functions TSC_G6_IO3, SPI2_SCK/I2S2_CK, TIM1_CH1N, USART3_CTS, EVENTOUT.
35 PB14 bidirectional TTa 3.3 V tolerant I/O; alternate functions TIM15_CH1, TSC_G6_IO4, SPI2_MISO/I2S2ext_SD, TIM1_CH2N, USART3_RTS, EVENTOUT; additional OPAMP2_VINP.
36 PB15 bidirectional TTa 3.3 V tolerant I/O; alternate functions RTC_REFIN, TIM15_CH2, TIM15_CH1N, TIM1_CH3N, SPI2_MOSI/I2S2_SD, EVENTOUT; additional COMP6_INM.
37 PC6 bidirectional 5 V tolerant (FT) I/O; alternate functions TIM3_CH1, I2S2_MCK, COMP6_OUT, EVENTOUT.
38 PC7 bidirectional 5 V tolerant (FT) I/O; alternate functions TIM3_CH2, I2S3_MCK, EVENTOUT.
39 PC8 bidirectional 5 V tolerant (FT) I/O; alternate functions TIM3_CH3 and EVENTOUT.
40 PC9 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions TIM3_CH4, I2C3_SDA, I2SCKIN, EVENTOUT.
41 PA8 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions MCO, I2C3_SCL, I2C2_SMBAL, I2S2_MCK, TIM1_CH1, USART1_CK, TIM4_ETR, EVENTOUT.
42 PA9 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions I2C3_SMBAL, TSC_G4_IO1, I2C2_SCL, I2S3_MCK, TIM1_CH2, USART1_TX, TIM15_BKIN, TIM2_CH3, EVENTOUT.
43 PA10 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions TIM17_BKIN, TSC_G4_IO2, I2C2_SDA, SPI2_MISO/I2S2ext_SD, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4, EVENTOUT.
44 PA11 bidirectional 5 V tolerant (FT) I/O; alternate functions SPI2_MOSI/I2S2_SD, TIM1_CH1N, USART1_CTS, COMP1_OUT, CAN_RX, TIM4_CH1, TIM1_CH4, TIM1_BKIN2, EVENTOUT; additional function USB_DM.
45 PA12 bidirectional 5 V tolerant (FT) I/O; alternate functions TIM16_CH1, I2SCKIN, TIM1_CH2N, USART1_RTS, COMP2_OUT, CAN_TX, TIM4_CH2, TIM1_ETR, EVENTOUT; additional function USB_DP.
46 PA13 bidirectional 5 V tolerant (FT) I/O; alternate functions SWDIO-JTMS, TIM16_CH1N, TSC_G4_IO3, IR-OUT, USART3_CTS, TIM4_CH3, EVENTOUT.
47 VSS power_in Digital ground.
48 VDD power_in Digital supply voltage, 2.0 V to 3.6 V.
49 PA14 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions SWCLK-JTCK, TSC_G4_IO4, I2C1_SDA, TIM1_BKIN, USART2_TX, EVENTOUT.
50 PA15 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions JTDI, TIM2_CH1/TIM2_ETR, TSC_SYNC, I2C1_SCL, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_RX, TIM1_BKIN, EVENTOUT.
51 PC10 bidirectional 5 V tolerant (FT) I/O; alternate functions EVENTOUT, UART4_TX, SPI3_SCK/I2S3_CK, USART3_TX.
52 PC11 bidirectional 5 V tolerant (FT) I/O; alternate functions EVENTOUT, UART4_RX, SPI3_MISO/I2S3ext_SD, USART3_RX.
53 PC12 bidirectional 5 V tolerant (FT) I/O; alternate functions EVENTOUT, UART5_TX, SPI3_MOSI/I2S3_SD, USART3_CK.
54 PD2 bidirectional 5 V tolerant (FT) I/O; alternate functions EVENTOUT, TIM3_ETR, UART5_RX.
55 PB3 bidirectional 5 V tolerant (FT) I/O; alternate functions JTDO-TRACESWO, TIM2_CH2, TIM4_ETR, TSC_G5_IO1, SPI1_SCK, SPI3_SCK/I2S3_CK, USART2_TX, TIM3_ETR, EVENTOUT.
56 PB4 bidirectional 5 V tolerant (FT) I/O; alternate functions JTRST, TIM16_CH1, TIM3_CH1, TSC_G5_IO2, SPI1_MISO, SPI3_MISO/I2S3ext_SD, USART2_RX, TIM17_BKIN, EVENTOUT.
57 PB5 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions TIM16_BKIN, TIM3_CH2, I2C1_SMBAl, SPI1_MOSI, SPI3_MOSI/I2S3_SD, USART2_CK, I2C3_SDA, TIM17_CH1, EVENTOUT.
58 PB6 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions TIM16_CH1N, TIM4_CH1, TSC_G5_IO3, I2C1_SCL, USART1_TX, EVENTOUT.
59 PB7 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions TIM17_CH1N, TIM4_CH2, TSC_G5_IO4, I2C1_SDA, USART1_RX, TIM3_CH4, FMC_NADV, EVENTOUT.
60 BOOT0 input Dedicated boot mode selection pin BOOT0.
61 PB8 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions TIM16_CH1, TIM4_CH3, TSC_SYNC, I2C1_SCL, USART3_RX, COMP1_OUT, CAN_RX, TIM1_BKIN, EVENTOUT.
62 PB9 bidirectional 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions TIM17_CH1, TIM4_CH4, I2C1_SDA, IR-OUT, USART3_TX, COMP2_OUT, CAN_TX, EVENTOUT.
63 VSS power_in Digital ground.
64 VDD power_in Digital supply voltage, 2.0 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F302RDT7
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f302rdt7-etched.step / stm32f302rdt7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f302rdt7.step / stm32f302rdt7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (168 pp, sha256 9adaf87c56f80b2f, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF