Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Download PDF

Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32F302RCT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F302RCT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup power supply for RTC and backup registers, voltage range 2.0-3.6 V.
2	PC13	bidirectional	GPIO port C pin 13, 3.3 V I/O, selectable alternate functions include TIM1_CH1N with RTC TAMP1, WKUP2, RTC_TS and RTC_OUT capability.
3	PC14	bidirectional	OSC32_IN oscillator input pin, 3.3 V I/O, supports 32 kHz crystal connection for RTC.
4	PC15	bidirectional	OSC32_OUT oscillator output pin, 3.3 V I/O, supports 32 kHz crystal connection for RTC.
5	PF0	bidirectional	GPIO port F pin 0, 5 V tolerant FTf I/O, selectable alternate functions include OSC_IN, I2C2_SDA, TIM1_CH3N.
6	PF1	bidirectional	GPIO port F pin 1, 5 V tolerant FTf I/O, selectable alternate functions include OSC_OUT and I2C2_SCL.
7	NRST	bidirectional	Active-low device reset input with embedded weak pull-up resistor, bidirectional reset pin for internal/external reset signaling.
8	PC0	bidirectional	GPIO port C pin 0, 3.3 V tolerant TTa I/O directly connected to ADC12_IN6, supports EVENTOUT alternate function.
9	PC1	bidirectional	GPIO port C pin 1, 3.3 V tolerant TTa I/O directly connected to ADC12_IN7, supports EVENTOUT alternate function.
10	PC2	bidirectional	GPIO port C pin 2, 3.3 V tolerant TTa I/O directly connected to ADC12_IN8, supports EVENTOUT and COMP7_OUT alternate functions.
11	PC3	bidirectional	GPIO port C pin 3, 3.3 V tolerant TTa I/O directly connected to ADC12_IN9, supports TIM1_BKIN2 and EVENTOUT alternate functions.
12	VSSA/VREF-	power_in	Analog ground and negative reference voltage supply for ADC, DAC, comparators and OPAMP peripherals, voltage range 0-3.6 V.
13	VDDA/VREF+	power_in	Analog power supply and positive reference voltage for ADC, DAC, and analog peripherals, voltage range 2.0-3.6 V.
14	PA0	bidirectional	GPIO port A pin 0, 3.3 V tolerant TTa I/O connected to ADC1_IN1, supports USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, RTC_TAMP2 and WKUP1 alternate functions.
15	PA1	bidirectional	GPIO port A pin 1, 3.3 V tolerant TTa I/O connected to ADC1_IN2, supports USART2_RTS_DE, TIM2_CH2, TIM15_CH1N, RTC_REFIN and COMP1_INP alternate functions.
16	PA2	bidirectional	GPIO port A pin 2, 3.3 V tolerant TTa I/O connected to ADC1_IN3 and OPAMP1_VOUT, supports USART2_TX, TIM2_CH3, TIM15_CH1 and COMP2_OUT alternate functions.
17	PA3	bidirectional	GPIO port A pin 3, 3.3 V tolerant TTa I/O connected to ADC1_IN4, supports USART2_RX, TIM2_CH4, TIM15_CH2 and COMP2_INP alternate functions.
18	PF4	bidirectional	GPIO port F pin 4, 3.3 V tolerant TTa I/O connected to ADC1_IN5, supports COMP1_OUT and EVENTOUT alternate functions.
19	VDD	power_in	Digital power supply for core and I/O cells, voltage range 2.0-3.6 V.
20	PA4	bidirectional	GPIO port A pin 4, 3.3 V tolerant TTa I/O connected to ADC2_IN1 and DAC1_OUT1, supports SPI1_NSS, USART2_CK and multiple comparator INM alternate functions.
21	PA5	bidirectional	GPIO port A pin 5, 3.3 V tolerant TTa I/O connected to ADC2_IN2, supports SPI1_SCK, TIM2_CH1_ETR and multiple comparator INM alternate functions.
22	PA6	bidirectional	GPIO port A pin 6, 3.3 V tolerant TTa I/O connected to ADC2_IN3 and OPAMP2_VOUT, supports SPI1_MISO, TIM3_CH1 and TIM1_BKIN alternate functions.
23	PA7	bidirectional	GPIO port A pin 7, 3.3 V tolerant TTa I/O connected to ADC2_IN4, supports SPI1_MOSI, TIM3_CH2, TIM17_CH1 and TIM1_CH1N alternate functions.
24	PC4	bidirectional	GPIO port C pin 4, 3.3 V tolerant TTa I/O connected to ADC2_IN5, supports USART1_TX and EVENTOUT alternate functions.
25	PC5	bidirectional	GPIO port C pin 5, 3.3 V tolerant TTa I/O connected to ADC2_IN11, supports USART1_RX, TSC_G3_IO1 and OPAMP2_VINM alternate functions.
26	PB0	bidirectional	GPIO port B pin 0, 3.3 V tolerant TTa I/O, supports TIM3_CH3, TIM1_CH2N, TSC_G3_IO2 and COMP4_INP alternate functions.
27	PB1	bidirectional	GPIO port B pin 1, 3.3 V tolerant TTa I/O, supports TIM3_CH4, TIM1_CH3N and COMP4_OUT alternate functions.
28	PB2	bidirectional	GPIO port B pin 2, 3.3 V tolerant TTa I/O connected to ADC2_IN12, supports TSC_G3_IO4 and COMP4_INM alternate functions.
29	PB10	bidirectional	GPIO port B pin 10, 3.3 V tolerant TTa I/O, supports USART3_TX, TIM2_CH3 and TSC_SYNC alternate functions.
30	PB11	bidirectional	GPIO port B pin 11, 3.3 V tolerant TTa I/O, supports USART3_RX, TIM2_CH4, TSC_G6_IO1 and COMP6_INP alternate functions.
31	VSS	power_in	Digital ground reference for core and I/O cells.
32	VDD	power_in	Digital power supply for core and I/O cells, voltage range 2.0-3.6 V.
33	PB12	bidirectional	GPIO port B pin 12, 3.3 V tolerant TTa I/O, supports SPI2_NSS, I2C2_SMBA, USART3_CK and TIM1_BKIN alternate functions.
34	PB13	bidirectional	GPIO port B pin 13, 3.3 V tolerant TTa I/O, supports SPI2_SCK, USART3_CTS and TIM1_CH1N alternate functions.
35	PB14	bidirectional	GPIO port B pin 14, 3.3 V tolerant TTa I/O, supports SPI2_MISO, USART3_RTS_DE, TIM1_CH2N and TIM15_CH1 alternate functions.
36	PB15	bidirectional	GPIO port B pin 15, 3.3 V tolerant TTa I/O, supports SPI2_MOSI, TIM1_CH3N, TIM15_CH1N and TIM15_CH2 alternate functions.
37	PC6	bidirectional	GPIO port C pin 6, 5 V tolerant FT I/O, supports I2S2_MCK, COMP6_OUT and TIM3_CH1 alternate functions.
38	PC7	bidirectional	GPIO port C pin 7, 5 V tolerant FT I/O, supports I2S3_MCK and TIM3_CH2 alternate functions.
39	PC8	bidirectional	GPIO port C pin 8, 5 V tolerant FT I/O, supports TIM3_CH3 and EVENTOUT alternate functions.
40	PC9	bidirectional	GPIO port C pin 9, 5 V tolerant FT I/O, supports TIM3_CH4 and I2S_CKIN alternate functions.
41	PA8	bidirectional	GPIO port A pin 8, 5 V tolerant FT I/O, supports I2C2_SMBA, TIM1_CH1, TIM4_ETR and MCO alternate functions.
42	PA9	bidirectional	GPIO port A pin 9, 5 V tolerant FTf FM+ capable I/O, supports I2C2_SCL, USART1_TX, TIM1_CH2 and TIM15_BKIN alternate functions.
43	PA10	bidirectional	GPIO port A pin 10, 5 V tolerant FTf FM+ capable I/O, supports I2C2_SDA, USART1_RX, TIM1_CH3 and COMP6_OUT alternate functions.
44	PA11	bidirectional	GPIO port A pin 11, 5 V tolerant FT I/O, supports USART1_CTS, USB_DM, CAN_RX and TIM1 alternate functions.
45	PA12	bidirectional	GPIO port A pin 12, 5 V tolerant FT I/O, supports USART1_RTS_DE, USB_DP, CAN_TX and TIM1 alternate functions.
46	PA13	bidirectional	GPIO port A pin 13, 5 V tolerant FT I/O, supports USART3_CTS, TIM16_CH1N, TSC_G4_IO3, IR_OUT and SWDIO-JTMS alternate functions.
47	VSS	power_in	Digital ground reference for core and I/O cells.
48	VDD	power_in	Digital power supply for core and I/O cells, voltage range 2.0-3.6 V.
49	PA14	bidirectional	GPIO port A pin 14, 5 V tolerant FTf FM+ capable I/O, supports I2C1_SDA, USART2_TX, TIM1_BKIN and SWCLK-JTCK alternate functions.
50	PA15	bidirectional	GPIO port A pin 15, 5 V tolerant FTf FM+ capable I/O, supports I2C1_SCL, SPI1_NSS, USART2_RX and JTDI alternate functions.
51	PC10	bidirectional	GPIO port C pin 10, 5 V tolerant FT I/O, supports SPI3_SCK, I2S3_CK, USART3_TX and UART4_TX alternate functions.
52	PC11	bidirectional	GPIO port C pin 11, 5 V tolerant FT I/O, supports SPI3_MISO, I2S3ext_SD, USART3_RX and UART4_RX alternate functions.
53	PC12	bidirectional	GPIO port C pin 12, 5 V tolerant FT I/O, supports SPI3_MOSI, I2S3_SD, USART3_CK and UART5_TX alternate functions.
54	PD2	bidirectional	GPIO port D pin 2, 5 V tolerant FT I/O, supports UART5_RX and TIM3_ETR alternate functions.
55	PB3	bidirectional	GPIO port B pin 3, 5 V tolerant FT I/O, supports SPI3_SCK, I2S3_CK, USART2_TX and JTDO-TRACESWO alternate functions.
56	PB4	bidirectional	GPIO port B pin 4, 5 V tolerant FT I/O, supports SPI3_MISO, I2S3ext_SD, USART2_RX, TIM3_CH1 and NJTRST alternate functions.
57	PB5	bidirectional	GPIO port B pin 5, 5 V tolerant FT I/O, supports SPI3_MOSI, I2S3_SD, I2C1_SMBA and TIM17_CH1 alternate functions.
58	PB6	bidirectional	GPIO port B pin 6, 5 V tolerant FTf FM+ capable I/O, supports I2C1_SCL, USART1_TX, TIM16_CH1N and TIM4_CH1 alternate functions.
59	PB7	bidirectional	GPIO port B pin 7, 5 V tolerant FTf FM+ capable I/O, supports I2C1_SDA, USART1_RX, TIM3_CH4 and TIM17_CH1N alternate functions.
60	BOOT0	input	Dedicated boot memory selection pin, determines whether code executes from Flash or system bootloader at reset.
61	PB8	bidirectional	GPIO port B pin 8, 5 V tolerant FTf FM+ capable I/O, supports I2C1_SCL, CAN_RX, TIM16_CH1 and TIM1_BKIN alternate functions.
62	PB9	bidirectional	GPIO port B pin 9, 5 V tolerant FTf FM+ capable I/O, supports I2C1_SDA, CAN_TX, TIM17_CH1 and IR_OUT alternate functions.
63	VSS	power_in	Digital ground reference for core and I/O cells.
64	VDD	power_in	Digital power supply for core and I/O cells, voltage range 2.0-3.6 V.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: STM32F302RCT6
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: stm32f302rct6-etched.step / stm32f302rct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f302rct6.step / stm32f302rct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (144 pp, sha256 a6962e6b690c3017, retrieved 2026-10-05, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF