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STM32F207ZET6TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f207zet6trfactory-2.0.0extractor-text
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Symbol & Footprint

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Datasheet

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Contents

README

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STM32F207ZET6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32F207ZET6TR from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant I/O (FT); alternate functions: TRACECLK, FSMC_A23, ETH_MII_TXD3, EVENTOUT.
2 PE3 bidirectional 5 V-tolerant I/O (FT); alternate functions: TRACED0, FSMC_A19, EVENTOUT.
3 PE4 bidirectional 5 V-tolerant I/O (FT); alternate functions: TRACED1, FSMC_A20, DCMI_D4, EVENTOUT.
4 PE5 bidirectional 5 V-tolerant I/O (FT); alternate functions: TRACED2, FSMC_A21, TIM9_CH1, DCMI_D6, EVENTOUT.
5 PE6 bidirectional 5 V-tolerant I/O (FT); alternate functions: TRACED3, FSMC_A22, TIM9_CH2, DCMI_D7, EVENTOUT.
6 VBAT power_in Backup-domain supply pin for RTC, backup registers and optional backup SRAM (type S); voltage limits are in Section 6.3.1.
7 PC13 bidirectional 5 V-tolerant I/O (FT) supplied through the power switch: sink limited to 3 mA, speed max 2 MHz with 30 pF load, must not be used as a current source; alternate/additional function: RTC_AF1, EVENTOUT.
8 PC14 bidirectional I/O (FT, except in oscillator mode) supplied through the power switch with the same 3 mA sink, 2 MHz / 30 pF and no current-source limits; additional function: OSC32_IN, EVENTOUT.
9 PC15 bidirectional I/O (FT, except in oscillator mode) supplied through the power switch with the same 3 mA sink, 2 MHz / 30 pF and no current-source limits; additional function: OSC32_OUT, EVENTOUT.
10 PF0 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A0, I2C2_SDA, EVENTOUT.
11 PF1 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A1, I2C2_SCL, EVENTOUT.
12 PF2 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A2, I2C2_SMBA, EVENTOUT.
13 PF3 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: FSMC_A3, EVENTOUT; additional function: ADC3_IN9.
14 PF4 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: FSMC_A4, EVENTOUT; additional function: ADC3_IN14.
15 PF5 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: FSMC_A5, EVENTOUT; additional function: ADC3_IN15.
16 VSS power_in Digital ground pin (type S).
17 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
18 PF6 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: TIM10_CH1, FSMC_NIORD, EVENTOUT; additional function: ADC3_IN4.
19 PF7 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: TIM11_CH1, FSMC_NREG, EVENTOUT; additional function: ADC3_IN5.
20 PF8 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: TIM13_CH1, FSMC_NIOWR, EVENTOUT; additional function: ADC3_IN6.
21 PF9 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: TIM14_CH1, FSMC_CD, EVENTOUT; additional function: ADC3_IN7.
22 PF10 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate function: FSMC_INTR, EVENTOUT; additional function: ADC3_IN8.
23 PH0 bidirectional I/O (FT, except in oscillator mode); alternate function: EVENTOUT; additional function: OSC_IN (high-speed oscillator input).
24 PH1 bidirectional I/O (FT, except in oscillator mode); alternate function: EVENTOUT; additional function: OSC_OUT (high-speed oscillator output).
25 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
26 PC0 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: OTG_HS_ULPI_STP, EVENTOUT; additional function: ADC123_IN10.
27 PC1 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: ETH_MDC, EVENTOUT; additional function: ADC123_IN11.
28 PC2 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: SPI2_MISO, OTG_HS_ULPI_DIR, ETH_MII_TXD2, EVENTOUT; additional function: ADC123_IN12.
29 PC3 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: SPI2_MOSI, I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, EVENTOUT; additional function: ADC123_IN13.
30 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
31 VSSA power_in Analog ground pin (type S).
32 VREF+ power_in Positive reference voltage pin for the analog converters (type S).
33 VDDA power_in Analog supply pin (type S); voltage limits are in Section 6.3.1.
34 PA0 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: USART2_CTS, UART4_TX, ETH_MII_CRS, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR, EVENTOUT; additional functions: ADC123_IN0, WKUP.
35 PA1 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: USART2_RTS, UART4_RX, ETH_RMII_REF_CLK, ETH_MII_RX_CLK, TIM5_CH2, TIM2_CH2, EVENTOUT; additional function: ADC123_IN1.
36 PA2 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: USART2_TX, TIM5_CH3, TIM9_CH1, TIM2_CH3, ETH_MDIO, EVENTOUT; additional function: ADC123_IN2.
37 PA3 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: USART2_RX, TIM5_CH4, TIM9_CH2, TIM2_CH4, OTG_HS_ULPI_D0, ETH_MII_COL, EVENTOUT; additional function: ADC123_IN3.
38 VSS power_in Digital ground pin (type S).
39 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
40 PA4 bidirectional 3.3 V-tolerant I/O (TTa, except in analog mode); alternate functions: SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, OTG_HS_SOF, I2S3_WS, EVENTOUT; additional functions: ADC12_IN4, DAC_OUT1.
41 PA5 bidirectional 3.3 V-tolerant I/O (TTa, except in analog mode); alternate functions: SPI1_SCK, OTG_HS_ULPI_CK, TIM2_CH1_ETR, TIM8_CH1N, EVENTOUT; additional functions: ADC12_IN5, DAC_OUT2.
42 PA6 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: SPI1_MISO, TIM8_BKIN, TIM13_CH1, DCMI_PIXCLK, TIM3_CH1, TIM1_BKIN, EVENTOUT; additional function: ADC12_IN6.
43 PA7 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: SPI1_MOSI, TIM8_CH1N, TIM14_CH1, TIM3_CH2, ETH_MII_RX_DV, TIM1_CH1N, ETH_RMII_CRS_DV, EVENTOUT; additional function: ADC12_IN7.
44 PC4 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: ETH_RMII_RXD0, ETH_MII_RXD0, EVENTOUT; additional function: ADC12_IN14.
45 PC5 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: ETH_RMII_RXD1, ETH_MII_RXD1, EVENTOUT; additional function: ADC12_IN15.
46 PB0 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: TIM3_CH3, TIM8_CH2N, OTG_HS_ULPI_D1, ETH_MII_RXD2, TIM1_CH2N, EVENTOUT; additional function: ADC12_IN8.
47 PB1 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions: TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, ETH_MII_RXD3, TIM1_CH3N, EVENTOUT; additional function: ADC12_IN9.
48 PB2/BOOT1 bidirectional 5 V-tolerant I/O (FT); function after reset is PB2, alternate function: EVENTOUT.
49 PF11 bidirectional 5 V-tolerant I/O (FT); alternate functions: DCMI_D12, EVENTOUT.
50 PF12 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A6, EVENTOUT.
51 VSS power_in Digital ground pin (type S).
52 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
53 PF13 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A7, EVENTOUT.
54 PF14 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A8, EVENTOUT.
55 PF15 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A9, EVENTOUT.
56 PG0 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A10, EVENTOUT.
57 PG1 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A11, EVENTOUT.
58 PE7 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D4, TIM1_ETR, EVENTOUT.
59 PE8 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D5, TIM1_CH1N, EVENTOUT.
60 PE9 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D6, TIM1_CH1, EVENTOUT.
61 VSS power_in Digital ground pin (type S).
62 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
63 PE10 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D7, TIM1_CH2N, EVENTOUT.
64 PE11 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D8, TIM1_CH2, EVENTOUT.
65 PE12 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D9, TIM1_CH3N, EVENTOUT.
66 PE13 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D10, TIM1_CH3, EVENTOUT.
67 PE14 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D11, TIM1_CH4, EVENTOUT.
68 PE15 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D12, TIM1_BKIN, EVENTOUT.
69 PB10 bidirectional 5 V-tolerant I/O (FT); alternate functions: SPI2_SCK, I2S2_SCK, I2C2_SCL, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, TIM2_CH3, EVENTOUT.
70 PB11 bidirectional 5 V-tolerant I/O (FT); alternate functions: I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_RMII_TX_EN, ETH_MII_TX_EN, TIM2_CH4, EVENTOUT.
71 VCAP_1 power_out Regulator decoupling pin for the internal voltage regulator; requires the external VCAP capacitor described in Section 6.3.2 (type S).
72 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
73 PB12 bidirectional 5 V-tolerant I/O (FT); alternate functions: SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, OTG_HS_ULPI_D5, ETH_RMII_TXD0, ETH_MII_TXD0, OTG_HS_ID, EVENTOUT.
74 PB13 bidirectional 5 V-tolerant I/O (FT); alternate functions: SPI2_SCK, I2S2_SCK, USART3_CTS, TIM1_CH1N, CAN2_TX, OTG_HS_ULPI_D6, ETH_RMII_TXD1, ETH_MII_TXD1, EVENTOUT; additional function: OTG_HS_VBUS.
75 PB14 bidirectional 5 V-tolerant I/O (FT); alternate functions: SPI2_MISO, TIM1_CH2N, TIM12_CH1, OTG_HS_DM, USART3_RTS, TIM8_CH2N, EVENTOUT.
76 PB15 bidirectional 5 V-tolerant I/O (FT); alternate functions: SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, OTG_HS_DP, RTC_50Hz, EVENTOUT.
77 PD8 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D13, USART3_TX, EVENTOUT.
78 PD9 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D14, USART3_RX, EVENTOUT.
79 PD10 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D15, USART3_CK, EVENTOUT.
80 PD11 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A16, USART3_CTS, EVENTOUT.
81 PD12 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A17, TIM4_CH1, USART3_RTS, EVENTOUT.
82 PD13 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A18, TIM4_CH2, EVENTOUT.
83 VSS power_in Digital ground pin (type S).
84 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
85 PD14 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D0, TIM4_CH3, EVENTOUT.
86 PD15 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D1, TIM4_CH4, EVENTOUT.
87 PG2 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A12, EVENTOUT.
88 PG3 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A13, EVENTOUT.
89 PG4 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A14, EVENTOUT.
90 PG5 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A15, EVENTOUT.
91 PG6 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_INT2, EVENTOUT.
92 PG7 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_INT3, USART6_CK, EVENTOUT.
93 PG8 bidirectional 5 V-tolerant I/O (FT); alternate functions: USART6_RTS, ETH_PPS_OUT, EVENTOUT.
94 VSS power_in Digital ground pin (type S).
95 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
96 PC6 bidirectional 5 V-tolerant I/O (FT); alternate functions: I2S2_MCK, TIM8_CH1, SDIO_D6, USART6_TX, DCMI_D0, TIM3_CH1, EVENTOUT.
97 PC7 bidirectional 5 V-tolerant I/O (FT); alternate functions: I2S3_MCK, TIM8_CH2, SDIO_D7, USART6_RX, DCMI_D1, TIM3_CH2, EVENTOUT.
98 PC8 bidirectional 5 V-tolerant I/O (FT); alternate functions: TIM8_CH3, SDIO_D0, TIM3_CH3, USART6_CK, DCMI_D2, EVENTOUT.
99 PC9 bidirectional 5 V-tolerant I/O (FT); alternate functions: I2S2_CKIN, I2S3_CKIN, MCO2, TIM8_CH4, SDIO_D1, I2C3_SDA, DCMI_D3, TIM3_CH4, EVENTOUT.
100 PA8 bidirectional 5 V-tolerant I/O (FT); alternate functions: MCO1, USART1_CK, TIM1_CH1, I2C3_SCL, OTG_FS_SOF, EVENTOUT.
101 PA9 bidirectional 5 V-tolerant I/O (FT); alternate functions: USART1_TX, TIM1_CH2, I2C3_SMBA, DCMI_D0, EVENTOUT; additional function: OTG_FS_VBUS.
102 PA10 bidirectional 5 V-tolerant I/O (FT); alternate functions: USART1_RX, TIM1_CH3, OTG_FS_ID, DCMI_D1, EVENTOUT.
103 PA11 bidirectional 5 V-tolerant I/O (FT); alternate functions: USART1_CTS, CAN1_RX, TIM1_CH4, OTG_FS_DM, EVENTOUT.
104 PA12 bidirectional 5 V-tolerant I/O (FT); alternate functions: USART1_RTS, CAN1_TX, TIM1_ETR, OTG_FS_DP, EVENTOUT.
105 PA13 bidirectional 5 V-tolerant I/O (FT); function after reset is JTMS-SWDIO (serial-wire debug data), alternate function: EVENTOUT.
106 VCAP_2 power_out Regulator decoupling pin for the internal voltage regulator; requires the external VCAP capacitor described in Section 6.3.2 (type S).
107 VSS power_in Digital ground pin (type S).
108 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
109 PA14 bidirectional 5 V-tolerant I/O (FT); function after reset is JTCK-SWCLK (serial-wire debug clock), alternate function: EVENTOUT.
110 PA15 bidirectional 5 V-tolerant I/O (FT); function after reset is JTDI; alternate functions: SPI3_NSS, I2S3_WS, TIM2_CH1_ETR, SPI1_NSS, EVENTOUT.
111 PC10 bidirectional 5 V-tolerant I/O (FT); alternate functions: SPI3_SCK, I2S3_SCK, UART4_TX, SDIO_D2, DCMI_D8, USART3_TX, EVENTOUT.
112 PC11 bidirectional 5 V-tolerant I/O (FT); alternate functions: UART4_RX, SPI3_MISO, SDIO_D3, DCMI_D4, USART3_RX, EVENTOUT.
113 PC12 bidirectional 5 V-tolerant I/O (FT); alternate functions: UART5_TX, SDIO_CK, DCMI_D9, SPI3_MOSI, I2S3_SD, USART3_CK, EVENTOUT.
114 PD0 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D2, CAN1_RX, EVENTOUT.
115 PD1 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_D3, CAN1_TX, EVENTOUT.
116 PD2 bidirectional 5 V-tolerant I/O (FT); alternate functions: TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11, EVENTOUT.
117 PD3 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_CLK, USART2_CTS, EVENTOUT.
118 PD4 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_NOE, USART2_RTS, EVENTOUT.
119 PD5 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_NWE, USART2_TX, EVENTOUT.
120 VSS power_in Digital ground pin (type S).
121 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
122 PD6 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_NWAIT, USART2_RX, EVENTOUT.
123 PD7 bidirectional 5 V-tolerant I/O (FT); alternate functions: USART2_CK, FSMC_NE1, FSMC_NCE2, EVENTOUT.
124 PG9 bidirectional 5 V-tolerant I/O (FT); alternate functions: USART6_RX, FSMC_NE2, FSMC_NCE3, EVENTOUT.
125 PG10 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_NCE4_1, FSMC_NE3, EVENTOUT.
126 PG11 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_NCE4_2, ETH_MII_TX_EN, ETH_RMII_TX_EN, EVENTOUT.
127 PG12 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_NE4, USART6_RTS, EVENTOUT.
128 PG13 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A24, USART6_CTS, ETH_MII_TXD0, ETH_RMII_TXD0, EVENTOUT.
129 PG14 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_A25, USART6_TX, ETH_MII_TXD1, ETH_RMII_TXD1, EVENTOUT.
130 VSS power_in Digital ground pin (type S).
131 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.
132 PG15 bidirectional 5 V-tolerant I/O (FT); alternate functions: USART6_CTS, DCMI_D13, EVENTOUT.
133 PB3 bidirectional 5 V-tolerant I/O (FT); function after reset is JTDO/TRACESWO; alternate functions: SPI3_SCK, I2S3_SCK, TIM2_CH2, SPI1_SCK, EVENTOUT.
134 PB4 bidirectional 5 V-tolerant I/O (FT); function after reset is NJTRST; alternate functions: SPI3_MISO, TIM3_CH1, SPI1_MISO, EVENTOUT.
135 PB5 bidirectional 5 V-tolerant I/O (FT); alternate functions: I2C1_SMBA, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, TIM3_CH2, SPI1_MOSI, SPI3_MOSI, DCMI_D10, I2S3_SD, EVENTOUT.
136 PB6 bidirectional 5 V-tolerant I/O (FT); alternate functions: I2C1_SCL, TIM4_CH1, CAN2_TX, DCMI_D5, USART1_TX, EVENTOUT.
137 PB7 bidirectional 5 V-tolerant I/O (FT); alternate functions: I2C1_SDA, FSMC_NL, DCMI_VSYNC, USART1_RX, TIM4_CH2, EVENTOUT.
138 BOOT0 input Dedicated BOOT0 boot-mode input pin (structure B), also usable as VPP for Flash programming.
139 PB8 bidirectional 5 V-tolerant I/O (FT); alternate functions: TIM4_CH3, SDIO_D4, TIM10_CH1, DCMI_D6, ETH_MII_TXD3, I2C1_SCL, CAN1_RX, EVENTOUT.
140 PB9 bidirectional 5 V-tolerant I/O (FT); alternate functions: SPI2_NSS, I2S2_WS, TIM4_CH4, TIM11_CH1, SDIO_D5, DCMI_D7, I2C1_SDA, CAN1_TX, EVENTOUT.
141 PE0 bidirectional 5 V-tolerant I/O (FT); alternate functions: TIM4_ETR, FSMC_NBL0, DCMI_D2, EVENTOUT.
142 PE1 bidirectional 5 V-tolerant I/O (FT); alternate functions: FSMC_NBL1, DCMI_D3, EVENTOUT.
143 RFU unconnected Reserved for future use; may be tied to VDD or VSS or left unconnected.
144 VDD power_in Digital supply pin (type S); voltage limits are in Section 6.3.1.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-144(20x20)
Category Embedded Processors & Controllers
Pins 144

CAD (KiCad official)

  • Symbol: STM32F207ZET6TR
  • Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
  • 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
  • 3D model files: stm32f207zet6tr-etched.step / stm32f207zet6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f207zet6tr.step / stm32f207zet6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (181 pp, sha256 774f5ff3acf8fdf5, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF