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Contents

README

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STM32F207ZET6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32F207ZET6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional Port E bit 2. 5V-tolerant GPIO. Alt: TRACECLK, FSMC_A23, ETH_MII_TXD3, EVENTOUT.
2 PE3 bidirectional Port E bit 3. 5V-tolerant GPIO. Alt: TRACED0, FSMC_A19, EVENTOUT.
3 PE4 bidirectional Port E bit 4. 5V-tolerant GPIO. Alt: TRACED1, FSMC_A20, DCMI_D4, EVENTOUT.
4 PE5 bidirectional Port E bit 5. 5V-tolerant GPIO. Alt: TRACED2, FSMC_A21, TIM9_CH1, DCMI_D6, EVENTOUT.
5 PE6 bidirectional Port E bit 6. 5V-tolerant GPIO. Alt: TRACED3, FSMC_A22, TIM9_CH2, DCMI_D7, EVENTOUT.
6 VBAT power_in Backup domain supply (1.65 V to 3.6 V). Powers RTC, LSE oscillator and backup registers when VDD is off.
7 PC13 bidirectional Port C bit 13, powered via VBAT switch (limited to ~3 mA, max 2 MHz / 30 pF as output). Alt: EVENTOUT / RTC_AF1.
8 PC14/OSC32_IN bidirectional Port C bit 14 or 32 kHz LSE crystal input. Powered via VBAT switch, limited drive. Not 5V tolerant when used in oscillator mode.
9 PC15/OSC32_OUT bidirectional Port C bit 15 or 32 kHz LSE crystal output. Powered via VBAT switch, limited drive.
10 PF0 bidirectional Port F bit 0. 5V-tolerant GPIO. Alt: FSMC_A0, I2C2_SDA, EVENTOUT.
11 PF1 bidirectional Port F bit 1. 5V-tolerant GPIO. Alt: FSMC_A1, I2C2_SCL, EVENTOUT.
12 PF2 bidirectional Port F bit 2. 5V-tolerant GPIO. Alt: FSMC_A2, I2C2_SMBA, EVENTOUT.
13 PF3 bidirectional Port F bit 3. 5V-tolerant GPIO. Alt: FSMC_A3, EVENTOUT; analog ADC3_IN9.
14 PF4 bidirectional Port F bit 4. 5V-tolerant GPIO. Alt: FSMC_A4, EVENTOUT; analog ADC3_IN14.
15 PF5 bidirectional Port F bit 5. 5V-tolerant GPIO. Alt: FSMC_A5, EVENTOUT; analog ADC3_IN15.
16 VSS power_in Digital ground, 0 V reference.
17 VDD power_in Digital supply, 1.8 V to 3.6 V. Decouple locally with 100 nF.
18 PF6 bidirectional Port F bit 6. 5V-tolerant GPIO. Alt: TIM10_CH1, FSMC_NIORD, EVENTOUT; analog ADC3_IN4.
19 PF7 bidirectional Port F bit 7. 5V-tolerant GPIO. Alt: TIM11_CH1, FSMC_NREG, EVENTOUT; analog ADC3_IN5.
20 PF8 bidirectional Port F bit 8. 5V-tolerant GPIO. Alt: TIM13_CH1, FSMC_NIOWR, EVENTOUT; analog ADC3_IN6.
21 PF9 bidirectional Port F bit 9. 5V-tolerant GPIO. Alt: TIM14_CH1, FSMC_CD, EVENTOUT; analog ADC3_IN7.
22 PF10 bidirectional Port F bit 10. 5V-tolerant GPIO. Alt: FSMC_INTR, EVENTOUT; analog ADC3_IN8.
23 PH0/OSC_IN bidirectional Port H bit 0 or HSE main-oscillator crystal input (4-26 MHz). Not 5V tolerant in oscillator mode.
24 PH1/OSC_OUT bidirectional Port H bit 1 or HSE main-oscillator crystal output. Not 5V tolerant in oscillator mode.
25 NRST bidirectional Bidirectional device reset, active low. Internal weak pull-up; asserted by external reset or on-chip reset sources.
26 PC0 bidirectional Port C bit 0. 5V-tolerant GPIO. Alt: OTG_HS_ULPI_STP, EVENTOUT; analog ADC123_IN10.
27 PC1 bidirectional Port C bit 1. 5V-tolerant GPIO. Alt: ETH_MDC, EVENTOUT; analog ADC123_IN11.
28 PC2 bidirectional Port C bit 2. 5V-tolerant GPIO. Alt: SPI2_MISO, OTG_HS_ULPI_DIR, ETH_MII_TXD2, EVENTOUT; analog ADC123_IN12.
29 PC3 bidirectional Port C bit 3. 5V-tolerant GPIO. Alt: SPI2_MOSI, I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, EVENTOUT; analog ADC123_IN13.
30 VDD power_in Digital supply, 1.8 V to 3.6 V.
31 VSSA power_in Analog ground, 0 V reference for ADC/DAC.
32 VREF+ power_in Positive ADC/DAC reference (1.8 V to VDDA). Provides the full-scale reference for analog conversions.
33 VDDA power_in Analog supply for ADC/DAC, reset block and PLL (1.8 V to 3.6 V).
34 PA0-WKUP bidirectional Port A bit 0 / system wake-up input. 5V-tolerant. Alt: USART2_CTS, UART4_TX, ETH_MII_CRS, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR, EVENTOUT; analog ADC123_IN0/WKUP.
35 PA1 bidirectional Port A bit 1. 5V-tolerant. Alt: USART2_RTS, UART4_RX, ETH_RMII_REF_CLK, ETH_MII_RX_CLK, TIM5_CH2, TIM2_CH2, EVENTOUT; analog ADC123_IN1.
36 PA2 bidirectional Port A bit 2. 5V-tolerant. Alt: USART2_TX, TIM5_CH3, TIM9_CH1, TIM2_CH3, ETH_MDIO, EVENTOUT; analog ADC123_IN2.
37 PA3 bidirectional Port A bit 3. 5V-tolerant. Alt: USART2_RX, TIM5_CH4, TIM9_CH2, TIM2_CH4, OTG_HS_ULPI_D0, ETH_MII_COL, EVENTOUT; analog ADC123_IN3.
38 VSS power_in Digital ground.
39 VDD power_in Digital supply, 1.8 V to 3.6 V.
40 PA4 bidirectional Port A bit 4. I/O TTa (3.3 V tolerant, no 5V). Alt: SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, OTG_HS_SOF, I2S3_WS, EVENTOUT; analog ADC12_IN4, DAC_OUT1.
41 PA5 bidirectional Port A bit 5. I/O TTa (3.3 V tolerant, no 5V). Alt: SPI1_SCK, OTG_HS_ULPI_CK, TIM2_CH1_ETR, TIM8_CH1N, EVENTOUT; analog ADC12_IN5, DAC_OUT2.
42 PA6 bidirectional Port A bit 6. 5V-tolerant. Alt: SPI1_MISO, TIM8_BKIN, TIM13_CH1, DCMI_PIXCLK, TIM3_CH1, TIM1_BKIN, EVENTOUT; analog ADC12_IN6.
43 PA7 bidirectional Port A bit 7. 5V-tolerant. Alt: SPI1_MOSI, TIM8_CH1N, TIM14_CH1, TIM3_CH2, ETH_MII_RX_DV, TIM1_CH1N, ETH_RMII_CRS_DV, EVENTOUT; analog ADC12_IN7.
44 PC4 bidirectional Port C bit 4. 5V-tolerant. Alt: ETH_RMII_RXD0, ETH_MII_RXD0, EVENTOUT; analog ADC12_IN14.
45 PC5 bidirectional Port C bit 5. 5V-tolerant. Alt: ETH_RMII_RXD1, ETH_MII_RXD1, EVENTOUT; analog ADC12_IN15.
46 PB0 bidirectional Port B bit 0. 5V-tolerant. Alt: TIM3_CH3, TIM8_CH2N, OTG_HS_ULPI_D1, ETH_MII_RXD2, TIM1_CH2N, EVENTOUT; analog ADC12_IN8.
47 PB1 bidirectional Port B bit 1. 5V-tolerant. Alt: TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, ETH_MII_RXD3, TIM1_CH3N, EVENTOUT; analog ADC12_IN9.
48 PB2/BOOT1 bidirectional Port B bit 2 / BOOT1 strap. Sampled with BOOT0 at reset to select boot memory (main flash, system memory, or embedded SRAM).
49 PF11 bidirectional Port F bit 11. 5V-tolerant. Alt: DCMI_D12, EVENTOUT.
50 PF12 bidirectional Port F bit 12. 5V-tolerant. Alt: FSMC_A6, EVENTOUT.
51 VSS power_in Digital ground.
52 VDD power_in Digital supply, 1.8 V to 3.6 V.
53 PF13 bidirectional Port F bit 13. 5V-tolerant. Alt: FSMC_A7, EVENTOUT.
54 PF14 bidirectional Port F bit 14. 5V-tolerant. Alt: FSMC_A8, EVENTOUT.
55 PF15 bidirectional Port F bit 15. 5V-tolerant. Alt: FSMC_A9, EVENTOUT.
56 PG0 bidirectional Port G bit 0. 5V-tolerant. Alt: FSMC_A10, EVENTOUT.
57 PG1 bidirectional Port G bit 1. 5V-tolerant. Alt: FSMC_A11, EVENTOUT.
58 PE7 bidirectional Port E bit 7. 5V-tolerant. Alt: FSMC_D4, TIM1_ETR, EVENTOUT.
59 PE8 bidirectional Port E bit 8. 5V-tolerant. Alt: FSMC_D5, TIM1_CH1N, EVENTOUT.
60 PE9 bidirectional Port E bit 9. 5V-tolerant. Alt: FSMC_D6, TIM1_CH1, EVENTOUT.
61 VSS power_in Digital ground.
62 VDD power_in Digital supply, 1.8 V to 3.6 V.
63 PE10 bidirectional Port E bit 10. 5V-tolerant. Alt: FSMC_D7, TIM1_CH2N, EVENTOUT.
64 PE11 bidirectional Port E bit 11. 5V-tolerant. Alt: FSMC_D8, TIM1_CH2, EVENTOUT.
65 PE12 bidirectional Port E bit 12. 5V-tolerant. Alt: FSMC_D9, TIM1_CH3N, EVENTOUT.
66 PE13 bidirectional Port E bit 13. 5V-tolerant. Alt: FSMC_D10, TIM1_CH3, EVENTOUT.
67 PE14 bidirectional Port E bit 14. 5V-tolerant. Alt: FSMC_D11, TIM1_CH4, EVENTOUT.
68 PE15 bidirectional Port E bit 15. 5V-tolerant. Alt: FSMC_D12, TIM1_BKIN, EVENTOUT.
69 PB10 bidirectional Port B bit 10. 5V-tolerant. Alt: SPI2_SCK, I2S2_SCK, I2C2_SCL, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, TIM2_CH3, EVENTOUT.
70 PB11 bidirectional Port B bit 11. 5V-tolerant. Alt: I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_RMII_TX_EN, ETH_MII_TX_EN, TIM2_CH4, EVENTOUT.
71 VCAP_1 passive 1.2 V internal regulator output. Connect a 2.2 µF ceramic decoupling capacitor to VSS (see AN2867/AN3364).
72 VDD power_in Digital supply, 1.8 V to 3.6 V.
73 PB12 bidirectional Port B bit 12. 5V-tolerant. Alt: SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, OTG_HS_ULPI_D5, ETH_RMII_TXD0, ETH_MII_TXD0, OTG_HS_ID, EVENTOUT.
74 PB13 bidirectional Port B bit 13. 5V-tolerant. Alt: SPI2_SCK, I2S2_SCK, USART3_CTS, TIM1_CH1N, CAN2_TX, OTG_HS_ULPI_D6, ETH_RMII_TXD1, ETH_MII_TXD1, EVENTOUT; additional OTG_HS_VBUS.
75 PB14 bidirectional Port B bit 14. 5V-tolerant. Alt: SPI2_MISO, TIM1_CH2N, TIM12_CH1, OTG_HS_DM, USART3_RTS, TIM8_CH2N, EVENTOUT.
76 PB15 bidirectional Port B bit 15. 5V-tolerant. Alt: SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, OTG_HS_DP, RTC_50Hz, EVENTOUT.
77 PD8 bidirectional Port D bit 8. 5V-tolerant. Alt: FSMC_D13, USART3_TX, EVENTOUT.
78 PD9 bidirectional Port D bit 9. 5V-tolerant. Alt: FSMC_D14, USART3_RX, EVENTOUT.
79 PD10 bidirectional Port D bit 10. 5V-tolerant. Alt: FSMC_D15, USART3_CK, EVENTOUT.
80 PD11 bidirectional Port D bit 11. 5V-tolerant. Alt: FSMC_A16, USART3_CTS, EVENTOUT.
81 PD12 bidirectional Port D bit 12. 5V-tolerant. Alt: FSMC_A17, TIM4_CH1, USART3_RTS, EVENTOUT.
82 PD13 bidirectional Port D bit 13. 5V-tolerant. Alt: FSMC_A18, TIM4_CH2, EVENTOUT.
83 VSS power_in Digital ground.
84 VDD power_in Digital supply, 1.8 V to 3.6 V.
85 PD14 bidirectional Port D bit 14. 5V-tolerant. Alt: FSMC_D0, TIM4_CH3, EVENTOUT.
86 PD15 bidirectional Port D bit 15. 5V-tolerant. Alt: FSMC_D1, TIM4_CH4, EVENTOUT.
87 PG2 bidirectional Port G bit 2. 5V-tolerant. Alt: FSMC_A12, EVENTOUT.
88 PG3 bidirectional Port G bit 3. 5V-tolerant. Alt: FSMC_A13, EVENTOUT.
89 PG4 bidirectional Port G bit 4. 5V-tolerant. Alt: FSMC_A14, EVENTOUT.
90 PG5 bidirectional Port G bit 5. 5V-tolerant. Alt: FSMC_A15, EVENTOUT.
91 PG6 bidirectional Port G bit 6. 5V-tolerant. Alt: FSMC_INT2, EVENTOUT.
92 PG7 bidirectional Port G bit 7. 5V-tolerant. Alt: FSMC_INT3, USART6_CK, EVENTOUT.
93 PG8 bidirectional Port G bit 8. 5V-tolerant. Alt: USART6_RTS, ETH_PPS_OUT, EVENTOUT.
94 VSS power_in Digital ground.
95 VDD power_in Digital supply, 1.8 V to 3.6 V.
96 PC6 bidirectional Port C bit 6. 5V-tolerant. Alt: I2S2_MCK, TIM8_CH1, SDIO_D6, USART6_TX, DCMI_D0, TIM3_CH1, EVENTOUT.
97 PC7 bidirectional Port C bit 7. 5V-tolerant. Alt: I2S3_MCK, TIM8_CH2, SDIO_D7, USART6_RX, DCMI_D1, TIM3_CH2, EVENTOUT.
98 PC8 bidirectional Port C bit 8. 5V-tolerant. Alt: TIM8_CH3, SDIO_D0, TIM3_CH3, USART6_CK, DCMI_D2, EVENTOUT.
99 PC9 bidirectional Port C bit 9. 5V-tolerant. Alt: I2S2_CKIN, I2S3_CKIN, MCO2, TIM8_CH4, SDIO_D1, I2C3_SDA, DCMI_D3, TIM3_CH4, EVENTOUT.
100 PA8 bidirectional Port A bit 8. 5V-tolerant. Alt: MCO1, USART1_CK, TIM1_CH1, I2C3_SCL, OTG_FS_SOF, EVENTOUT.
101 PA9 bidirectional Port A bit 9. 5V-tolerant. Alt: USART1_TX, TIM1_CH2, I2C3_SMBA, DCMI_D0, EVENTOUT; additional OTG_FS_VBUS.
102 PA10 bidirectional Port A bit 10. 5V-tolerant. Alt: USART1_RX, TIM1_CH3, OTG_FS_ID, DCMI_D1, EVENTOUT.
103 PA11 bidirectional Port A bit 11. 5V-tolerant. Alt: USART1_CTS, CAN1_RX, TIM1_CH4, OTG_FS_DM, EVENTOUT.
104 PA12 bidirectional Port A bit 12. 5V-tolerant. Alt: USART1_RTS, CAN1_TX, TIM1_ETR, OTG_FS_DP, EVENTOUT.
105 PA13(JTMS-SWDIO) bidirectional Port A bit 13, default function JTAG TMS / SWD I/O. 5V-tolerant. Alt: EVENTOUT.
106 VCAP_2 passive 1.2 V internal regulator output. Connect a 2.2 µF ceramic decoupling capacitor to VSS.
107 VSS power_in Digital ground.
108 VDD power_in Digital supply, 1.8 V to 3.6 V.
109 PA14(JTCK-SWCLK) bidirectional Port A bit 14, default function JTAG TCK / SWD CLK. 5V-tolerant. Alt: EVENTOUT.
110 PA15(JTDI) bidirectional Port A bit 15, default function JTAG TDI. 5V-tolerant. Alt: SPI3_NSS, I2S3_WS, TIM2_CH1_ETR, SPI1_NSS, EVENTOUT.
111 PC10 bidirectional Port C bit 10. 5V-tolerant. Alt: SPI3_SCK, I2S3_SCK, UART4_TX, SDIO_D2, DCMI_D8, USART3_TX, EVENTOUT.
112 PC11 bidirectional Port C bit 11. 5V-tolerant. Alt: UART4_RX, SPI3_MISO, SDIO_D3, DCMI_D4, USART3_RX, EVENTOUT.
113 PC12 bidirectional Port C bit 12. 5V-tolerant. Alt: UART5_TX, SDIO_CK, DCMI_D9, SPI3_MOSI, I2S3_SD, USART3_CK, EVENTOUT.
114 PD0 bidirectional Port D bit 0. 5V-tolerant. Alt: FSMC_D2, CAN1_RX, EVENTOUT.
115 PD1 bidirectional Port D bit 1. 5V-tolerant. Alt: FSMC_D3, CAN1_TX, EVENTOUT.
116 PD2 bidirectional Port D bit 2. 5V-tolerant. Alt: TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11, EVENTOUT.
117 PD3 bidirectional Port D bit 3. 5V-tolerant. Alt: FSMC_CLK, USART2_CTS, EVENTOUT.
118 PD4 bidirectional Port D bit 4. 5V-tolerant. Alt: FSMC_NOE, USART2_RTS, EVENTOUT.
119 PD5 bidirectional Port D bit 5. 5V-tolerant. Alt: FSMC_NWE, USART2_TX, EVENTOUT.
120 VSS power_in Digital ground.
121 VDD power_in Digital supply, 1.8 V to 3.6 V.
122 PD6 bidirectional Port D bit 6. 5V-tolerant. Alt: FSMC_NWAIT, USART2_RX, EVENTOUT.
123 PD7 bidirectional Port D bit 7. 5V-tolerant. Alt: USART2_CK, FSMC_NE1, FSMC_NCE2, EVENTOUT.
124 PG9 bidirectional Port G bit 9. 5V-tolerant. Alt: USART6_RX, FSMC_NE2, FSMC_NCE3, EVENTOUT.
125 PG10 bidirectional Port G bit 10. 5V-tolerant. Alt: FSMC_NCE4_1, FSMC_NE3, EVENTOUT.
126 PG11 bidirectional Port G bit 11. 5V-tolerant. Alt: FSMC_NCE4_2, ETH_MII_TX_EN, ETH_RMII_TX_EN, EVENTOUT.
127 PG12 bidirectional Port G bit 12. 5V-tolerant. Alt: FSMC_NE4, USART6_RTS, EVENTOUT.
128 PG13 bidirectional Port G bit 13. 5V-tolerant. Alt: FSMC_A24, USART6_CTS, ETH_MII_TXD0, ETH_RMII_TXD0, EVENTOUT.
129 PG14 bidirectional Port G bit 14. 5V-tolerant. Alt: FSMC_A25, USART6_TX, ETH_MII_TXD1, ETH_RMII_TXD1, EVENTOUT.
130 VSS power_in Digital ground.
131 VDD power_in Digital supply, 1.8 V to 3.6 V.
132 PG15 bidirectional Port G bit 15. 5V-tolerant. Alt: USART6_CTS, DCMI_D13, EVENTOUT.
133 PB3(JTDO/TRACESWO) bidirectional Port B bit 3, default function JTAG TDO / SWO. 5V-tolerant. Alt: SPI3_SCK, I2S3_SCK, TIM2_CH2, SPI1_SCK, EVENTOUT.
134 PB4(NJTRST) bidirectional Port B bit 4, default function JTAG NJTRST. 5V-tolerant. Alt: SPI3_MISO, TIM3_CH1, SPI1_MISO, EVENTOUT.
135 PB5 bidirectional Port B bit 5. 5V-tolerant. Alt: I2C1_SMBA, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, TIM3_CH2, SPI1_MOSI, SPI3_MOSI, DCMI_D10, I2S3_SD, EVENTOUT.
136 PB6 bidirectional Port B bit 6. 5V-tolerant. Alt: I2C1_SCL, TIM4_CH1, CAN2_TX, DCMI_D5, USART1_TX, EVENTOUT.
137 PB7 bidirectional Port B bit 7. 5V-tolerant. Alt: I2C1_SDA, FSMC_NL/NADV, DCMI_VSYNC, USART1_RX, TIM4_CH2, EVENTOUT.
138 BOOT0 input Boot-mode select strap, sampled together with BOOT1 (PB2) at reset to select boot memory. Also serves as VPP for flash programming.
139 PB8 bidirectional Port B bit 8. 5V-tolerant. Alt: TIM4_CH3, SDIO_D4, TIM10_CH1, DCMI_D6, ETH_MII_TXD3, I2C1_SCL, CAN1_RX, EVENTOUT.
140 PB9 bidirectional Port B bit 9. 5V-tolerant. Alt: SPI2_NSS, I2S2_WS, TIM4_CH4, TIM11_CH1, SDIO_D5, DCMI_D7, I2C1_SDA, CAN1_TX, EVENTOUT.
141 PE0 bidirectional Port E bit 0. 5V-tolerant. Alt: TIM4_ETR, FSMC_NBL0, DCMI_D2, EVENTOUT.
142 PE1 bidirectional Port E bit 1. 5V-tolerant. Alt: FSMC_NBL1, DCMI_D3, EVENTOUT.
143 RFU unconnected Reserved for future use. Tie to VDD, VSS, or leave unconnected.
144 VDD power_in Digital supply, 1.8 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-144(20x20)
Category MCU
Pins 144

Ordering variants

Same part, different packaging or reel option.

  • STM32F207ZET6ZCT6
  • STM32F207ZET6
  • STM32F207ZET6ZFT6
  • STM32F207ZET6ZGT6
  • STM32F207ZET6ZCT7
  • STM32F207ZET6ZET7
  • STM32F207ZET6ZFT7
  • STM32F207ZET6ZGT7
  • STM32F207ZET6RBT6
  • STM32F207ZET6RCT6
  • STM32F207ZET6RET6
  • STM32F207ZET6RFT6
  • STM32F207ZET6RGT6
  • STM32F207ZET6RBT7
  • STM32F207ZET6RCT7
  • STM32F207ZET6RET7
  • STM32F207ZET6RFT7
  • STM32F207ZET6RGT7
  • STM32F207ZET6VBT6
  • STM32F207ZET6VCT6
  • STM32F207ZET6VET6
  • STM32F207ZET6VFT6
  • STM32F207ZET6VGT6
  • STM32F207ZET6VBT7
  • STM32F207ZET6VCT7
  • STM32F207ZET6VET7
  • STM32F207ZET6VFT7
  • STM32F207ZET6VGT7
  • STM32F207ZET6IET6
  • STM32F207ZET6IFT6
  • STM32F207ZET6IGT6
  • STM32F207ZET6IET7
  • STM32F207ZET6IFT7
  • STM32F207ZET6IGT7
  • STM32F207ZET6IEH6
  • STM32F207ZET6IFH6
  • STM32F207ZET6IGH6
  • STM32F207ZET6IEH7
  • STM32F207ZET6IFH7
  • STM32F207ZET6IGH7
  • STM32F207ZET6RBY6
  • STM32F207ZET6RCY6
  • STM32F207ZET6REY6
  • STM32F207ZET6RFY6
  • STM32F207ZET6RGY6

CAD (KiCad official)

  • Symbol: STM32F207ZET6
  • Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
  • 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
  • 3D model files: stm32f207zet6-etched.step / stm32f207zet6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f207zet6.step / stm32f207zet6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (178 pp, sha256 39f1332cfc0252f9, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF