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STM32F207VET6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F207VET6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
STM32F207VET6TR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | Port E pin 2, 5V tolerant I/O, alternate functions: TRACECLK, FSMC_A23, ETH_MII_TXD3 |
| 2 | PE3 | bidirectional | Port E pin 3, 5V tolerant I/O, alternate functions: TRACED0, FSMC_A19 |
| 3 | PE4 | bidirectional | Port E pin 4, 5V tolerant I/O, alternate functions: TRACED1, FSMC_A20, DCMI_D4 |
| 4 | PE5 | bidirectional | Port E pin 5, 5V tolerant I/O, alternate functions: TRACED2, FSMC_A21, TIM9_CH1, DCMI_D6 |
| 5 | PE6 | bidirectional | Port E pin 6, 5V tolerant I/O, alternate functions: TRACED3, FSMC_A22, TIM9_CH2, DCMI_D7 |
| 6 | VBAT | power_in | Battery backup supply voltage (1.8-3.6V), RTC supply |
| 7 | PC13 | bidirectional | Port C pin 13, RTC alternate function, 5V tolerant, limited output current (3mA max, 2MHz max) |
| 8 | PC14-OSC32_IN | bidirectional | Port C pin 14, 32kHz oscillator input, 5V tolerant, limited output current (3mA max, 2MHz max) |
| 9 | PC15-OSC32_OUT | bidirectional | Port C pin 15, 32kHz oscillator output, 5V tolerant, limited output current (3mA max, 2MHz max) |
| 10 | VSS | power_in | Ground (return path for internal logic) |
| 11 | VDD | power_in | Main supply voltage (1.8-3.6V for digital core and I/O) |
| 12 | PH0-OSC_IN | bidirectional | Port H pin 0, main oscillator input (4-26MHz), 5V tolerant |
| 13 | PH1-OSC_OUT | bidirectional | Port H pin 1, main oscillator output, 5V tolerant |
| 14 | NRST | bidirectional | Active-low reset pin with internal weak pull-up, filtered, bidirectional |
| 15 | PC0 | bidirectional | Port C pin 0, 5V tolerant I/O, alternate functions: OTG_HS_ULPI_STP, ADC123_IN10 |
| 16 | PC1 | bidirectional | Port C pin 1, 5V tolerant I/O, alternate functions: ETH_MDC, ADC123_IN11 |
| 17 | PC2 | bidirectional | Port C pin 2, 5V tolerant I/O, alternate functions: SPI2_MISO, OTG_HS_ULPI_DIR, ETH_MII_TXD2, ADC123_IN12 |
| 18 | PC3 | bidirectional | Port C pin 3, 5V tolerant I/O, alternate functions: SPI2_MOSI, I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, ADC123_IN13 |
| 19 | VDD | power_in | Main supply voltage (1.8-3.6V for digital core and I/O) |
| 20 | VSSA | power_in | Ground for analog circuits (ADC reference return) |
| 21 | VREF+ | power_in | Positive ADC reference voltage (1.65-3.6V), with decoupling capacitor |
| 22 | VDDA | power_in | Analog supply voltage (1.65-3.6V), with decoupling capacitor |
| 23 | PA0-WKUP | bidirectional | Port A pin 0, wakeup pin, 5V tolerant, ADC123_IN0, alternate: USART2_CTS, TIM2_CH1_ETR, TIM5_CH1 |
| 24 | PA1 | bidirectional | Port A pin 1, 5V tolerant I/O, ADC123_IN1, alternate: USART2_RTS, ETH_RMII_REF_CLK, TIM5_CH2 |
| 25 | PA2 | bidirectional | Port A pin 2, 5V tolerant I/O, ADC123_IN2, alternate: USART2_TX, TIM5_CH3, TIM9_CH1, ETH_MDIO |
| 26 | PA3 | bidirectional | Port A pin 3, 5V tolerant I/O, ADC123_IN3, alternate: USART2_RX, TIM5_CH4, TIM9_CH2, OTG_HS_ULPI_D0 |
| 27 | VSS | power_in | Ground (return path for internal logic) |
| 28 | VDD | power_in | Main supply voltage (1.8-3.6V for digital core and I/O) |
| 29 | PA4 | bidirectional | Port A pin 4, 3.3V tolerant I/O, ADC12_IN4, DAC_OUT1, alternate: SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, OTG_HS_SOF |
| 30 | PA5 | bidirectional | Port A pin 5, 3.3V tolerant I/O, ADC12_IN5, DAC_OUT2, alternate: SPI1_SCK, OTG_HS_ULPI_CK, TIM8_CH1N |
| 31 | PA6 | bidirectional | Port A pin 6, 5V tolerant I/O, ADC12_IN6, alternate: SPI1_MISO, TIM8_BKIN, TIM13_CH1, DCMI_PIXCLK, TIM3_CH1 |
| 32 | PA7 | bidirectional | Port A pin 7, 5V tolerant I/O, ADC12_IN7, alternate: SPI1_MOSI, TIM8_CH1N, TIM14_CH1, TIM3_CH2, ETH_MII_RX_DV |
| 33 | PC4 | bidirectional | Port C pin 4, 5V tolerant I/O, ADC12_IN14, alternate: ETH_RMII_RXD0, ETH_MII_RXD0 |
| 34 | PC5 | bidirectional | Port C pin 5, 5V tolerant I/O, ADC12_IN15, alternate: ETH_RMII_RXD1, ETH_MII_RXD1 |
| 35 | PB0 | bidirectional | Port B pin 0, 5V tolerant I/O, ADC12_IN8, alternate: TIM3_CH3, TIM8_CH2N, OTG_HS_ULPI_D1, ETH_MII_RXD2, TIM1_CH2N |
| 36 | PB1 | bidirectional | Port B pin 1, 5V tolerant I/O, ADC12_IN9, alternate: TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, ETH_MII_RXD3, TIM1_CH3N |
| 37 | PB2 | bidirectional | Port B pin 2, 5V tolerant I/O, BOOT1 function |
| 38 | PE7 | bidirectional | Port E pin 7, 5V tolerant I/O, alternate: FSMC_D4, TIM1_ETR |
| 39 | PE8 | bidirectional | Port E pin 8, 5V tolerant I/O, alternate: FSMC_D5, TIM1_CH1N |
| 40 | PE9 | bidirectional | Port E pin 9, 5V tolerant I/O, alternate: FSMC_D6, TIM1_CH1 |
| 41 | PE10 | bidirectional | Port E pin 10, 5V tolerant I/O, alternate: FSMC_D7, TIM1_CH2N |
| 42 | PE11 | bidirectional | Port E pin 11, 5V tolerant I/O, alternate: FSMC_D8, TIM1_CH2 |
| 43 | PE12 | bidirectional | Port E pin 12, 5V tolerant I/O, alternate: FSMC_D9, TIM1_CH3N |
| 44 | PE13 | bidirectional | Port E pin 13, 5V tolerant I/O, alternate: FSMC_D10, TIM1_CH3 |
| 45 | PE14 | bidirectional | Port E pin 14, 5V tolerant I/O, alternate: FSMC_D11, TIM1_CH4 |
| 46 | PE15 | bidirectional | Port E pin 15, 5V tolerant I/O, alternate: FSMC_D12, TIM1_BKIN |
| 47 | PB10 | bidirectional | Port B pin 10, 5V tolerant I/O, alternate: SPI2_SCK, I2S2_SCK, I2C2_SCL, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, TIM2_CH3 |
| 48 | PB11 | bidirectional | Port B pin 11, 5V tolerant I/O, alternate: I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_RMII_TX_EN, ETH_MII_TX_EN, TIM2_CH4 |
| 49 | VCAP_1 | passive | Decoupling capacitor pin for PLL (2.2µF ceramic capacitor required) |
| 50 | VDD | power_in | Main supply voltage (1.8-3.6V for digital core and I/O) |
| 51 | PB12 | bidirectional | Port B pin 12, 5V tolerant I/O, alternate: SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, OTG_HS_ULPI_D5, ETH_RMII_TXD0, OTG_HS_ID |
| 52 | PB13 | bidirectional | Port B pin 13, 5V tolerant I/O, OTG_HS_VBUS sense, alternate: SPI2_SCK, I2S2_SCK, USART3_CTS, TIM1_CH1N, CAN2_TX, OTG_HS_ULPI_D6, ETH_RMII_TXD1 |
| 53 | PB14 | bidirectional | Port B pin 14, 5V tolerant I/O, OTG_HS_DM, alternate: SPI2_MISO, TIM1_CH2N, TIM12_CH1, USART3_RTS, TIM8_CH2N |
| 54 | PB15 | bidirectional | Port B pin 15, 5V tolerant I/O, OTG_HS_DP, RTC_50Hz output, alternate: SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM8_CH3N, TIM12_CH2 |
| 55 | PD8 | bidirectional | Port D pin 8, 5V tolerant I/O, alternate: FSMC_D13, USART3_TX |
| 56 | PD9 | bidirectional | Port D pin 9, 5V tolerant I/O, alternate: FSMC_D14, USART3_RX |
| 57 | PD10 | bidirectional | Port D pin 10, 5V tolerant I/O, alternate: FSMC_D15, USART3_CK |
| 58 | PD11 | bidirectional | Port D pin 11, 5V tolerant I/O, alternate: FSMC_A16, USART3_CTS |
| 59 | PD12 | bidirectional | Port D pin 12, 5V tolerant I/O, alternate: FSMC_A17, TIM4_CH1, USART3_RTS |
| 60 | PD13 | bidirectional | Port D pin 13, 5V tolerant I/O, alternate: FSMC_A18, TIM4_CH2 |
| 61 | PD14 | bidirectional | Port D pin 14, 5V tolerant I/O, alternate: FSMC_D0, TIM4_CH3 |
| 62 | PD15 | bidirectional | Port D pin 15, 5V tolerant I/O, alternate: FSMC_D1, TIM4_CH4 |
| 63 | PC6 | bidirectional | Port C pin 6, 5V tolerant I/O, alternate: I2S2_MCK, TIM8_CH1, SDIO_D6, USART6_TX, DCMI_D0, TIM3_CH1 |
| 64 | PC7 | bidirectional | Port C pin 7, 5V tolerant I/O, alternate: I2S3_MCK, TIM8_CH2, SDIO_D7, USART6_RX, DCMI_D1, TIM3_CH2 |
| 65 | PC8 | bidirectional | Port C pin 8, 5V tolerant I/O, alternate: TIM8_CH3, SDIO_D0, TIM3_CH3, USART6_CK, DCMI_D2 |
| 66 | PC9 | bidirectional | Port C pin 9, 5V tolerant I/O, MCO2 output, alternate: I2S2_CKIN, I2S3_CKIN, TIM8_CH4, SDIO_D1, I2C3_SDA, DCMI_D3, TIM3_CH4 |
| 67 | PA8 | bidirectional | Port A pin 8, 5V tolerant I/O, MCO1 output, alternate: USART1_CK, TIM1_CH1, I2C3_SCL, OTG_FS_SOF |
| 68 | PA9 | bidirectional | Port A pin 9, 5V tolerant I/O, OTG_FS_VBUS sense, alternate: USART1_TX, TIM1_CH2, I2C3_SMBA, DCMI_D0 |
| 69 | PA10 | bidirectional | Port A pin 10, 5V tolerant I/O, alternate: USART1_RX, TIM1_CH3, OTG_FS_ID, DCMI_D1 |
| 70 | PA11 | bidirectional | Port A pin 11, 5V tolerant I/O, OTG_FS_DM, alternate: USART1_CTS, CAN1_RX, TIM1_CH4 |
| 71 | PA12 | bidirectional | Port A pin 12, 5V tolerant I/O, OTG_FS_DP, alternate: USART1_RTS, CAN1_TX, TIM1_ETR |
| 72 | PA13 | bidirectional | Port A pin 13, JTMS-SWDIO (debug), 5V tolerant I/O, alternate: JTMS-SWDIO |
| 73 | VCAP_2 | passive | Decoupling capacitor pin for main regulator (2.2µF ceramic capacitor required) |
| 74 | VSS | power_in | Ground (return path for internal logic) |
| 75 | VDD | power_in | Main supply voltage (1.8-3.6V for digital core and I/O) |
| 76 | PA14 | bidirectional | Port A pin 14, JTCK-SWCLK (debug), 5V tolerant I/O, alternate: JTCK-SWCLK |
| 77 | PA15 | bidirectional | Port A pin 15, JTDI (debug), 5V tolerant I/O, alternate: JTDI, SPI3_NSS, I2S3_WS, TIM2_CH1_ETR, SPI1_NSS |
| 78 | PC10 | bidirectional | Port C pin 10, 5V tolerant I/O, alternate: SPI3_SCK, I2S3_SCK, UART4_TX, SDIO_D2, DCMI_D8, USART3_TX |
| 79 | PC11 | bidirectional | Port C pin 11, 5V tolerant I/O, alternate: UART4_RX, SPI3_MISO, SDIO_D3, DCMI_D4, USART3_RX |
| 80 | PC12 | bidirectional | Port C pin 12, 5V tolerant I/O, alternate: UART5_TX, SDIO_CK, DCMI_D9, SPI3_MOSI, I2S3_SD, USART3_CK |
| 81 | PD0 | bidirectional | Port D pin 0, 5V tolerant I/O, alternate: FSMC_D2, CAN1_RX |
| 82 | PD1 | bidirectional | Port D pin 1, 5V tolerant I/O, alternate: FSMC_D3, CAN1_TX |
| 83 | PD2 | bidirectional | Port D pin 2, 5V tolerant I/O, alternate: TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11 |
| 84 | PD3 | bidirectional | Port D pin 3, 5V tolerant I/O, alternate: FSMC_CLK, USART2_CTS |
| 85 | PD4 | bidirectional | Port D pin 4, 5V tolerant I/O, alternate: FSMC_NOE, USART2_RTS |
| 86 | PD5 | bidirectional | Port D pin 5, 5V tolerant I/O, alternate: FSMC_NWE, USART2_TX |
| 87 | PD6 | bidirectional | Port D pin 6, 5V tolerant I/O, alternate: FSMC_NWAIT, USART2_RX |
| 88 | PD7 | bidirectional | Port D pin 7, 5V tolerant I/O, alternate: USART2_CK, FSMC_NE1, FSMC_NCE2 |
| 89 | PB3 | bidirectional | Port B pin 3, JTDO/TRACESWO (debug), 5V tolerant I/O, alternate: JTDO/TRACESWO, SPI3_SCK, I2S3_SCK, TIM2_CH2, SPI1_SCK |
| 90 | PB4 | bidirectional | Port B pin 4, NJTRST (debug), 5V tolerant I/O, alternate: NJTRST, SPI3_MISO, TIM3_CH1, SPI1_MISO |
| 91 | PB5 | bidirectional | Port B pin 5, 5V tolerant I/O, alternate: I2C1_SMBA, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, TIM3_CH2, SPI1_MOSI, SPI3_MOSI, DCMI_D10 |
| 92 | PB6 | bidirectional | Port B pin 6, 5V tolerant I/O, alternate: I2C1_SCL, TIM4_CH1, CAN2_TX, DCMI_D5, USART1_TX |
| 93 | PB7 | bidirectional | Port B pin 7, 5V tolerant I/O, alternate: I2C1_SDA, FSMC_NL, DCMI_VSYNC, USART1_RX, TIM4_CH2 |
| 94 | BOOT0 | input | Boot mode selection pin (0=flash boot, 1=system memory boot), VPP for Flash programming |
| 95 | PB8 | bidirectional | Port B pin 8, 5V tolerant I/O, alternate: TIM4_CH3, SDIO_D4, TIM10_CH1, DCMI_D6, ETH_MII_TXD3, I2C1_SCL, CAN1_RX |
| 96 | PB9 | bidirectional | Port B pin 9, 5V tolerant I/O, alternate: SPI2_NSS, I2S2_WS, TIM4_CH4, TIM11_CH1, SDIO_D5, DCMI_D7, I2C1_SDA, CAN1_TX |
| 97 | PE0 | bidirectional | Port E pin 0, 5V tolerant I/O, alternate: TIM4_ETR, FSMC_NBL0, DCMI_D2 |
| 98 | PE1 | bidirectional | Port E pin 1, 5V tolerant I/O, alternate: FSMC_NBL1, DCMI_D3 |
| 99 | RFU | unconnected | Reserved for future use, can be tied to VDD, VSS, or left unconnected |
| 100 | VDD | power_in | Main supply voltage (1.8-3.6V for digital core and I/O) |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
STM32F207VET6TR - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
stm32f207vet6tr-etched.step/stm32f207vet6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f207vet6tr.step/stm32f207vet6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (181 pp, sha256
774f5ff3acf8fdf5, retrieved 2026-10-06, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).