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Contents

README

markdown

STM32F205RBT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F205RBT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Battery voltage supply pin for the RTC, the 32 kHz oscillator and the backup registers when VDD is not present.
2 PC13-RTC_AF1 bidirectional 5V-tolerant GPIO supplied through the internal power switch (limited to 3 mA, max 2 MHz/30 pF in output mode) with RTC_AF1 and EVENTOUT alternate functions.
3 PC14-OSC32_IN bidirectional 5V-tolerant GPIO supplied through the power switch, alternatively usable as OSC32_IN for the 32.768 kHz RTC crystal oscillator input, with EVENTOUT alternate function.
4 PC15-OSC32_OUT bidirectional 5V-tolerant GPIO supplied through the power switch, alternatively usable as OSC32_OUT for the 32.768 kHz RTC crystal oscillator output, with EVENTOUT alternate function.
5 PH0-OSC_IN bidirectional 5V-tolerant GPIO, alternatively usable as OSC_IN for the 4-26 MHz high-speed external crystal oscillator input, with EVENTOUT alternate function.
6 PH1-OSC_OUT bidirectional 5V-tolerant GPIO, alternatively usable as OSC_OUT for the 4-26 MHz high-speed external crystal oscillator output, with EVENTOUT alternate function.
7 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor; driving it low resets the device.
8 PC0 bidirectional 5V-tolerant GPIO with alternate function OTG_HS_ULPI_STP and additional function ADC123_IN10, plus EVENTOUT.
9 PC1 bidirectional 5V-tolerant GPIO with alternate function ETH_MDC and additional function ADC123_IN11, plus EVENTOUT.
10 PC2 bidirectional 5V-tolerant GPIO with alternate functions SPI2_MISO, OTG_HS_ULPI_DIR, ETH_MII_TXD2 and additional function ADC123_IN12, plus EVENTOUT.
11 PC3 bidirectional 5V-tolerant GPIO with alternate functions SPI2_MOSI, I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK and additional function ADC123_IN13, plus EVENTOUT.
12 VSSA power_in Analog ground supply pin.
13 VDDA power_in Analog power supply pin.
14 PA0-WKUP bidirectional 5V-tolerant GPIO with alternate functions USART2_CTS, UART4_TX, ETH_MII_CRS, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR and additional functions ADC123_IN0/WKUP, plus EVENTOUT.
15 PA1 bidirectional 5V-tolerant GPIO with alternate functions USART2_RTS, UART4_RX, ETH_RMII_REF_CLK, ETH_MII_RX_CLK, TIM5_CH2, TIM2_CH2 and additional function ADC123_IN1, plus EVENTOUT.
16 PA2 bidirectional 5V-tolerant GPIO with alternate functions USART2_TX, TIM5_CH3, TIM9_CH1, TIM2_CH3, ETH_MDIO and additional function ADC123_IN2, plus EVENTOUT.
17 PA3 bidirectional 5V-tolerant GPIO with alternate functions USART2_RX, TIM5_CH4, TIM9_CH2, TIM2_CH4, OTG_HS_ULPI_D0, ETH_MII_COL and additional function ADC123_IN3, plus EVENTOUT.
18 VSS power_in Ground supply pin.
19 VDD power_in Digital power supply pin (1.8 to 3.6 V application supply).
20 PA4 bidirectional 3.3V-tolerant (TTa) GPIO with alternate functions SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, OTG_HS_SOF, I2S3_WS and additional functions ADC12_IN4/DAC_OUT1, plus EVENTOUT.
21 PA5 bidirectional 3.3V-tolerant (TTa) GPIO with alternate functions SPI1_SCK, OTG_HS_ULPI_CK, TIM2_CH1_ETR, TIM8_CH1N and additional functions ADC12_IN5/DAC_OUT2, plus EVENTOUT.
22 PA6 bidirectional 5V-tolerant GPIO with alternate functions SPI1_MISO, TIM8_BKIN, TIM13_CH1, DCMI_PIXCLK, TIM3_CH1, TIM1_BKIN and additional function ADC12_IN6, plus EVENTOUT.
23 PA7 bidirectional 5V-tolerant GPIO with alternate functions SPI1_MOSI, TIM8_CH1N, TIM14_CH1, TIM3_CH2, ETH_MII_RX_DV, TIM1_CH1N, ETH_RMII_CRS_DV and additional function ADC12_IN7, plus EVENTOUT.
24 PC4 bidirectional 5V-tolerant GPIO with alternate functions ETH_RMII_RXD0, ETH_MII_RXD0 and additional function ADC12_IN14, plus EVENTOUT.
25 PC5 bidirectional 5V-tolerant GPIO with alternate functions ETH_RMII_RXD1, ETH_MII_RXD1 and additional function ADC12_IN15, plus EVENTOUT.
26 PB0 bidirectional 5V-tolerant GPIO with alternate functions TIM3_CH3, TIM8_CH2N, OTG_HS_ULPI_D1, ETH_MII_RXD2, TIM1_CH2N and additional function ADC12_IN8, plus EVENTOUT.
27 PB1 bidirectional 5V-tolerant GPIO with alternate functions TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, ETH_MII_RXD3, TIM1_CH3N and additional function ADC12_IN9, plus EVENTOUT.
28 PB2/BOOT1 bidirectional 5V-tolerant GPIO also usable as BOOT1 boot-mode selection pin, with EVENTOUT alternate function.
29 PB10 bidirectional 5V-tolerant GPIO with alternate functions SPI2_SCK, I2S2_SCK, I2C2_SCL, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, TIM2_CH3, plus EVENTOUT.
30 PB11 bidirectional 5V-tolerant GPIO with alternate functions I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_RMII_TX_EN, ETH_MII_TX_EN, TIM2_CH4, plus EVENTOUT.
31 VCAP_1 power_out Internal voltage regulator output pin, to be connected to an external 2.2 µF decoupling capacitor.
32 VDD power_in Digital power supply pin (1.8 to 3.6 V application supply).
33 PB12 bidirectional 5V-tolerant GPIO with alternate functions SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, OTG_HS_ULPI_D5, ETH_RMII_TXD0, ETH_MII_TXD0, OTG_HS_ID, plus EVENTOUT.
34 PB13 bidirectional 5V-tolerant GPIO with alternate functions SPI2_SCK, I2S2_SCK, USART3_CTS, TIM1_CH1N, CAN2_TX, OTG_HS_ULPI_D6, ETH_RMII_TXD1, ETH_MII_TXD1 and additional function OTG_HS_VBUS, plus EVENTOUT.
35 PB14 bidirectional 5V-tolerant GPIO with alternate functions SPI2_MISO, TIM1_CH2N, TIM12_CH1, OTG_HS_DM, USART3_RTS, TIM8_CH2N, plus EVENTOUT.
36 PB15 bidirectional 5V-tolerant GPIO with alternate functions SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, OTG_HS_DP, RTC_50Hz, plus EVENTOUT.
37 PC6 bidirectional 5V-tolerant GPIO with alternate functions I2S2_MCK, TIM8_CH1, SDIO_D6, USART6_TX, DCMI_D0, TIM3_CH1, plus EVENTOUT.
38 PC7 bidirectional 5V-tolerant GPIO with alternate functions I2S3_MCK, TIM8_CH2, SDIO_D7, USART6_RX, DCMI_D1, TIM3_CH2, plus EVENTOUT.
39 PC8 bidirectional 5V-tolerant GPIO with alternate functions TIM8_CH3, SDIO_D0, TIM3_CH3, USART6_CK, DCMI_D2, plus EVENTOUT.
40 PC9 bidirectional 5V-tolerant GPIO with alternate functions I2S2_CKIN, I2S3_CKIN, MCO2, TIM8_CH4, SDIO_D1, I2C3_SDA, DCMI_D3, TIM3_CH4, plus EVENTOUT.
41 PA8 bidirectional 5V-tolerant GPIO with alternate functions MCO1, USART1_CK, TIM1_CH1, I2C3_SCL, OTG_FS_SOF, plus EVENTOUT.
42 PA9 bidirectional 5V-tolerant GPIO with alternate functions USART1_TX, TIM1_CH2, I2C3_SMBA, DCMI_D0 and additional function OTG_FS_VBUS, plus EVENTOUT.
43 PA10 bidirectional 5V-tolerant GPIO with alternate functions USART1_RX, TIM1_CH3, OTG_FS_ID, DCMI_D1, plus EVENTOUT.
44 PA11 bidirectional 5V-tolerant GPIO with alternate functions USART1_CTS, CAN1_RX, TIM1_CH4, OTG_FS_DM, plus EVENTOUT.
45 PA12 bidirectional 5V-tolerant GPIO with alternate functions USART1_RTS, CAN1_TX, TIM1_ETR, OTG_FS_DP, plus EVENTOUT.
46 PA13 bidirectional 5V-tolerant GPIO that defaults to the JTMS-SWDIO debug function after reset, with EVENTOUT alternate function.
47 VCAP_2 power_out Internal voltage regulator output pin, to be connected to an external 2.2 µF decoupling capacitor.
48 VDD power_in Digital power supply pin (1.8 to 3.6 V application supply).
49 PA14 bidirectional 5V-tolerant GPIO that defaults to the JTCK-SWCLK debug function after reset, with EVENTOUT alternate function.
50 PA15 bidirectional 5V-tolerant GPIO that defaults to the JTDI debug function after reset, with alternate functions SPI3_NSS, I2S3_WS, TIM2_CH1_ETR, SPI1_NSS, plus EVENTOUT.
51 PC10 bidirectional 5V-tolerant GPIO with alternate functions SPI3_SCK, I2S3_SCK, UART4_TX, SDIO_D2, DCMI_D8, USART3_TX, plus EVENTOUT.
52 PC11 bidirectional 5V-tolerant GPIO with alternate functions UART4_RX, SPI3_MISO, SDIO_D3, DCMI_D4, USART3_RX, plus EVENTOUT.
53 PC12 bidirectional 5V-tolerant GPIO with alternate functions UART5_TX, SDIO_CK, DCMI_D9, SPI3_MOSI, I2S3_SD, USART3_CK, plus EVENTOUT.
54 PD2 bidirectional 5V-tolerant GPIO with alternate functions TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11, plus EVENTOUT.
55 PB3 bidirectional 5V-tolerant GPIO that defaults to the JTDO/TRACESWO debug function after reset, with alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK, I2S3_SCK, plus EVENTOUT.
56 PB4 bidirectional 5V-tolerant GPIO that defaults to the NJTRST debug function after reset, with alternate functions SPI3_MISO, TIM3_CH1, SPI1_MISO, plus EVENTOUT.
57 PB5 bidirectional 5V-tolerant GPIO with alternate functions I2C1_SMBA, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, TIM3_CH2, SPI1_MOSI, SPI3_MOSI, DCMI_D10, I2S3_SD, plus EVENTOUT.
58 PB6 bidirectional 5V-tolerant GPIO with alternate functions I2C1_SCL, TIM4_CH1, CAN2_TX, DCMI_D5, USART1_TX, plus EVENTOUT.
59 PB7 bidirectional 5V-tolerant GPIO with alternate functions I2C1_SDA, FSMC_NL (also named FSMC_NADV), DCMI_VSYNC, USART1_RX, TIM4_CH2, plus EVENTOUT.
60 BOOT0 input Dedicated input-only boot-mode selection pin (also marked VPP) sampled at reset to select the boot memory source.
61 PB8 bidirectional 5V-tolerant GPIO with alternate functions TIM4_CH3, SDIO_D4, TIM10_CH1, DCMI_D6, ETH_MII_TXD3, I2C1_SCL, CAN1_RX, plus EVENTOUT.
62 PB9 bidirectional 5V-tolerant GPIO with alternate functions SPI2_NSS, I2S2_WS, TIM4_CH4, TIM11_CH1, SDIO_D5, DCMI_D7, I2C1_SDA, CAN1_TX, plus EVENTOUT.
63 VSS power_in Ground supply pin.
64 VDD power_in Digital power supply pin (1.8 to 3.6 V application supply).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F205RBT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f205rbt6-etched.step / stm32f205rbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f205rbt6.step / stm32f205rbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (178 pp, sha256 39f1332cfc0252f9, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF