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STM32F107RCT6

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by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f107rct6factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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STM32F107RCT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F107RCT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup battery supply voltage (1.8 to 3.6 V) for RTC and backup registers
2 PC13-TAMPER-RTC bidirectional Port C pin 13: GPIO or TAMPER/RTC input (limited to 2 MHz output mode with max 30 pF load)
3 PC14-OSC32_IN input Port C pin 14: 32 kHz oscillator input (limited to 2 MHz output mode with max 30 pF load)
4 PC15-OSC32_OUT output Port C pin 15: 32 kHz oscillator output (limited to 2 MHz output mode with max 30 pF load)
5 OSC_IN input High-speed external oscillator input (3 to 25 MHz) or PD0 remapped
6 OSC_OUT output High-speed external oscillator output or PD1 remapped
7 NRST input Active-low external reset input with internal pull-up and 100ns filtering
8 PC0 bidirectional Port C pin 0: GPIO, ADC12_IN10 analog input channel
9 PC1 bidirectional Port C pin 1: GPIO, ADC12_IN11 or ETH_MII/RMII_MDC alternate function
10 PC2 bidirectional Port C pin 2: GPIO, ADC12_IN12 or ETH_MII_TXD2 alternate function
11 PC3 bidirectional Port C pin 3: GPIO, ADC12_IN13 or ETH_MII_TX_CLK alternate function
12 VSSA power_in Analog ground supply (connected to VSS and must be below 50 mV from main VSS)
13 VDDA power_in Analog power supply (2.4 to 3.6 V for ADC use, 2.0 to 3.6 V without ADC)
14 PA0-WKUP bidirectional Port A pin 0: GPIO, wakeup input, USART2_CTS, ADC12_IN0, TIM2_CH1_ETR, TIM5_CH1
15 PA1 bidirectional Port A pin 1: GPIO, USART2_RTS, ADC12_IN1, TIM2_CH2, TIM5_CH2 or ETH interface alternate
16 PA2 bidirectional Port A pin 2: GPIO, USART2_TX, ADC12_IN2, TIM2_CH3, TIM5_CH3 or ETH_MDIO alternate
17 PA3 bidirectional Port A pin 3: GPIO, USART2_RX, ADC12_IN3, TIM2_CH4, TIM5_CH4 or ETH_MII_COL alternate
18 VSS_4 power_in Ground supply (referenced to all other VSS pins, max 50 mV variation)
19 VDD_4 power_in Power supply (2.0 to 3.6 V) for I/O and internal logic
20 PA4 bidirectional Port A pin 4: GPIO, SPI1_NSS, DAC_OUT1, USART2_CK or SPI3_NSS/I2S3_WS remap
21 PA5 bidirectional Port A pin 5: GPIO, SPI1_SCK, DAC_OUT2, ADC12_IN5
22 PA6 bidirectional Port A pin 6: GPIO, SPI1_MISO, ADC12_IN6, TIM3_CH1 or TIM1_BKIN remap
23 PA7 bidirectional Port A pin 7: GPIO, SPI1_MOSI, ADC12_IN7, TIM3_CH2 or TIM1_CH1N/ETH_MII_RX_DV remap
24 PC4 bidirectional Port C pin 4: GPIO, ADC12_IN14 or ETH_MII_RXD0/ETH_RMII_RXD0 alternate
25 PC5 bidirectional Port C pin 5: GPIO, ADC12_IN15 or ETH_MII_RXD1/ETH_RMII_RXD1 alternate
26 PB0 bidirectional Port B pin 0: GPIO, ADC12_IN8, TIM3_CH3 or TIM1_CH2N remap
27 PB1 bidirectional Port B pin 1: GPIO, ADC12_IN9, TIM3_CH4 or TIM1_CH3N remap
28 PB2 bidirectional Port B pin 2: BOOT1 pin for boot selection
29 PB10 bidirectional Port B pin 10: GPIO, I2C2_SCL, USART3_TX, TIM2_CH3 or ETH_MII_RX_ER remap
30 PB11 bidirectional Port B pin 11: GPIO, I2C2_SDA, USART3_RX, TIM2_CH4 or ETH_MII_TX_EN/ETH_RMII_TX_EN
31 VSS_1 power_in Ground supply (referenced to all other VSS pins, max 50 mV variation)
32 VDD_1 power_in Power supply (2.0 to 3.6 V) for I/O and internal logic
33 PB12 bidirectional Port B pin 12: GPIO, SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX or ETH alternate
34 PB13 bidirectional Port B pin 13: GPIO, SPI2_SCK, I2S2_CK, USART3_CTS, TIM1_CH1N, CAN2_TX or ETH alternate
35 PB14 bidirectional Port B pin 14: GPIO, SPI2_MISO, TIM1_CH2N, USART3_RTS alternate function
36 PB15 bidirectional Port B pin 15: GPIO, SPI2_MOSI, I2S2_SD, TIM1_CH3N or other alternates
37 PC6 bidirectional Port C pin 6: GPIO, I2S2_MCK, TIM3_CH1 alternate function
38 PC7 bidirectional Port C pin 7: GPIO, I2S3_MCK, TIM3_CH2 alternate function
39 PC8 bidirectional Port C pin 8: GPIO, TIM3_CH3 alternate function
40 PC9 bidirectional Port C pin 9: GPIO, TIM3_CH4 alternate function
41 PA8 bidirectional Port A pin 8: GPIO, USART1_CK, OTG_FS_SOF, TIM1_CH1, MCO main clock output
42 PA9 bidirectional Port A pin 9: GPIO, USART1_TX, TIM1_CH2, OTG_FS_VBUS alternate
43 PA10 bidirectional Port A pin 10: GPIO, USART1_RX, TIM1_CH3, OTG_FS_ID alternate function
44 PA11 bidirectional Port A pin 11: GPIO, USART1_CTS, CAN1_RX, TIM1_CH4, OTG_FS_DM
45 PA12 bidirectional Port A pin 12: GPIO, USART1_RTS, OTG_FS_DP, CAN1_TX, TIM1_ETR alternate
46 PA13 bidirectional Port A pin 13: JTMS/SWDIO debug pin (JTAG/SWD interface)
47 VSS_2 power_in Ground supply (referenced to all other VSS pins, max 50 mV variation)
48 VDD_2 power_in Power supply (2.0 to 3.6 V) for I/O and internal logic
49 PA14 bidirectional Port A pin 14: JTCK/SWCLK debug pin (JTAG/SWD interface)
50 PA15 bidirectional Port A pin 15: JTDI debug pin, SPI3_NSS, I2S3_WS, TIM2_CH1_ETR or SPI1_NSS remap
51 PC10 bidirectional Port C pin 10: GPIO, UART4_TX, USART3_TX, SPI3_SCK, I2S3_CK alternate
52 PC11 bidirectional Port C pin 11: GPIO, UART4_RX, USART3_RX, SPI3_MISO alternate function
53 PC12 bidirectional Port C pin 12: GPIO, UART5_TX, USART3_CK, SPI3_MOSI, I2S3_SD alternate
54 PD2 bidirectional Port D pin 2: GPIO, TIM3_ETR, UART5_RX alternate function
55 PB3 bidirectional Port B pin 3: JTDO debug pin, SPI3_SCK, I2S3_CK, TRACESWO, TIM2_CH2 or SPI1_SCK remap
56 PB4 bidirectional Port B pin 4: NJTRST debug pin, SPI3_MISO, TIM3_CH1 or SPI1_MISO remap
57 PB5 bidirectional Port B pin 5: GPIO, I2C1_SMBA, SPI3_MOSI, I2S3_SD, ETH_MII_PPS_OUT, TIM3_CH2 or other alternates
58 PB6 bidirectional Port B pin 6: GPIO, I2C1_SCL, TIM4_CH1, USART1_TX, CAN2_TX alternate
59 PB7 bidirectional Port B pin 7: GPIO, I2C1_SDA, TIM4_CH2, USART1_RX alternate function
60 BOOT0 input Boot selection input pin (sampled at reset): 0=Flash, 1=System Memory
61 PB8 bidirectional Port B pin 8: GPIO, TIM4_CH3, ETH_MII_TXD3, I2C1_SCL, CAN1_RX alternate
62 PB9 bidirectional Port B pin 9: GPIO, TIM4_CH4, I2C1_SDA, CAN1_TX alternate function
63 VSS_3 power_in Ground supply (referenced to all other VSS pins, max 50 mV variation)
64 VDD_3 power_in Power supply (2.0 to 3.6 V) for I/O and internal logic

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F107RCT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f107rct6-etched.step / stm32f107rct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f107rct6.step / stm32f107rct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (103 pp, sha256 de6789e4bf233926, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF