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STM32F105VCT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f105vct6factory-2.0.0extractor-text
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Symbol & Footprint

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Contents

README

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STM32F105VCT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F105VCT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional General-purpose I/O port E pin 2, alternate function TRACECK for embedded trace macrocell clock output.
2 PE3 bidirectional General-purpose I/O port E pin 3, alternate function TRACED0 for trace data output bit 0.
3 PE4 bidirectional General-purpose I/O port E pin 4, alternate function TRACED1 for trace data output bit 1.
4 PE5 bidirectional General-purpose I/O port E pin 5, alternate function TRACED2 for trace data output bit 2.
5 PE6 bidirectional General-purpose I/O port E pin 6, alternate function TRACED3 for trace data output bit 3.
6 VBAT power_in Backup battery supply voltage input 1.8 to 3.6 V for real-time clock and backup registers.
7 PC13-TAMPER-RTC bidirectional General-purpose I/O port C pin 13, alternate function TAMPER-RTC for RTC tamper detection input.
8 PC14-OSC32_IN bidirectional General-purpose I/O port C pin 14, alternate function OSC32_IN for 32 kHz oscillator input from backup domain.
9 PC15-OSC32_OUT bidirectional General-purpose I/O port C pin 15, alternate function OSC32_OUT for 32 kHz oscillator output from backup domain.
10 VSS_5 power_in Ground (VSS) connection point 5 for digital ground at 0 V.
11 VDD_5 power_in Main supply voltage connection point 5 at 2.0 to 3.6 V for core and I/O.
12 OSC_IN input High-speed external oscillator input for 3 to 25 MHz crystal/resonator with 45-55% duty cycle.
13 OSC_OUT output High-speed external oscillator output feedback pin for crystal oscillator circuit.
14 NRST input System reset input pin with internal 40-50 kΩ pull-up and 100 ns filtering at VDD above 2.7 V.
15 PC0 bidirectional General-purpose I/O port C pin 0, alternate function ADC12_IN10 for analog input channel 10.
16 PC1 bidirectional General-purpose I/O port C pin 1, alternate functions ADC12_IN11, ETH_MII_MDC, or ETH_RMII_MDC for Ethernet management data clock.
17 PC2 bidirectional General-purpose I/O port C pin 2, alternate functions ADC12_IN12 or ETH_MII_TXD2 for Ethernet transmit data bit 2.
18 PC3 bidirectional General-purpose I/O port C pin 3, alternate functions ADC12_IN13 or ETH_MII_TX_CLK for Ethernet transmit clock.
19 VSSA power_in Analog ground reference input at 0 V for ADC and DAC analog circuits.
20 VREF- power_in Negative ADC reference voltage at 0 V (typically tied to VSSA).
21 VREF+ power_in Positive ADC reference voltage input 2.4 to 3.6 V (typically tied to VDDA).
22 VDDA power_in Analog supply voltage input 2.4 to 3.6 V minimum when ADC is used, typically same as VDD.
23 PA0-WKUP bidirectional General-purpose I/O port A pin 0, alternate functions WKUP for standby wakeup, USART2_CTS, ADC12_IN0, TIM2_CH1_ETR, TIM5_CH1, or ETH_MII_CRS.
24 PA1 bidirectional General-purpose I/O port A pin 1, alternate functions USART2_RTS, ADC12_IN1, TIM5_CH2, TIM2_CH2, ETH_MII_RX_CLK, or ETH_RMII_REF_CLK.
25 PA2 bidirectional General-purpose I/O port A pin 2, alternate functions USART2_TX, TIM5_CH3, ADC12_IN2, TIM2_CH3, ETH_MII_MDIO, or ETH_RMII_MDIO.
26 PA3 bidirectional General-purpose I/O port A pin 3, alternate functions USART2_RX, TIM5_CH4, ADC12_IN3, TIM2_CH4, or ETH_MII_COL.
27 VSS_4 power_in Ground (VSS) connection point 4 for digital ground at 0 V.
28 VDD_4 power_in Main supply voltage connection point 4 at 2.0 to 3.6 V for core and I/O.
29 PA4 bidirectional General-purpose I/O port A pin 4, alternate functions SPI1_NSS, DAC_OUT1, USART2_CK, ADC12_IN4, and remappable to SPI3_NSS or I2S3_WS.
30 PA5 bidirectional General-purpose I/O port A pin 5, alternate functions SPI1_SCK, DAC_OUT2, or ADC12_IN5.
31 PA6 bidirectional General-purpose I/O port A pin 6, alternate functions SPI1_MISO, ADC12_IN6, TIM3_CH1, and remappable to TIM1_BKIN.
32 PA7 bidirectional General-purpose I/O port A pin 7, alternate functions SPI1_MOSI, ADC12_IN7, TIM3_CH2, ETH_MII_RX_DV, ETH_RMII_CRS_DV, and remappable to TIM1_CH1N.
33 PC4 bidirectional General-purpose I/O port C pin 4, alternate functions ADC12_IN14, ETH_MII_RXD0, or ETH_RMII_RXD0.
34 PC5 bidirectional General-purpose I/O port C pin 5, alternate functions ADC12_IN15, ETH_MII_RXD1, or ETH_RMII_RXD1.
35 PB0 bidirectional General-purpose I/O port B pin 0, alternate functions ADC12_IN8, TIM3_CH3, ETH_MII_RXD2, and remappable to TIM1_CH2N.
36 PB1 bidirectional General-purpose I/O port B pin 1, alternate functions ADC12_IN9, TIM3_CH4, ETH_MII_RXD3, and remappable to TIM1_CH3N.
37 PB2 bidirectional General-purpose I/O port B pin 2 with BOOT1 function, 5 V tolerant input.
38 PE7 bidirectional General-purpose I/O port E pin 7, 5 V tolerant, alternate function TIM1_ETR for timer external trigger.
39 PE8 bidirectional General-purpose I/O port E pin 8, 5 V tolerant, alternate function TIM1_CH1N for timer 1 complementary channel 1.
40 PE9 bidirectional General-purpose I/O port E pin 9, 5 V tolerant, alternate function TIM1_CH1 for timer 1 channel 1 output.
41 PE10 bidirectional General-purpose I/O port E pin 10, 5 V tolerant, alternate function TIM1_CH2N for timer 1 complementary channel 2.
42 PE11 bidirectional General-purpose I/O port E pin 11, 5 V tolerant, alternate function TIM1_CH2 for timer 1 channel 2 output.
43 PE12 bidirectional General-purpose I/O port E pin 12, 5 V tolerant, alternate function TIM1_CH3N for timer 1 complementary channel 3.
44 PE13 bidirectional General-purpose I/O port E pin 13, 5 V tolerant, alternate function TIM1_CH3 for timer 1 channel 3 output.
45 PE14 bidirectional General-purpose I/O port E pin 14, 5 V tolerant, alternate function TIM1_CH4 for timer 1 channel 4 output.
46 PE15 bidirectional General-purpose I/O port E pin 15, 5 V tolerant, alternate function TIM1_BKIN for timer 1 break input.
47 PB10 bidirectional General-purpose I/O port B pin 10, 5 V tolerant, alternate functions I2C2_SCL, USART3_TX, ETH_MII_RX_ER, and remappable to TIM2_CH3.
48 PB11 bidirectional General-purpose I/O port B pin 11, 5 V tolerant, alternate functions I2C2_SDA, USART3_RX, ETH_MII_TX_EN, ETH_RMII_TX_EN, and remappable to TIM2_CH4.
49 VSS_1 power_in Ground (VSS) connection point 1 for digital ground at 0 V.
50 VDD_1 power_in Main supply voltage connection point 1 at 2.0 to 3.6 V for core and I/O.
51 PB12 bidirectional General-purpose I/O port B pin 12, 5 V tolerant, alternate functions SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, ETH_MII_TXD0, or ETH_RMII_TXD0.
52 PB13 bidirectional General-purpose I/O port B pin 13, 5 V tolerant, alternate functions SPI2_SCK, I2S2_CK, USART3_CTS, TIM1_CH1N, CAN2_TX, ETH_MII_TXD1, or ETH_RMII_TXD1.
53 PB14 bidirectional General-purpose I/O port B pin 14, 5 V tolerant, alternate functions SPI2_MISO, TIM1_CH2N, or USART3_RTS.
54 PB15 bidirectional General-purpose I/O port B pin 15, 5 V tolerant, alternate functions SPI2_MOSI, I2S2_SD, or TIM1_CH3N.
55 PD8 bidirectional General-purpose I/O port D pin 8, 5 V tolerant, remappable alternate functions USART3_TX, ETH_MII_RX_DV, or ETH_RMII_CRS_DV.
56 PD9 bidirectional General-purpose I/O port D pin 9, 5 V tolerant, remappable alternate functions USART3_RX, ETH_MII_RXD0, or ETH_RMII_RXD0.
57 PD10 bidirectional General-purpose I/O port D pin 10, 5 V tolerant, remappable alternate functions USART3_CK, ETH_MII_RXD1, or ETH_RMII_RXD1.
58 PD11 bidirectional General-purpose I/O port D pin 11, 5 V tolerant, remappable alternate functions USART3_CTS or ETH_MII_RXD2.
59 PD12 bidirectional General-purpose I/O port D pin 12, 5 V tolerant, remappable alternate functions TIM4_CH1, USART3_RTS, or ETH_MII_RXD3.
60 PD13 bidirectional General-purpose I/O port D pin 13, 5 V tolerant, remappable alternate function TIM4_CH2.
61 PD14 bidirectional General-purpose I/O port D pin 14, 5 V tolerant, remappable alternate function TIM4_CH3.
62 PD15 bidirectional General-purpose I/O port D pin 15, 5 V tolerant, remappable alternate function TIM4_CH4.
63 PC6 bidirectional General-purpose I/O port C pin 6, 5 V tolerant, alternate functions I2S2_MCK for I2S2 master clock or TIM3_CH1.
64 PC7 bidirectional General-purpose I/O port C pin 7, 5 V tolerant, alternate functions I2S3_MCK or remappable to TIM3_CH2.
65 PC8 bidirectional General-purpose I/O port C pin 8, 5 V tolerant, remappable alternate function TIM3_CH3.
66 PC9 bidirectional General-purpose I/O port C pin 9, 5 V tolerant, remappable alternate function TIM3_CH4.
67 PA8 bidirectional General-purpose I/O port A pin 8, 5 V tolerant, alternate functions USART1_CK, OTG_FS_SOF, TIM1_CH1, or MCO for main clock output.
68 PA9 bidirectional General-purpose I/O port A pin 9, 5 V tolerant, alternate functions USART1_TX, TIM1_CH2, or OTG_FS_VBUS.
69 PA10 bidirectional General-purpose I/O port A pin 10, 5 V tolerant, alternate functions USART1_RX, TIM1_CH3, or OTG_FS_ID.
70 PA11 bidirectional General-purpose I/O port A pin 11, 5 V tolerant, alternate functions USART1_CTS, CAN1_RX, TIM1_CH4, or OTG_FS_DM.
71 PA12 bidirectional General-purpose I/O port A pin 12, 5 V tolerant, alternate functions USART1_RTS, OTG_FS_DP, CAN1_TX, or TIM1_ETR.
72 PA13 bidirectional JTAG/SWD debug interface pin JTMS-SWDIO, 5 V tolerant, remappable to PA13 GPIO function.
73 NC unconnected Not connected pin; may be internally floating or capacitively coupled.
74 VSS_2 power_in Ground (VSS) connection point 2 for digital ground at 0 V.
75 VDD_2 power_in Main supply voltage connection point 2 at 2.0 to 3.6 V for core and I/O.
76 PA14 bidirectional JTAG/SWD debug interface pin JTCK-SWCLK, 5 V tolerant, remappable to PA14 GPIO function.
77 PA15 bidirectional JTAG/SWD debug interface pin JTDI, 5 V tolerant, alternate functions SPI3_NSS or I2S3_WS, and remappable to TIM2_CH1_ETR or SPI1_NSS.
78 PC10 bidirectional General-purpose I/O port C pin 10, 5 V tolerant, alternate functions UART4_TX or remappable to USART3_TX, SPI3_SCK, or I2S3_CK.
79 PC11 bidirectional General-purpose I/O port C pin 11, 5 V tolerant, alternate functions UART4_RX or remappable to USART3_RX or SPI3_MISO.
80 PC12 bidirectional General-purpose I/O port C pin 12, 5 V tolerant, alternate functions UART5_TX or remappable to USART3_CK, SPI3_MOSI, or I2S3_SD.
81 PD0 bidirectional General-purpose I/O port D pin 0, 5 V tolerant, remappable alternate functions OSC_IN or CAN1_RX.
82 PD1 bidirectional General-purpose I/O port D pin 1, 5 V tolerant, remappable alternate functions OSC_OUT or CAN1_TX.
83 PD2 bidirectional General-purpose I/O port D pin 2, 5 V tolerant, alternate functions TIM3_ETR or UART5_RX.
84 PD3 bidirectional General-purpose I/O port D pin 3, 5 V tolerant, remappable alternate function USART2_CTS.
85 PD4 bidirectional General-purpose I/O port D pin 4, 5 V tolerant, remappable alternate function USART2_RTS.
86 PD5 bidirectional General-purpose I/O port D pin 5, 5 V tolerant, remappable alternate function USART2_TX.
87 PD6 bidirectional General-purpose I/O port D pin 6, 5 V tolerant, remappable alternate function USART2_RX.
88 PD7 bidirectional General-purpose I/O port D pin 7, 5 V tolerant, remappable alternate function USART2_CK.
89 PB3 bidirectional JTAG/SWD debug interface pin JTDO, 5 V tolerant, alternate functions SPI3_SCK or I2S3_CK, and remappable to TRACESWO, TIM2_CH2, or SPI1_SCK.
90 PB4 bidirectional JTAG/SWD debug interface pin NJTRST, 5 V tolerant, alternate function SPI3_MISO, and remappable to TIM3_CH1 or SPI1_MISO.
91 PB5 bidirectional General-purpose I/O port B pin 5, alternate functions I2C1_SMBA, SPI3_MOSI, I2S3_SD, ETH_MII_PPS_OUT, and remappable to ETH_RMII_PPS_OUT, TIM3_CH2, SPI1_MOSI, or CAN2_RX.
92 PB6 bidirectional General-purpose I/O port B pin 6, 5 V tolerant, alternate functions I2C1_SCL or TIM4_CH1, and remappable to USART1_TX or CAN2_TX.
93 PB7 bidirectional General-purpose I/O port B pin 7, 5 V tolerant, alternate functions I2C1_SDA or TIM4_CH2, and remappable to USART1_RX.
94 BOOT0 input Boot mode selection input pin to select boot from Flash, system memory, or embedded SRAM.
95 PB8 bidirectional General-purpose I/O port B pin 8, 5 V tolerant, alternate functions TIM4_CH3 or ETH_MII_TXD3, and remappable to I2C1_SCL or CAN1_RX.
96 PB9 bidirectional General-purpose I/O port B pin 9, 5 V tolerant, alternate function TIM4_CH4, and remappable to I2C1_SDA or CAN1_TX.
97 PE0 bidirectional General-purpose I/O port E pin 0, 5 V tolerant, alternate function TIM4_ETR.
98 PE1 bidirectional General-purpose I/O port E pin 1, 5 V tolerant, general-purpose I/O.
99 VSS_3 power_in Ground (VSS) connection point 3 for digital ground at 0 V.
100 VDD_3 power_in Main supply voltage connection point 3 at 2.0 to 3.6 V for core and I/O.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F105VCT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f105vct6-etched.step / stm32f105vct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f105vct6.step / stm32f105vct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (104 pp, sha256 04f979ad6ea16a85, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF