# STM32F105R8T6

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F105R8T6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply for the RTC, the 32 kHz oscillator and backup registers, specified at 1.8 to 3.6 V when VDD is not present. |
| 2 | PC13-TAMPER-RTC | bidirectional | General-purpose I/O PC13 (also TAMPER-RTC) supplied through the power switch, so in output mode it is limited to 2 MHz with a maximum 30 pF load and only one pin may be in output mode at a time. |
| 3 | PC14-OSC32_IN | bidirectional | General-purpose I/O PC14, also the OSC32_IN input of the 32 kHz oscillator, supplied through the power switch so output use is limited to 2 MHz with a maximum 30 pF load and one pin in output at a time. |
| 4 | PC15-OSC32_OUT | bidirectional | General-purpose I/O PC15, also the OSC32_OUT output of the 32 kHz oscillator, supplied through the power switch so output use is limited to 2 MHz with a maximum 30 pF load and one pin in output at a time. |
| 5 | OSC_IN | input | Input of the 3-25 MHz high-speed crystal oscillator (HSE); on LQFP64 this pin is OSC_IN after reset and PD0 can be remapped onto it. |
| 6 | OSC_OUT | output | Output of the 3-25 MHz high-speed crystal oscillator (HSE); on LQFP64 this pin is OSC_OUT after reset and PD1 can be remapped onto it. |
| 7 | NRST | bidirectional | Active reset pin of the MCU; its electrical characteristics are specified in section 5.3.14 (Table 39) of the datasheet. |
| 8 | PC0 | bidirectional | General-purpose I/O PC0 (not 5 V tolerant) with alternate function ADC12_IN10 analog input. |
| 9 | PC1 | bidirectional | General-purpose I/O PC1 (not 5 V tolerant) with alternate function ADC12_IN11, with Ethernet MDC listed as an alternate function that does not apply to STM32F105 devices. |
| 10 | PC2 | bidirectional | General-purpose I/O PC2 (not 5 V tolerant) with alternate function ADC12_IN12, with an Ethernet TXD2 alternate function listed that does not apply to STM32F105 devices. |
| 11 | PC3 | bidirectional | General-purpose I/O PC3 (not 5 V tolerant) with alternate function ADC12_IN13, with an Ethernet TX_CLK alternate function listed that does not apply to STM32F105 devices. |
| 12 | VSSA | power_in | Analog ground for the ADC, reset blocks, RC oscillators and PLL, which must be connected to VSS. |
| 13 | VDDA | power_in | Analog supply for the ADC, reset blocks, RC oscillators and PLL at 2.0 to 3.6 V, with a minimum of 2.4 V when the ADC is used, and it must be connected to VDD. |
| 14 | PA0-WKUP | bidirectional | General-purpose I/O PA0 (not 5 V tolerant) with WKUP wakeup function and alternate functions ADC12_IN0, USART2_CTS, TIM2_CH1_ETR and TIM5_CH1. |
| 15 | PA1 | bidirectional | General-purpose I/O PA1 (not 5 V tolerant) with alternate functions USART2_RTS, ADC12_IN1, TIM5_CH2 and TIM2_CH2. |
| 16 | PA2 | bidirectional | General-purpose I/O PA2 (not 5 V tolerant) with alternate functions USART2_TX, TIM5_CH3, ADC12_IN2 and TIM2_CH3. |
| 17 | PA3 | bidirectional | General-purpose I/O PA3 (not 5 V tolerant) with alternate functions USART2_RX, TIM5_CH4, ADC12_IN3 and TIM2_CH4. |
| 18 | VSS_4 | power_in | Digital ground supply pin for the device. |
| 19 | VDD_4 | power_in | Digital supply for the I/Os and internal regulator at 2.0 to 3.6 V. |
| 20 | PA4 | bidirectional | General-purpose I/O PA4 (not 5 V tolerant) with alternate functions SPI1_NSS, DAC_OUT1, USART2_CK, ADC12_IN4 and SPI3_NSS/I2S3_WS. |
| 21 | PA5 | bidirectional | General-purpose I/O PA5 (not 5 V tolerant) with alternate functions SPI1_SCK, DAC_OUT2 and ADC12_IN5. |
| 22 | PA6 | bidirectional | General-purpose I/O PA6 (not 5 V tolerant) with alternate functions SPI1_MISO, ADC12_IN6, TIM3_CH1 and TIM1_BKIN. |
| 23 | PA7 | bidirectional | General-purpose I/O PA7 (not 5 V tolerant) with alternate functions SPI1_MOSI, ADC12_IN7, TIM3_CH2 and TIM1_CH1N. |
| 24 | PC4 | bidirectional | General-purpose I/O PC4 (not 5 V tolerant) with alternate function ADC12_IN14. |
| 25 | PC5 | bidirectional | General-purpose I/O PC5 (not 5 V tolerant) with alternate function ADC12_IN15. |
| 26 | PB0 | bidirectional | General-purpose I/O PB0 (not 5 V tolerant) with alternate functions ADC12_IN8, TIM3_CH3 and TIM1_CH2N. |
| 27 | PB1 | bidirectional | General-purpose I/O PB1 (not 5 V tolerant) with alternate functions ADC12_IN9, TIM3_CH4 and TIM1_CH3N. |
| 28 | PB2/BOOT1 | bidirectional | 5 V tolerant general-purpose I/O PB2, which doubles as the BOOT1 boot-mode pin. |
| 29 | PB10 | bidirectional | 5 V tolerant general-purpose I/O PB10 with alternate functions I2C2_SCL, USART3_TX and TIM2_CH3. |
| 30 | PB11 | bidirectional | 5 V tolerant general-purpose I/O PB11 with alternate functions I2C2_SDA, USART3_RX and TIM2_CH4. |
| 31 | VSS_1 | power_in | Digital ground supply pin for the device. |
| 32 | VDD_1 | power_in | Digital supply for the I/Os and internal regulator at 2.0 to 3.6 V. |
| 33 | PB12 | bidirectional | 5 V tolerant general-purpose I/O PB12 with alternate functions SPI2_NSS/I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN and CAN2_RX. |
| 34 | PB13 | bidirectional | 5 V tolerant general-purpose I/O PB13 with alternate functions SPI2_SCK/I2S2_CK, USART3_CTS, TIM1_CH1N and CAN2_TX. |
| 35 | PB14 | bidirectional | 5 V tolerant general-purpose I/O PB14 with alternate functions SPI2_MISO, TIM1_CH2N and USART3_RTS. |
| 36 | PB15 | bidirectional | 5 V tolerant general-purpose I/O PB15 with alternate functions SPI2_MOSI/I2S2_SD and TIM1_CH3N. |
| 37 | PC6 | bidirectional | 5 V tolerant general-purpose I/O PC6 with alternate functions I2S2_MCK and TIM3_CH1. |
| 38 | PC7 | bidirectional | 5 V tolerant general-purpose I/O PC7 with alternate functions I2S3_MCK and TIM3_CH2. |
| 39 | PC8 | bidirectional | 5 V tolerant general-purpose I/O PC8 with alternate function TIM3_CH3. |
| 40 | PC9 | bidirectional | 5 V tolerant general-purpose I/O PC9 with alternate function TIM3_CH4. |
| 41 | PA8 | bidirectional | 5 V tolerant general-purpose I/O PA8 with alternate functions USART1_CK, OTG_FS_SOF, TIM1_CH1 and MCO. |
| 42 | PA9 | bidirectional | 5 V tolerant general-purpose I/O PA9 with alternate functions USART1_TX, TIM1_CH2 and OTG_FS_VBUS. |
| 43 | PA10 | bidirectional | 5 V tolerant general-purpose I/O PA10 with alternate functions USART1_RX, TIM1_CH3 and OTG_FS_ID. |
| 44 | PA11 | bidirectional | 5 V tolerant general-purpose I/O PA11 with alternate functions USART1_CTS, CAN1_RX, TIM1_CH4 and OTG_FS_DM. |
| 45 | PA12 | bidirectional | 5 V tolerant general-purpose I/O PA12 with alternate functions USART1_RTS, OTG_FS_DP, CAN1_TX and TIM1_ETR. |
| 46 | PA13 | bidirectional | 5 V tolerant pin with default function JTMS-SWDIO, the serial-wire/JTAG debug data input-output. |
| 47 | VSS_2 | power_in | Digital ground supply pin for the device. |
| 48 | VDD_2 | power_in | Digital supply for the I/Os and internal regulator at 2.0 to 3.6 V. |
| 49 | PA14 | bidirectional | 5 V tolerant pin with default function JTCK-SWCLK, the serial-wire/JTAG clock. |
| 50 | PA15 | bidirectional | 5 V tolerant general-purpose I/O PA15 with default function JTDI and alternate functions SPI3_NSS/I2S3_WS, TIM2_CH1_ETR and SPI1_NSS. |
| 51 | PC10 | bidirectional | 5 V tolerant general-purpose I/O PC10 with alternate functions UART4_TX, USART3_TX and SPI3_SCK/I2S3_CK. |
| 52 | PC11 | bidirectional | 5 V tolerant general-purpose I/O PC11 with alternate functions UART4_RX, USART3_RX and SPI3_MISO. |
| 53 | PC12 | bidirectional | 5 V tolerant general-purpose I/O PC12 with alternate functions UART5_TX, USART3_CK and SPI3_MOSI/I2S3_SD. |
| 54 | PD2 | bidirectional | 5 V tolerant general-purpose I/O PD2 with alternate functions TIM3_ETR and UART5_RX. |
| 55 | PB3 | bidirectional | 5 V tolerant pin with default function JTDO and alternate functions SPI3_SCK/I2S3_CK, TRACESWO, TIM2_CH2 and SPI1_SCK. |
| 56 | PB4 | bidirectional | 5 V tolerant pin with default function NJTRST and alternate functions SPI3_MISO, TIM3_CH1 and SPI1_MISO. |
| 57 | PB5 | bidirectional | General-purpose I/O PB5 (not 5 V tolerant) with alternate functions I2C1_SMBA, SPI3_MOSI/I2S3_SD, TIM3_CH2, SPI1_MOSI and CAN2_RX. |
| 58 | PB6 | bidirectional | 5 V tolerant general-purpose I/O PB6 with alternate functions I2C1_SCL, TIM4_CH1, USART1_TX and CAN2_TX. |
| 59 | PB7 | bidirectional | 5 V tolerant general-purpose I/O PB7 with alternate functions I2C1_SDA, TIM4_CH2 and USART1_RX. |
| 60 | BOOT0 | input | Boot-mode selection pin sampled at startup, together with BOOT1, to choose boot from user Flash, system memory or embedded SRAM. |
| 61 | PB8 | bidirectional | 5 V tolerant general-purpose I/O PB8 with alternate functions TIM4_CH3, I2C1_SCL and CAN1_RX. |
| 62 | PB9 | bidirectional | 5 V tolerant general-purpose I/O PB9 with alternate functions TIM4_CH4, I2C1_SDA and CAN1_TX. |
| 63 | VSS_3 | power_in | Digital ground supply pin for the device. |
| 64 | VDD_3 | power_in | Digital supply for the I/Os and internal regulator at 2.0 to 3.6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `STM32F105R8T6`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `stm32f105r8t6-etched.step` / `stm32f105r8t6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f105r8t6.step` / `stm32f105r8t6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586182410136391680) (108 pp, sha256 `ca4bad652e5eb36d`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f105r8t6-datasheet.pdf)