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STM32F103VET6TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f103vet6trfactory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32F103VET6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F103VET6TR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO port E pin 2, 5V tolerant, TRACED clock or FSMC address A23.
2 PE3 bidirectional GPIO port E pin 3, 5V tolerant, TRACED data 0 or FSMC address A19.
3 PE4 bidirectional GPIO port E pin 4, 5V tolerant, TRACED data 1 or FSMC address A20.
4 PE5 bidirectional GPIO port E pin 5, 5V tolerant, TRACED data 2 or FSMC address A21.
5 PE6 bidirectional GPIO port E pin 6, 5V tolerant, TRACED data 3 or FSMC address A22.
6 VBAT power_in Battery backup supply for RTC and backup registers, 1.8 to 3.6 V.
7 PC13-TAMPER-RTC bidirectional GPIO port C pin 13, tamper or RTC output, limited to 2 MHz switching frequency.
8 PC14-OSC32_IN bidirectional GPIO port C pin 14, 32 kHz oscillator input for RTC.
9 PC15-OSC32_OUT bidirectional GPIO port C pin 15, 32 kHz oscillator output.
10 VSS power_in
11 VDD power_in
12 OSC_IN bidirectional High-speed external oscillator input, 4 to 16 MHz crystal or clock source.
13 OSC_OUT bidirectional High-speed external oscillator output for crystal/resonator.
14 NRST input External reset input, active low, with internal filtering and pull-up resistor.
15 PC0 bidirectional GPIO port C pin 0, ADC123_IN10 input channel.
16 PC1 bidirectional GPIO port C pin 1, ADC123_IN11 input channel.
17 PC2 bidirectional GPIO port C pin 2, ADC123_IN12 input channel.
18 PC3 bidirectional GPIO port C pin 3, ADC123_IN13 input channel.
19 VSSA power_in Analog ground for ADC, DAC, and reset circuits.
20 VREF- power_in Negative reference voltage for ADC, typically connected to VSSA.
21 VREF+ power_in Positive reference voltage for ADC, 2.4 to VDDA.
22 VDDA power_in Analog supply voltage, 2.4 to 3.6 V, must be within 300 mV of VDD.
23 PA0-WKUP bidirectional GPIO port A pin 0, wakeup pin, USART2_CTS or ADC123_IN0 channel.
24 PA1 bidirectional GPIO port A pin 1, USART2_RTS or ADC123_IN1 channel.
25 PA2 bidirectional GPIO port A pin 2, USART2_TX or ADC123_IN2 channel.
26 PA3 bidirectional GPIO port A pin 3, USART2_RX or ADC123_IN3 channel.
27 VSS power_in
28 VDD power_in
29 PA4 bidirectional GPIO port A pin 4, SPI1_NSS or DAC_OUT1 or ADC12_IN4 channel.
30 PA5 bidirectional GPIO port A pin 5, SPI1_SCK or DAC_OUT2 or ADC12_IN5 channel.
31 PA6 bidirectional GPIO port A pin 6, SPI1_MISO, TIM3_CH1 or TIM1_BKIN or ADC12_IN6 channel.
32 PA7 bidirectional GPIO port A pin 7, SPI1_MOSI, TIM3_CH2 or TIM1_CH1N or ADC12_IN7 channel.
33 PC4 bidirectional GPIO port C pin 4, ADC12_IN14 input channel.
34 PC5 bidirectional GPIO port C pin 5, ADC12_IN15 input channel.
35 PB0 bidirectional GPIO port B pin 0, TIM3_CH3, TIM1_CH2N or ADC12_IN8 channel.
36 PB1 bidirectional GPIO port B pin 1, TIM3_CH4, TIM1_CH3N or ADC12_IN9 channel.
37 PB2 bidirectional GPIO port B pin 2, 5V tolerant, boot configuration pin.
38 PE7 bidirectional GPIO port E pin 7, 5V tolerant, FSMC data D4 or TIM1_ETR.
39 PE8 bidirectional GPIO port E pin 8, 5V tolerant, FSMC data D5 or TIM1_CH1N.
40 PE9 bidirectional GPIO port E pin 9, 5V tolerant, FSMC data D6 or TIM1_CH1.
41 PE10 bidirectional GPIO port E pin 10, 5V tolerant, FSMC data D7 or TIM1_CH2N.
42 PE11 bidirectional GPIO port E pin 11, 5V tolerant, FSMC data D8 or TIM1_CH2.
43 PE12 bidirectional GPIO port E pin 12, 5V tolerant, FSMC data D9 or TIM1_CH3N.
44 PE13 bidirectional GPIO port E pin 13, 5V tolerant, FSMC data D10 or TIM1_CH3.
45 PE14 bidirectional GPIO port E pin 14, 5V tolerant, FSMC data D11 or TIM1_CH4.
46 PE15 bidirectional GPIO port E pin 15, 5V tolerant, FSMC data D12 or TIM1_BKIN.
47 PB10 bidirectional GPIO port B pin 10, 5V tolerant, I2C2_SCL or USART3_TX or TIM2_CH3.
48 PB11 bidirectional GPIO port B pin 11, 5V tolerant, I2C2_SDA or USART3_RX or TIM2_CH4.
49 VSS power_in
50 VDD power_in
51 PB12 bidirectional GPIO port B pin 12, 5V tolerant, SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK or TIM1_BKIN.
52 PB13 bidirectional GPIO port B pin 13, 5V tolerant, SPI2_SCK, I2S2_CK, USART3_CTS or TIM1_CH1N.
53 PB14 bidirectional GPIO port B pin 14, 5V tolerant, SPI2_MISO, TIM1_CH2N or USART3_RTS.
54 PB15 bidirectional GPIO port B pin 15, 5V tolerant, SPI2_MOSI, I2S2_SD or TIM1_CH3N.
55 PD8 bidirectional GPIO port D pin 8, 5V tolerant, FSMC data D13 or USART3_TX.
56 PD9 bidirectional GPIO port D pin 9, 5V tolerant, FSMC data D14 or USART3_RX.
57 PD10 bidirectional GPIO port D pin 10, 5V tolerant, FSMC data D15 or USART3_CK.
58 PD11 bidirectional GPIO port D pin 11, 5V tolerant, FSMC address A16 or USART3_CTS.
59 PD12 bidirectional GPIO port D pin 12, 5V tolerant, FSMC address A17, TIM4_CH1 or USART3_RTS.
60 PD13 bidirectional GPIO port D pin 13, 5V tolerant, FSMC address A18 or TIM4_CH2.
61 PD14 bidirectional GPIO port D pin 14, 5V tolerant, FSMC data D0 or TIM4_CH3.
62 PD15 bidirectional GPIO port D pin 15, 5V tolerant, FSMC data D1 or TIM4_CH4.
63 PC6 bidirectional GPIO port C pin 6, 5V tolerant, I2S2_MCK, TIM8_CH1, SDIO_D6 or TIM3_CH1.
64 PC7 bidirectional GPIO port C pin 7, 5V tolerant, I2S3_MCK, TIM8_CH2, SDIO_D7 or TIM3_CH2.
65 PC8 bidirectional GPIO port C pin 8, 5V tolerant, TIM8_CH3, SDIO_D0 or TIM3_CH3.
66 PC9 bidirectional GPIO port C pin 9, 5V tolerant, TIM8_CH4, SDIO_D1 or TIM3_CH4.
67 PA8 bidirectional GPIO port A pin 8, 5V tolerant, USART1_CK, TIM1_CH1 or MCO clock output.
68 PA9 bidirectional GPIO port A pin 9, 5V tolerant, USART1_TX or TIM1_CH2.
69 PA10 bidirectional GPIO port A pin 10, 5V tolerant, USART1_RX or TIM1_CH3.
70 PA11 bidirectional GPIO port A pin 11, 5V tolerant, USART1_CTS, USB_DM, CAN_RX or TIM1_CH4.
71 PA12 bidirectional GPIO port A pin 12, 5V tolerant, USART1_RTS, USB_DP, CAN_TX or TIM1_ETR.
72 PA13 bidirectional GPIO port A pin 13, 5V tolerant, JTMS or SWDIO debug interface.
73 NC unconnected
74 VSS power_in
75 VDD power_in
76 PA14 bidirectional GPIO port A pin 14, 5V tolerant, JTCK or SWCLK debug interface.
77 PA15 bidirectional GPIO port A pin 15, 5V tolerant, JTDI, SPI3_NSS, I2S3_WS, TIM2_CH1_ETR or SPI1_NSS.
78 PC10 bidirectional GPIO port C pin 10, 5V tolerant, UART4_TX, SDIO_D2 or USART3_TX.
79 PC11 bidirectional GPIO port C pin 11, 5V tolerant, UART4_RX, SDIO_D3 or USART3_RX.
80 PC12 bidirectional GPIO port C pin 12, 5V tolerant, UART5_TX, SDIO_CK or USART3_CK.
81 PD0 bidirectional GPIO port D pin 0, 5V tolerant, OSC_IN (remappable), FSMC_D2 or CAN_RX.
82 PD1 bidirectional GPIO port D pin 1, 5V tolerant, OSC_OUT (remappable), FSMC_D3 or CAN_TX.
83 PD2 bidirectional GPIO port D pin 2, 5V tolerant, TIM3_ETR, UART5_RX or SDIO_CMD.
84 PD3 bidirectional GPIO port D pin 3, 5V tolerant, FSMC_CLK or USART2_CTS.
85 PD4 bidirectional GPIO port D pin 4, 5V tolerant, FSMC_NOE or USART2_RTS.
86 PD5 bidirectional GPIO port D pin 5, 5V tolerant, FSMC_NWE or USART2_TX.
87 PD6 bidirectional GPIO port D pin 6, 5V tolerant, FSMC_NWAIT or USART2_RX.
88 PD7 bidirectional GPIO port D pin 7, 5V tolerant, FSMC_NE1 or USART2_CK.
89 PB3 bidirectional GPIO port B pin 3, 5V tolerant, JTDO, SPI3_SCK, I2S3_CK, TRACESWO or TIM2_CH2 or SPI1_SCK.
90 PB4 bidirectional GPIO port B pin 4, 5V tolerant, NJTRST, SPI3_MISO, PB4 or TIM3_CH1 or SPI1_MISO.
91 PB5 bidirectional GPIO port B pin 5, I2C1_SMBA, SPI3_MOSI, I2S3_SD or TIM3_CH2 or SPI1_MOSI.
92 PB6 bidirectional GPIO port B pin 6, 5V tolerant, I2C1_SCL or TIM4_CH1 or USART1_TX.
93 PB7 bidirectional GPIO port B pin 7, 5V tolerant, I2C1_SDA, FSMC_NADV or TIM4_CH2 or USART1_RX.
94 BOOT0 input Boot configuration input pin, selects boot from Flash or system memory at reset.
95 PB8 bidirectional GPIO port B pin 8, 5V tolerant, TIM4_CH3, SDIO_D4 or I2C1_SCL or CAN_RX.
96 PB9 bidirectional GPIO port B pin 9, 5V tolerant, TIM4_CH4, SDIO_D5 or I2C1_SDA or CAN_TX.
97 PE0 bidirectional GPIO port E pin 0, 5V tolerant, TIM4_ETR or FSMC_NBL0.
98 PE1 bidirectional GPIO port E pin 1, 5V tolerant, FSMC_NBL1.
99 VSS power_in
100 VDD power_in

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F103VET6TR
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f103vet6tr-etched.step / stm32f103vet6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f103vet6tr.step / stm32f103vet6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (143 pp, sha256 f69f74092e544134, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF