# STM32F103VEH7

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LFBGA-100

STM32F103VEH7 from STMicroelectronics, in a LFBGA-100. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | PC14-OSC32_IN | bidirectional | GPIO PC14 (not 5 V tolerant) supplied through the power switch, sinking at most 3 mA, so output speed is limited to 2 MHz with 30 pF maximum load and it must not source current; OSC32_IN is its alternate function. |
| A2 | PC13-TAMPER-RTC | bidirectional | GPIO PC13 (not 5 V tolerant) supplied through the power switch, sinking at most 3 mA, so output speed is limited to 2 MHz with 30 pF maximum load and it must not source current; TAMPER-RTC is its alternate function. |
| A3 | PE2 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE2 and alternate functions TRACECK and FSMC_A23. |
| A4 | PB9 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB9 and alternate functions TIM4_CH4/SDIO_D5, I2C1_SDA and CAN_TX. |
| A5 | PB7 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB7 and alternate functions I2C1_SDA, FSMC_NADV, TIM4_CH2 and USART1_RX. |
| A6 | PB4 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function NJTRST and alternate functions SPI3_MISO, TIM3_CH1 and SPI1_MISO after remap. |
| A7 | PB3 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function JTDO and alternate functions SPI3_SCK/I2S3_CK, TRACESWO, TIM2_CH2 and SPI1_SCK. |
| A8 | PA15 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function JTDI and alternate functions SPI3_NSS/I2S3_WS, TIM2_CH1_ETR and SPI1_NSS. |
| A9 | PA14 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function JTCK-SWCLK. |
| A10 | PA13 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function JTMS-SWDIO. |
| B1 | PC15-OSC32_OUT | bidirectional | GPIO PC15 (not 5 V tolerant) supplied through the power switch, sinking at most 3 mA, so output speed is limited to 2 MHz with 30 pF maximum load and it must not source current; OSC32_OUT is its alternate function. |
| B2 | VBAT | power_in | Backup power supply for the RTC and backup registers. |
| B3 | PE3 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE3 and alternate functions TRACED0 and FSMC_A19. |
| B4 | PB8 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB8 and alternate functions TIM4_CH3/SDIO_D4, I2C1_SCL and CAN_RX. |
| B5 | PB6 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB6 and alternate functions I2C1_SCL, TIM4_CH1 and USART1_TX. |
| B6 | PD5 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD5 and alternate functions FSMC_NWE and USART2_TX. |
| B7 | PD2 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD2 and alternate functions TIM3_ETR/UART5_RX and SDIO_CMD. |
| B8 | PC11 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PC11 and alternate functions UART4_RX/SDIO_D3 and USART3_RX. |
| B9 | PC10 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PC10 and alternate functions UART4_TX/SDIO_D2 and USART3_TX. |
| B10 | PA12 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PA12 and alternate functions USART1_RTS, USB_DP, CAN_TX and TIM1_ETR. |
| C1 | OSC_IN | input | External 4-16 MHz (HSE) crystal oscillator input. |
| C2 | VSS_5 | power_in | Digital ground pin (all voltages are referenced to VSS). |
| C3 | PE4 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE4 and alternate functions TRACED1 and FSMC_A20. |
| C4 | PE1 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE1 and alternate function FSMC_NBL1. |
| C5 | PB5 | bidirectional | I/O port pin (not 5 V tolerant) with default function PB5 and alternate functions I2C1_SMBA, SPI3_MOSI/I2S3_SD, TIM3_CH2 and SPI1_MOSI. |
| C6 | PD6 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD6 and alternate functions FSMC_NWAIT and USART2_RX. |
| C7 | PD3 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD3 and alternate functions FSMC_CLK and USART2_CTS. |
| C8 | PC12 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PC12 and alternate functions UART5_TX/SDIO_CK and USART3_CK. |
| C9 | PA9 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PA9 and alternate functions USART1_TX and TIM1_CH2. |
| C10 | PA11 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PA11 and alternate functions USART1_CTS, USB_DM, CAN_RX and TIM1_CH4. |
| D1 | OSC_OUT | output | External 4-16 MHz (HSE) crystal oscillator output. |
| D2 | VDD_5 | power_in | Digital supply pin; application supply range is 2.0 to 3.6 V. |
| D3 | PE5 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE5 and alternate functions TRACED2 and FSMC_A21. |
| D4 | PE0 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE0 and alternate functions TIM4_ETR and FSMC_NBL0. |
| D5 | BOOT0 | input | Boot mode selection pin BOOT0. |
| D6 | PD7 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD7 and alternate functions FSMC_NE1/FSMC_NCE2 and USART2_CK. |
| D7 | PD4 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD4 and alternate functions FSMC_NOE and USART2_RTS. |
| D8 | PD0 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD0 (available by default on BGA100) and alternate functions FSMC_D2 and CAN_RX. |
| D9 | PA8 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PA8 and alternate functions USART1_CK, TIM1_CH1 and MCO. |
| D10 | PA10 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PA10 and alternate functions USART1_RX and TIM1_CH3. |
| E1 | NRST | bidirectional | Reset pin (I/O); its electrical characteristics are in section 5.3.15, which is not in the provided text. |
| E2 | PC2 | bidirectional | I/O port pin (not 5 V tolerant) with default function PC2 and alternate function ADC123_IN12. |
| E3 | PE6 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE6 and alternate functions TRACED3 and FSMC_A22. |
| E4 | VSS_4 | power_in | Digital ground pin (all voltages are referenced to VSS). |
| E5 | VSS_3 | power_in | Digital ground pin (all voltages are referenced to VSS). |
| E6 | VSS_2 | power_in | Digital ground pin (all voltages are referenced to VSS). |
| E7 | VSS_1 | power_in | Digital ground pin (all voltages are referenced to VSS). |
| E8 | PD1 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD1 (available by default on BGA100) and alternate functions FSMC_D3 and CAN_TX. |
| E9 | PC9 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PC9 and alternate functions TIM8_CH4/SDIO_D1 and TIM3_CH4. |
| E10 | PC7 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PC7 and alternate functions I2S3_MCK, TIM8_CH2/SDIO_D7 and TIM3_CH2. |
| F1 | PC0 | bidirectional | I/O port pin (not 5 V tolerant) with default function PC0 and alternate function ADC123_IN10. |
| F2 | PC1 | bidirectional | I/O port pin (not 5 V tolerant) with default function PC1 and alternate function ADC123_IN11. |
| F3 | PC3 | bidirectional | I/O port pin (not 5 V tolerant) with default function PC3 and alternate function ADC123_IN13; it is bonded on BGA100. |
| F4 | VDD_4 | power_in | Digital supply pin; application supply range is 2.0 to 3.6 V. |
| F5 | VDD_3 | power_in | Digital supply pin; application supply range is 2.0 to 3.6 V. |
| F6 | VDD_2 | power_in | Digital supply pin; application supply range is 2.0 to 3.6 V. |
| F7 | VDD_1 | power_in | Digital supply pin; application supply range is 2.0 to 3.6 V. |
| F8 | NC | unconnected | Not connected on the LFBGA100 package. |
| F9 | PC8 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PC8 and alternate functions TIM8_CH3/SDIO_D0 and TIM3_CH3. |
| F10 | PC6 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PC6 and alternate functions I2S2_MCK, TIM8_CH1/SDIO_D6 and TIM3_CH1. |
| G1 | VSSA | power_in | Analog ground for the ADC and analog circuitry. |
| G2 | PA0-WKUP | bidirectional | I/O port pin (not 5 V tolerant) with default function PA0-WKUP, also serving as the WKUP wakeup input with alternate functions USART2_CTS, ADC123_IN0, TIM2_CH1_ETR and TIM5_CH1/TIM8_ETR. |
| G3 | PA4 | bidirectional | I/O port pin (not 5 V tolerant) with default function PA4 and alternate functions SPI1_NSS, USART2_CK and DAC_OUT1/ADC12_IN4. |
| G4 | PC4 | bidirectional | I/O port pin (not 5 V tolerant) with default function PC4 and alternate function ADC12_IN14. |
| G5 | PB2/BOOT1 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB2/BOOT1. |
| G6 | PE10 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE10 and alternate functions FSMC_D7 and TIM1_CH2N. |
| G7 | PE14 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE14 and alternate functions FSMC_D11 and TIM1_CH4. |
| G8 | PB15 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB15 and alternate functions SPI2_MOSI/I2S2_SD and TIM1_CH3N. |
| G9 | PD11 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD11 and alternate functions FSMC_A16 and USART3_CTS. |
| G10 | PD15 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD15 and alternate functions FSMC_D1 and TIM4_CH4. |
| H1 | VREF- | power_in | Negative ADC reference voltage, 0 V. |
| H2 | PA1 | bidirectional | I/O port pin (not 5 V tolerant) with default function PA1 and alternate functions USART2_RTS, ADC123_IN1, TIM5_CH2 and TIM2_CH2. |
| H3 | PA5 | bidirectional | I/O port pin (not 5 V tolerant) with default function PA5 and alternate functions SPI1_SCK, DAC_OUT2 and ADC12_IN5. |
| H4 | PC5 | bidirectional | I/O port pin (not 5 V tolerant) with default function PC5 and alternate function ADC12_IN15. |
| H5 | PE7 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE7 and alternate functions FSMC_D4 and TIM1_ETR. |
| H6 | PE11 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE11 and alternate functions FSMC_D8 and TIM1_CH2. |
| H7 | PE15 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE15 and alternate functions FSMC_D12 and TIM1_BKIN. |
| H8 | PB14 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB14 and alternate functions SPI2_MISO, TIM1_CH2N and USART3_RTS. |
| H9 | PD10 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD10 and alternate functions FSMC_D15 and USART3_CK. |
| H10 | PD14 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD14 and alternate functions FSMC_D0 and TIM4_CH3. |
| J1 | VREF+ | power_in | Positive ADC reference voltage, from 2.4 V up to VDDA. |
| J2 | PA2 | bidirectional | I/O port pin (not 5 V tolerant) with default function PA2 and alternate functions USART2_TX, TIM5_CH3, ADC123_IN2 and TIM2_CH3. |
| J3 | PA6 | bidirectional | I/O port pin (not 5 V tolerant) with default function PA6 and alternate functions SPI1_MISO, TIM8_BKIN, ADC12_IN6, TIM3_CH1 and TIM1_BKIN. |
| J4 | PB0 | bidirectional | I/O port pin (not 5 V tolerant) with default function PB0 and alternate functions ADC12_IN8, TIM3_CH3, TIM8_CH2N and TIM1_CH2N. |
| J5 | PE8 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE8 and alternate functions FSMC_D5 and TIM1_CH1N. |
| J6 | PE12 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE12 and alternate functions FSMC_D9 and TIM1_CH3N. |
| J7 | PB10 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB10 and alternate functions I2C2_SCL, USART3_TX and TIM2_CH3. |
| J8 | PB13 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB13 and alternate functions SPI2_SCK/I2S2_CK, USART3_CTS and TIM1_CH1N. |
| J9 | PD9 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD9 and alternate functions FSMC_D14 and USART3_RX. |
| J10 | PD13 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD13 and alternate functions FSMC_A18 and TIM4_CH2. |
| K1 | VDDA | power_in | Analog supply for the ADC; ADC VDDA range is 2.4 to 3.6 V. |
| K2 | PA3 | bidirectional | I/O port pin (not 5 V tolerant) with default function PA3 and alternate functions USART2_RX, TIM5_CH4, ADC123_IN3 and TIM2_CH4. |
| K3 | PA7 | bidirectional | I/O port pin (not 5 V tolerant) with default function PA7 and alternate functions SPI1_MOSI, TIM8_CH1N, ADC12_IN7, TIM3_CH2 and TIM1_CH1N. |
| K4 | PB1 | bidirectional | I/O port pin (not 5 V tolerant) with default function PB1 and alternate functions ADC12_IN9, TIM3_CH4, TIM8_CH3N and TIM1_CH3N. |
| K5 | PE9 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE9 and alternate functions FSMC_D6 and TIM1_CH1. |
| K6 | PE13 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PE13 and alternate functions FSMC_D10 and TIM1_CH3. |
| K7 | PB11 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB11 and alternate functions I2C2_SDA and USART3_RX. |
| K8 | PB12 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PB12 and alternate functions SPI2_NSS/I2S2_WS, I2C2_SMBA, USART3_CK and TIM1_BKIN. |
| K9 | PD8 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD8 and alternate functions FSMC_D13 and USART3_TX. |
| K10 | PD12 | bidirectional | 5 V-tolerant (FT) I/O port pin with default function PD12 and alternate functions FSMC_A17, TIM4_CH1 and USART3_RTS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LFBGA-100 |
| Category | Embedded Processors & Controllers |
| Pins | 100 |

## CAD (KiCad official)

- Symbol: `STM32F103VEH7`
- Footprint: `Package_BGA:LFBGA-100_10x10mm_Layout10x10_P0.8mm`
- 3D model: LFBGA-100 (KiCad packages3D, STEP)
- 3D model files: `stm32f103veh7-etched.step` / `stm32f103veh7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f103veh7.step` / `stm32f103veh7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588952981144547328) (143 pp, sha256 `c61db5e362b62f2f`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f103veh7-datasheet.pdf)