component

STM32F103VBT6TR

Public Made by Adom

by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f103vbt6trfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2d ago
viewers stm32f103vbt6tr: viewers · Ray 2d ago
package.json Publish 0.1.0 · Ray 2d ago
page.json Set visibility: public · Ray 2d ago
README.md Initial commit: component/stm32f103vbt6tr · Ray 2d ago
stm32f103vbt6tr-etched.glb stm32f103vbt6tr: factory component page (tier=lcsc) · Ray 2d ago
stm32f103vbt6tr-etched.step stm32f103vbt6tr: factory component page (tier=lcsc) · Ray 2d ago
stm32f103vbt6tr-hero.glb stm32f103vbt6tr: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
stm32f103vbt6tr-hero.overlay.json Publish 0.1.0 · Ray 2d ago
stm32f103vbt6tr.glb Publish 0.1.0 · Ray 2d ago
stm32f103vbt6tr.kicad_mod Publish 0.1.0 · Ray 2d ago
stm32f103vbt6tr.kicad_sym Publish 0.1.0 · Ray 2d ago
stm32f103vbt6tr.lbr Publish 0.1.0 · Ray 2d ago
stm32f103vbt6tr.step Publish 0.1.0 · Ray 2d ago

STM32F103VBT6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F103VBT6TR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant (FT) GPIO; default function PE2, alternate function TRACECK (trace clock).
2 PE3 bidirectional 5 V-tolerant (FT) GPIO; default function PE3, alternate function TRACED0.
3 PE4 bidirectional 5 V-tolerant (FT) GPIO; default function PE4, alternate function TRACED1.
4 PE5 bidirectional 5 V-tolerant (FT) GPIO; default function PE5, alternate function TRACED2.
5 PE6 bidirectional 5 V-tolerant (FT) GPIO; default function PE6, alternate function TRACED3.
6 VBAT power_in Backup power supply for the RTC and backup registers.
7 PC13-TAMPER-RTC bidirectional GPIO supplied through the power switch, which sinks at most 3 mA; use at 2 MHz max with 30 pF load and never as a current source (e.g. LED drive).
8 PC14-OSC32_IN bidirectional GPIO supplied through the power switch (3 mA sink limit, 2 MHz max with 30 pF load, not to be used as a current source); default function OSC32_IN for the 32.768 kHz oscillator.
9 PC15-OSC32_OUT bidirectional GPIO supplied through the power switch (3 mA sink limit, 2 MHz max with 30 pF load, not to be used as a current source); default function OSC32_OUT for the 32.768 kHz oscillator.
10 VSS_5 power_in Digital ground.
11 VDD_5 power_in Digital supply; the application supply and I/Os operate from 2.0 to 3.6 V.
12 OSC_IN input External 4-16 MHz crystal oscillator input (HSE); on LQFP100 PD0 is on pin 81 and needs no remap.
13 OSC_OUT output External 4-16 MHz crystal oscillator output (HSE).
14 NRST bidirectional Reset pin listed as I/O in Table 5; its electrical limits are in section 5.3.14, which is not in the supplied text.
15 PC0 bidirectional Standard I/O (not 5 V-tolerant); default function PC0, alternate function ADC12_IN10.
16 PC1 bidirectional Standard I/O (not 5 V-tolerant); default function PC1, alternate function ADC12_IN11.
17 PC2 bidirectional Standard I/O (not 5 V-tolerant); default function PC2, alternate function ADC12_IN12.
18 PC3 bidirectional Standard I/O (not 5 V-tolerant); default function PC3, alternate function ADC12_IN13.
19 VSSA power_in Analog ground for the ADC and reference.
20 VREF- power_in ADC negative reference voltage input.
21 VREF+ power_in ADC positive reference voltage input.
22 VDDA power_in Analog supply for the ADC; the temperature sensor conversion range requires 2 V < VDDA < 3.6 V.
23 PA0-WKUP bidirectional Standard I/O (not 5 V-tolerant); default function PA0, with WKUP wake-up and alternate functions USART2_CTS, ADC12_IN0, TIM2_CH1_ETR.
24 PA1 bidirectional Standard I/O (not 5 V-tolerant); default function PA1, alternate functions USART2_RTS, ADC12_IN1, TIM2_CH2.
25 PA2 bidirectional Standard I/O (not 5 V-tolerant); default function PA2, alternate functions USART2_TX, ADC12_IN2, TIM2_CH3.
26 PA3 bidirectional Standard I/O (not 5 V-tolerant); default function PA3, alternate functions USART2_RX, ADC12_IN3, TIM2_CH4.
27 VSS_4 power_in Digital ground.
28 VDD_4 power_in Digital supply; the application supply and I/Os operate from 2.0 to 3.6 V.
29 PA4 bidirectional Standard I/O (not 5 V-tolerant); default function PA4, alternate functions SPI1_NSS, USART2_CK, ADC12_IN4.
30 PA5 bidirectional Standard I/O (not 5 V-tolerant); default function PA5, alternate functions SPI1_SCK, ADC12_IN5.
31 PA6 bidirectional Standard I/O (not 5 V-tolerant); default function PA6, alternate functions SPI1_MISO, ADC12_IN6, TIM3_CH1, remap TIM1_BKIN.
32 PA7 bidirectional Standard I/O (not 5 V-tolerant); default function PA7, alternate functions SPI1_MOSI, ADC12_IN7, TIM3_CH2, remap TIM1_CH1N.
33 PC4 bidirectional Standard I/O (not 5 V-tolerant); default function PC4, alternate function ADC12_IN14.
34 PC5 bidirectional Standard I/O (not 5 V-tolerant); default function PC5, alternate function ADC12_IN15.
35 PB0 bidirectional Standard I/O (not 5 V-tolerant); default function PB0, alternate functions ADC12_IN8, TIM3_CH3, remap TIM1_CH2N.
36 PB1 bidirectional Standard I/O (not 5 V-tolerant); default function PB1, alternate functions ADC12_IN9, TIM3_CH4, remap TIM1_CH3N.
37 PB2/BOOT1 bidirectional 5 V-tolerant (FT) GPIO PB2, which also serves as the BOOT1 boot-mode pin.
38 PE7 bidirectional 5 V-tolerant (FT) GPIO; default function PE7, remap alternate function TIM1_ETR.
39 PE8 bidirectional 5 V-tolerant (FT) GPIO; default function PE8, remap alternate function TIM1_CH1N.
40 PE9 bidirectional 5 V-tolerant (FT) GPIO; default function PE9, remap alternate function TIM1_CH1.
41 PE10 bidirectional 5 V-tolerant (FT) GPIO; default function PE10, remap alternate function TIM1_CH2N.
42 PE11 bidirectional 5 V-tolerant (FT) GPIO; default function PE11, remap alternate function TIM1_CH2.
43 PE12 bidirectional 5 V-tolerant (FT) GPIO; default function PE12, remap alternate function TIM1_CH3N.
44 PE13 bidirectional 5 V-tolerant (FT) GPIO; default function PE13, remap alternate function TIM1_CH3.
45 PE14 bidirectional 5 V-tolerant (FT) GPIO; default function PE14, remap alternate function TIM1_CH4.
46 PE15 bidirectional 5 V-tolerant (FT) GPIO; default function PE15, remap alternate function TIM1_BKIN.
47 PB10 bidirectional 5 V-tolerant (FT) GPIO; default function PB10, alternate functions I2C2_SCL, USART3_TX, TIM2_CH3.
48 PB11 bidirectional 5 V-tolerant (FT) GPIO; default function PB11, alternate functions I2C2_SDA, USART3_RX, TIM2_CH4.
49 VSS_1 power_in Digital ground.
50 VDD_1 power_in Digital supply; the application supply and I/Os operate from 2.0 to 3.6 V.
51 PB12 bidirectional 5 V-tolerant (FT) GPIO; default function PB12, alternate functions SPI2_NSS, I2C2_SMBAL, USART3_CK, TIM1_BKIN.
52 PB13 bidirectional 5 V-tolerant (FT) GPIO; default function PB13, alternate functions SPI2_SCK, USART3_CTS, TIM1_CH1N.
53 PB14 bidirectional 5 V-tolerant (FT) GPIO; default function PB14, alternate functions SPI2_MISO, USART3_RTS, TIM1_CH2N.
54 PB15 bidirectional 5 V-tolerant (FT) GPIO; default function PB15, alternate functions SPI2_MOSI, TIM1_CH3N.
55 PD8 bidirectional 5 V-tolerant (FT) GPIO; default function PD8, alternate function USART3_TX.
56 PD9 bidirectional 5 V-tolerant (FT) GPIO; default function PD9, alternate function USART3_RX.
57 PD10 bidirectional 5 V-tolerant (FT) GPIO; default function PD10, alternate function USART3_CK.
58 PD11 bidirectional 5 V-tolerant (FT) GPIO; default function PD11, alternate function USART3_CTS.
59 PD12 bidirectional 5 V-tolerant (FT) GPIO; default function PD12, alternate functions TIM4_CH1 and USART3_RTS.
60 PD13 bidirectional 5 V-tolerant (FT) GPIO; default function PD13, alternate function TIM4_CH2.
61 PD14 bidirectional 5 V-tolerant (FT) GPIO; default function PD14, alternate function TIM4_CH3.
62 PD15 bidirectional 5 V-tolerant (FT) GPIO; default function PD15, alternate function TIM4_CH4.
63 PC6 bidirectional 5 V-tolerant (FT) GPIO; default function PC6, alternate function TIM3_CH1.
64 PC7 bidirectional 5 V-tolerant (FT) GPIO; default function PC7, alternate function TIM3_CH2.
65 PC8 bidirectional 5 V-tolerant (FT) GPIO; default function PC8, alternate function TIM3_CH3.
66 PC9 bidirectional 5 V-tolerant (FT) GPIO; default function PC9, alternate function TIM3_CH4.
67 PA8 bidirectional 5 V-tolerant (FT) GPIO; default function PA8, alternate functions USART1_CK, TIM1_CH1, MCO.
68 PA9 bidirectional 5 V-tolerant (FT) GPIO; default function PA9, alternate functions USART1_TX, TIM1_CH2.
69 PA10 bidirectional 5 V-tolerant (FT) GPIO; default function PA10, alternate functions USART1_RX, TIM1_CH3.
70 PA11 bidirectional 5 V-tolerant (FT) GPIO; default function PA11, alternate functions USART1_CTS, CANRX, USBDM, TIM1_CH4.
71 PA12 bidirectional 5 V-tolerant (FT) GPIO; default function PA12, alternate functions USART1_RTS, CANTX, USBDP, TIM1_ETR.
72 PA13 bidirectional 5 V-tolerant (FT) GPIO; default function JTMS/SWDIO (SWJ debug).
73 NC unconnected Listed as 'Not connected' for the LQFP100 package.
74 VSS_2 power_in Digital ground.
75 VDD_2 power_in Digital supply; the application supply and I/Os operate from 2.0 to 3.6 V.
76 PA14 bidirectional 5 V-tolerant (FT) GPIO; default function JTCK/SWCLK (SWJ debug).
77 PA15 bidirectional 5 V-tolerant (FT) GPIO; default function JTDI, alternate functions TIM2_CH1_ETR and SPI1_NSS (remap).
78 PC10 bidirectional 5 V-tolerant (FT) GPIO; default function PC10, alternate function USART3_TX.
79 PC11 bidirectional 5 V-tolerant (FT) GPIO; default function PC11, alternate function USART3_RX.
80 PC12 bidirectional 5 V-tolerant (FT) GPIO; default function PC12, alternate function USART3_CK.
81 PD0 bidirectional 5 V-tolerant (FT) GPIO; alternate function CANRX, and usable only at 50 MHz in output mode.
82 PD1 bidirectional 5 V-tolerant (FT) GPIO; alternate function CANTX, and usable only at 50 MHz in output mode.
83 PD2 bidirectional 5 V-tolerant (FT) GPIO; default function PD2, alternate function TIM3_ETR.
84 PD3 bidirectional 5 V-tolerant (FT) GPIO; default function PD3, alternate function USART2_CTS.
85 PD4 bidirectional 5 V-tolerant (FT) GPIO; default function PD4, alternate function USART2_RTS.
86 PD5 bidirectional 5 V-tolerant (FT) GPIO; default function PD5, alternate function USART2_TX.
87 PD6 bidirectional 5 V-tolerant (FT) GPIO; default function PD6, alternate function USART2_RX.
88 PD7 bidirectional 5 V-tolerant (FT) GPIO; default function PD7, alternate function USART2_CK.
89 PB3 bidirectional 5 V-tolerant (FT) GPIO; default function JTDO/TRACESWO, alternate functions TIM2_CH2 and SPI1_SCK (remap).
90 PB4 bidirectional 5 V-tolerant (FT) GPIO; default function JNTRST, alternate functions TIM3_CH1 and SPI1_MISO (remap).
91 PB5 bidirectional Standard I/O (not 5 V-tolerant); alternate functions I2C1_SMBAL, TIM3_CH2 and SPI1_MOSI (remap).
92 PB6 bidirectional 5 V-tolerant (FT) GPIO; default function PB6, alternate functions I2C1_SCL, TIM4_CH1, USART1_TX.
93 PB7 bidirectional 5 V-tolerant (FT) GPIO; default function PB7, alternate functions I2C1_SDA, TIM4_CH2, USART1_RX.
94 BOOT0 input Boot-mode selection input BOOT0; Table 5 gives no 5 V tolerance for this pin.
95 PB8 bidirectional 5 V-tolerant (FT) GPIO; default function PB8, alternate functions TIM4_CH3, I2C1_SCL, CANRX.
96 PB9 bidirectional 5 V-tolerant (FT) GPIO; default function PB9, alternate functions TIM4_CH4, I2C1_SDA, CANTX.
97 PE0 bidirectional 5 V-tolerant (FT) GPIO; default function PE0, alternate function TIM4_ETR.
98 PE1 bidirectional 5 V-tolerant (FT) GPIO; default function PE1, with no alternate function listed in Table 5.
99 VSS_3 power_in Digital ground.
100 VDD_3 power_in Digital supply; the application supply and I/Os operate from 2.0 to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F103VBT6TR
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f103vbt6tr-etched.step / stm32f103vbt6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f103vbt6tr.step / stm32f103vbt6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (117 pp, sha256 4741c03c5793745c, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF