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Contents

README

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STM32F103RFT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F103RFT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup battery supply pin for RTC and backup registers, voltage range 1.8 to 3.6 V
2 PC13-TAMPER-RTC bidirectional Port C pin 13 supplied through power switch, supports TAMPER-RTC alternate function
3 PC14-OSC32_IN bidirectional Port C pin 14 supplied through power switch, supports OSC32_IN low-speed external oscillator input
4 PC15-OSC32_OUT bidirectional Port C pin 15 supplied through power switch, supports OSC32_OUT low-speed external oscillator output
5 PD0-OSC_IN bidirectional High-speed external oscillator input pin, accepts 4 to 16 MHz clock
6 PD1-OSC_OUT bidirectional High-speed external oscillator output pin for crystal resonator
7 NRST input Active-low reset pin with integrated pull-up resistor and filtering
8 PC0 bidirectional Port C pin 0 with 5V tolerant I/O, supports ADC123_IN10
9 PC1 bidirectional Port C pin 1 with 5V tolerant I/O, supports ADC123_IN11
10 PC2 bidirectional Port C pin 2 with 5V tolerant I/O, supports ADC123_IN12
11 PC3 bidirectional Port C pin 3 with 5V tolerant I/O, supports ADC123_IN13
12 VSSA power_in Analog ground reference pin for ADC and DAC
13 VDDA power_in Analog power supply pin, voltage range 2.4 to 3.6 V
14 PA0-WKUP bidirectional Port A pin 0 with wakeup capability, supports USART2_CTS, ADC123_IN0, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR
15 PA1 bidirectional Port A pin 1 supports USART2_RTS, ADC123_IN1, TIM5_CH2
16 PA2 bidirectional Port A pin 2 supports USART2_TX, TIM5_CH3, ADC123_IN2, TIM9_CH1
17 PA3 bidirectional Port A pin 3 supports USART2_RX, TIM5_CH4, ADC123_IN3, TIM9_CH2
18 VSS power_in
19 VDD power_in
20 PA4 bidirectional Port A pin 4 supports SPI1_NSS, USART2_CK, DAC_OUT1, ADC12_IN4
21 PA5 bidirectional Port A pin 5 supports SPI1_SCK, DAC_OUT2, ADC12_IN5
22 PA6 bidirectional Port A pin 6 supports SPI1_MISO, TIM8_BKIN, ADC12_IN6, TIM13_CH1
23 PA7 bidirectional Port A pin 7 supports SPI1_MOSI, TIM8_CH1N, ADC12_IN7, TIM14_CH1
24 PC4 bidirectional Port C pin 4 with 5V tolerant I/O, supports ADC12_IN14
25 PC5 bidirectional Port C pin 5 with 5V tolerant I/O, supports ADC12_IN15
26 PB0 bidirectional Port B pin 0 supports ADC12_IN8, TIM3_CH3, TIM8_CH2N
27 PB1 bidirectional Port B pin 1 supports ADC12_IN9, TIM3_CH4, TIM8_CH3N
28 PB2 bidirectional Port B pin 2 with 5V tolerant I/O, supports boot mode selection
29 PB10 bidirectional Port B pin 10 with 5V tolerant I/O, supports I2C2_SCL, USART3_TX, TIM2_CH3
30 PB11 bidirectional Port B pin 11 with 5V tolerant I/O, supports I2C2_SDA, USART3_RX, TIM2_CH4
31 VSS power_in
32 VDD power_in
33 PB12 bidirectional Port B pin 12 with 5V tolerant I/O, supports SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK
34 PB13 bidirectional Port B pin 13 with 5V tolerant I/O, supports SPI2_SCK, I2S2_CK, USART3_CTS
35 PB14 bidirectional Port B pin 14 with 5V tolerant I/O, supports SPI2_MISO, TIM1_CH2N, USART3_RTS
36 PB15 bidirectional Port B pin 15 with 5V tolerant I/O, supports SPI2_MOSI, I2S2_SD, TIM1_CH3N
37 PC6 bidirectional Port C pin 6 with 5V tolerant I/O, supports I2S2_MCK, TIM8_CH1, SDIO_D6
38 PC7 bidirectional Port C pin 7 with 5V tolerant I/O, supports I2S3_MCK, TIM8_CH2, SDIO_D7
39 PC8 bidirectional Port C pin 8 with 5V tolerant I/O, supports TIM8_CH3, SDIO_D0
40 PC9 bidirectional Port C pin 9 with 5V tolerant I/O, supports TIM8_CH4, SDIO_D1
41 PA8 bidirectional Port A pin 8 with 5V tolerant I/O, supports USART1_CK, TIM1_CH1, MCO
42 PA9 bidirectional Port A pin 9 with 5V tolerant I/O, supports USART1_TX, TIM1_CH2
43 PA10 bidirectional Port A pin 10 with 5V tolerant I/O, supports USART1_RX, TIM1_CH3
44 PA11 bidirectional Port A pin 11 with 5V tolerant I/O, supports USART1_CTS, USBDM, CAN_RX, TIM1_CH4
45 PA12 bidirectional Port A pin 12 with 5V tolerant I/O, supports USART1_RTS, USBDP, CAN_TX, TIM1_ETR
46 PA13 bidirectional Port A pin 13 with 5V tolerant I/O, dedicated to JTMS-SWDIO debug interface
47 VSS power_in
48 VDD power_in
49 PA14 bidirectional Port A pin 14 with 5V tolerant I/O, dedicated to JTCK-SWCLK debug interface
50 PA15 bidirectional Port A pin 15 with 5V tolerant I/O, dedicated to JTDI, supports SPI3_NSS, I2S3_WS, TIM2_CH1_ETR
51 PC10 bidirectional Port C pin 10 with 5V tolerant I/O, supports UART4_TX, SDIO_D2, USART3_TX
52 PC11 bidirectional Port C pin 11 with 5V tolerant I/O, supports UART4_RX, SDIO_D3, USART3_RX
53 PC12 bidirectional Port C pin 12 with 5V tolerant I/O, supports UART5_TX, SDIO_CK, USART3_CK
54 PD2 bidirectional Port D pin 2 with 5V tolerant I/O, supports TIM3_ETR, UART5_RX, SDIO_CMD
55 PB3 bidirectional Port B pin 3 with 5V tolerant I/O, dedicated to JTDO and TRACESWO, supports SPI3_SCK, I2S3_CK, TIM2_CH2
56 PB4 bidirectional Port B pin 4 with 5V tolerant I/O, dedicated to NJTRST, supports SPI3_MISO
57 PB5 bidirectional Port B pin 5 supports I2C1_SMBA, SPI3_MOSI, I2S3_SD, TIM3_CH2
58 PB6 bidirectional Port B pin 6 with 5V tolerant I/O, supports I2C1_SCL, TIM4_CH1, USART1_TX
59 PB7 bidirectional Port B pin 7 with 5V tolerant I/O, supports I2C1_SDA, FSMC_NADV, TIM4_CH2, USART1_RX
60 BOOT0 input Boot mode pin for selecting boot source from Flash, SRAM, or system memory
61 PB8 bidirectional Port B pin 8 with 5V tolerant I/O, supports TIM4_CH3, SDIO_D4, TIM10_CH1, I2C1_SCL, CAN_RX
62 PB9 bidirectional
63 VSS power_in
64 VDD power_in

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F103RFT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f103rft6-etched.step / stm32f103rft6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f103rft6.step / stm32f103rft6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (120 pp, sha256 d4650f1e5a23ce6e, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF