component
STM32F103RCT6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F103RCT6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32F103RCT6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup power supply input (1.8 V to 3.6 V) for the RTC, the 32 kHz LSE oscillator and the backup registers when VDD is not present. |
| 2 | PC13-TAMPER-RTC | bidirectional | General-purpose I/O PC13 shared with the RTC TAMPER/alarm output; supplied through the backup power switch, limited to 3 mA sink/source and 2 MHz max toggle speed when configured as output. |
| 3 | PC14-OSC32_IN | bidirectional | General-purpose I/O PC14, alternatively used as the 32.768 kHz low-speed external (LSE) oscillator input; supplied through the backup switch with the same 3 mA output limitation as PC13/PC15. |
| 4 | PC15-OSC32_OUT | bidirectional | General-purpose I/O PC15, alternatively used as the 32.768 kHz low-speed external (LSE) oscillator output; supplied through the backup switch with the same 3 mA output limitation as PC13/PC14. |
| 5 | OSC_IN / PD0 | bidirectional | Default 4-16 MHz high-speed external (HSE) crystal/clock input; on the LQFP64 package this physical pin is shared with GPIO PD0, selectable by software remap (CAN_RX alternate function), since FSMC is not available in this package. |
| 6 | OSC_OUT / PD1 | bidirectional | Default high-speed external (HSE) crystal oscillator output; on the LQFP64 package this physical pin is shared with GPIO PD1, selectable by software remap (CAN_TX alternate function), since FSMC is not available in this package. |
| 7 | NRST | bidirectional | Bidirectional reset pin with a permanent internal pull-up (~40 kΩ, RPU); driving it low resets the device and it also reflects the internal reset temporization output. |
| 8 | PC0 | bidirectional | GPIO PC0 with alternate function ADC123_IN10, an analog input common to ADC1, ADC2 and ADC3. |
| 9 | PC1 | bidirectional | GPIO PC1 with alternate function ADC123_IN11, an analog input common to ADC1, ADC2 and ADC3. |
| 10 | PC2 | bidirectional | GPIO PC2 with alternate function ADC123_IN12, an analog input common to ADC1, ADC2 and ADC3. |
| 11 | PC3 | bidirectional | GPIO PC3 with alternate function ADC123_IN13, an analog input common to ADC1, ADC2 and ADC3 (not bonded on the WLCSP64 package variant). |
| 12 | VSSA | power_in | Analog ground reference for the ADC, DAC, reset block, RC oscillators and PLL. |
| 13 | VDDA | power_in | Analog power supply (2.0 to 3.6 V, minimum 2.4 V when ADC or DAC is used) for the ADC, DAC, reset block, RC oscillators and PLL; must be tied to VDD. |
| 14 | PA0-WKUP | bidirectional | 5V-tolerant GPIO PA0 with alternate functions WKUP (Standby-mode wakeup input), USART2_CTS, ADC123_IN0, TIM2_CH1_ETR, TIM5_CH1 and TIM8_ETR. |
| 15 | PA1 | bidirectional | 5V-tolerant GPIO PA1 with alternate functions USART2_RTS, ADC123_IN1, TIM5_CH2 and TIM2_CH2. |
| 16 | PA2 | bidirectional | 5V-tolerant GPIO PA2 with alternate functions USART2_TX, TIM5_CH3, ADC123_IN2 and TIM2_CH3. |
| 17 | PA3 | bidirectional | 5V-tolerant GPIO PA3 with alternate functions USART2_RX, TIM5_CH4, ADC123_IN3 and TIM2_CH4. |
| 18 | VSS_4 | power_in | Digital ground supply pin. |
| 19 | VDD_4 | power_in | Digital power supply pin, 2.0 to 3.6 V. |
| 20 | PA4 | bidirectional | 5V-tolerant GPIO PA4 with alternate functions SPI1_NSS, USART2_CK, DAC_OUT1 and ADC12_IN4. |
| 21 | PA5 | bidirectional | 5V-tolerant GPIO PA5 with alternate functions SPI1_SCK, DAC_OUT2 and ADC12_IN5. |
| 22 | PA6 | bidirectional | 5V-tolerant GPIO PA6 with alternate functions SPI1_MISO, TIM8_BKIN, ADC12_IN6, and remap functions TIM3_CH1 / TIM1_BKIN. |
| 23 | PA7 | bidirectional | 5V-tolerant GPIO PA7 with alternate functions SPI1_MOSI, TIM8_CH1N, ADC12_IN7, and remap functions TIM3_CH2 / TIM1_CH1N. |
| 24 | PC4 | bidirectional | GPIO PC4 with alternate function ADC12_IN14. |
| 25 | PC5 | bidirectional | GPIO PC5 with alternate function ADC12_IN15. |
| 26 | PB0 | bidirectional | 5V-tolerant GPIO PB0 with alternate functions ADC12_IN8, TIM3_CH3, and remap functions TIM8_CH2N / TIM1_CH2N. |
| 27 | PB1 | bidirectional | 5V-tolerant GPIO PB1 with alternate functions ADC12_IN9, TIM3_CH4, and remap functions TIM8_CH3N / TIM1_CH3N. |
| 28 | PB2/BOOT1 | bidirectional | 5V-tolerant GPIO PB2, also used as the BOOT1 boot-mode selection input sampled together with BOOT0 at reset. |
| 29 | PB10 | bidirectional | 5V-tolerant GPIO PB10 with alternate functions I2C2_SCL, USART3_TX, and remap function TIM2_CH3. |
| 30 | PB11 | bidirectional | 5V-tolerant GPIO PB11 with alternate functions I2C2_SDA, USART3_RX, and remap function TIM2_CH4. |
| 31 | VSS_1 | power_in | Digital ground supply pin. |
| 32 | VDD_1 | power_in | Digital power supply pin, 2.0 to 3.6 V. |
| 33 | PB12 | bidirectional | 5V-tolerant GPIO PB12 with alternate functions SPI2_NSS/I2S2_WS, I2C2_SMBA, USART3_CK and TIM1_BKIN. |
| 34 | PB13 | bidirectional | 5V-tolerant GPIO PB13 with alternate functions SPI2_SCK/I2S2_CK, USART3_CTS and TIM1_CH1N. |
| 35 | PB14 | bidirectional | 5V-tolerant GPIO PB14 with alternate functions SPI2_MISO, TIM1_CH2N and USART3_RTS. |
| 36 | PB15 | bidirectional | 5V-tolerant GPIO PB15 with alternate functions SPI2_MOSI/I2S2_SD and TIM1_CH3N. |
| 37 | PC6 | bidirectional | 5V-tolerant GPIO PC6 with alternate functions I2S2_MCK, TIM8_CH1, SDIO_D6, and remap function TIM3_CH1. |
| 38 | PC7 | bidirectional | 5V-tolerant GPIO PC7 with alternate functions I2S3_MCK, TIM8_CH2, SDIO_D7, and remap function TIM3_CH2. |
| 39 | PC8 | bidirectional | 5V-tolerant GPIO PC8 with alternate functions TIM8_CH3, SDIO_D0, and remap function TIM3_CH3. |
| 40 | PC9 | bidirectional | 5V-tolerant GPIO PC9 with alternate functions TIM8_CH4, SDIO_D1, and remap function TIM3_CH4. |
| 41 | PA8 | bidirectional | 5V-tolerant GPIO PA8 with alternate functions USART1_CK, TIM1_CH1 and MCO (microcontroller clock output). |
| 42 | PA9 | bidirectional | 5V-tolerant GPIO PA9 with alternate functions USART1_TX and TIM1_CH2. |
| 43 | PA10 | bidirectional | 5V-tolerant GPIO PA10 with alternate functions USART1_RX and TIM1_CH3. |
| 44 | PA11 | bidirectional | 5V-tolerant GPIO PA11 with alternate functions USART1_CTS, USB_DM, and remap functions CAN_RX / TIM1_CH4. |
| 45 | PA12 | bidirectional | 5V-tolerant GPIO PA12 with alternate functions USART1_RTS, USB_DP, and remap functions CAN_TX / TIM1_ETR. |
| 46 | PA13 | bidirectional | 5V-tolerant pin, default JTMS/SWDIO debug function; remappable to GPIO PA13. |
| 47 | VSS_2 | power_in | Digital ground supply pin. |
| 48 | VDD_2 | power_in | Digital power supply pin, 2.0 to 3.6 V. |
| 49 | PA14 | bidirectional | 5V-tolerant pin, default JTCK/SWCLK debug function; remappable to GPIO PA14. |
| 50 | PA15 | bidirectional | 5V-tolerant pin, default JTDI debug function with alternate SPI3_NSS/I2S3_WS and TIM2_CH1_ETR; remappable to PA15/SPI1_NSS. |
| 51 | PC10 | bidirectional | 5V-tolerant GPIO PC10 with alternate functions UART4_TX, SDIO_D2, and remap function USART3_TX. |
| 52 | PC11 | bidirectional | 5V-tolerant GPIO PC11 with alternate functions UART4_RX, SDIO_D3, and remap function USART3_RX. |
| 53 | PC12 | bidirectional | 5V-tolerant GPIO PC12 with alternate functions UART5_TX, SDIO_CK, and remap function USART3_CK. |
| 54 | PD2 | bidirectional | 5V-tolerant GPIO PD2 with alternate functions TIM3_ETR, UART5_RX and SDIO_CMD. |
| 55 | PB3 | bidirectional | 5V-tolerant pin, default JTDO/TRACESWO debug function with alternate SPI3_SCK/I2S3_CK; remappable to TIM2_CH2 / SPI1_SCK / GPIO PB3. |
| 56 | PB4 | bidirectional | 5V-tolerant pin, default NJTRST debug function with alternate SPI3_MISO; remappable to TIM3_CH1 / SPI1_MISO / GPIO PB4. |
| 57 | PB5 | bidirectional | GPIO PB5 with alternate functions I2C1_SMBA, SPI3_MOSI/I2S3_SD, and remap functions TIM3_CH2 / SPI1_MOSI. |
| 58 | PB6 | bidirectional | 5V-tolerant GPIO PB6 with alternate functions I2C1_SCL, TIM4_CH1, and remap function USART1_TX. |
| 59 | PB7 | bidirectional | 5V-tolerant GPIO PB7 with alternate functions I2C1_SDA, TIM4_CH2, and remap function USART1_RX (the FSMC_NADV alternate listed in the general pin table is not available on the LQFP64 package since FSMC is not present). |
| 60 | BOOT0 | input | Dedicated boot-mode selection input, sampled together with BOOT1 (PB2) at reset to select the boot source (main Flash, system memory or embedded SRAM). |
| 61 | PB8 | bidirectional | 5V-tolerant GPIO PB8 with alternate functions TIM4_CH3, SDIO_D4, and remap functions I2C1_SCL / CAN_RX. |
| 62 | PB9 | bidirectional | 5V-tolerant GPIO PB9 with alternate functions TIM4_CH4, SDIO_D5, and remap functions I2C1_SDA / CAN_TX. |
| 63 | VSS_3 | power_in | Digital ground supply pin. |
| 64 | VDD_3 | power_in | Digital power supply pin, 2.0 to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32F103RCT6TR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32f103rct6tr-etched.step/stm32f103rct6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f103rct6tr.step/stm32f103rct6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (145 pp, sha256
af2650d57be2838a, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).