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STM32F103CBT7
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F103CBT7
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32F103CBT7 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup supply for RTC and backup registers, 1.8 to 3.6 V |
| 2 | PC13-TAMPER-RTC | bidirectional | General-purpose I/O port on backup domain or tamper alarm input |
| 3 | PC14-OSC32_IN | bidirectional | 32 kHz oscillator input on backup domain |
| 4 | PC15-OSC32_OUT | bidirectional | 32 kHz oscillator output on backup domain |
| 5 | OSC_IN | input | Main oscillator input for external high-speed crystal, 4 to 16 MHz |
| 6 | OSC_OUT | output | Main oscillator output for external high-speed crystal |
| 7 | NRST | bidirectional | External reset pin with internal pull-up, active low |
| 8 | VSSA | power_in | Analog ground |
| 9 | VDDA | power_in | Analog power supply, 1.8 to 3.6 V |
| 10 | PA0-WKUP | bidirectional | General-purpose I/O port with external wakeup capability |
| 11 | PA1 | bidirectional | General-purpose I/O port, supports USART2_RTS, ADC12_IN1, TIM2_CH2 |
| 12 | PA2 | bidirectional | General-purpose I/O port, supports USART2_TX, ADC12_IN2, TIM2_CH3 |
| 13 | PA3 | bidirectional | General-purpose I/O port, supports USART2_RX, ADC12_IN3, TIM2_CH4 |
| 14 | PA4 | bidirectional | General-purpose I/O port, supports SPI1_NSS, USART2_CK, ADC12_IN4 |
| 15 | PA5 | bidirectional | General-purpose I/O port, supports SPI1_SCK, ADC12_IN5 |
| 16 | PA6 | bidirectional | General-purpose I/O port, supports SPI1_MISO, ADC12_IN6, TIM3_CH1 |
| 17 | PA7 | bidirectional | General-purpose I/O port, supports SPI1_MOSI, ADC12_IN7, TIM3_CH2 |
| 18 | PB0 | bidirectional | General-purpose I/O port, supports ADC12_IN8, TIM3_CH3 |
| 19 | PB1 | bidirectional | General-purpose I/O port, supports ADC12_IN9, TIM3_CH4 |
| 20 | PB2 | bidirectional | General-purpose I/O port, BOOT1 configuration pin |
| 21 | PB10 | bidirectional | 5 V tolerant general-purpose I/O port, supports I2C2_SCL, USART3_TX |
| 22 | PB11 | bidirectional | 5 V tolerant general-purpose I/O port, supports I2C2_SDA, USART3_RX |
| 23 | VSS_1 | power_in | Ground |
| 24 | VDD_1 | power_in | Main power supply, 1.8 to 3.6 V |
| 25 | PB12 | bidirectional | 5 V tolerant general-purpose I/O port, supports SPI2_NSS, I2C2_SMBAI, USART3_CK |
| 26 | PB13 | bidirectional | 5 V tolerant general-purpose I/O port, supports SPI2_SCK, USART3_CTS |
| 27 | PB14 | bidirectional | 5 V tolerant general-purpose I/O port, supports SPI2_MISO, USART3_RTS |
| 28 | PB15 | bidirectional | 5 V tolerant general-purpose I/O port, supports SPI2_MOSI |
| 29 | PA8 | bidirectional | 5 V tolerant general-purpose I/O port, supports USART1_CK, TIM1_CH1, MCO |
| 30 | PA9 | bidirectional | 5 V tolerant general-purpose I/O port, supports USART1_TX, TIM1_CH2 |
| 31 | PA10 | bidirectional | 5 V tolerant general-purpose I/O port, supports USART1_RX, TIM1_CH3 |
| 32 | PA11 | bidirectional | 5 V tolerant general-purpose I/O port, supports USART1_CTS, CAN_RX, USB_DM, TIM1_CH4 |
| 33 | PA12 | bidirectional | 5 V tolerant general-purpose I/O port, supports USART1_RTS, CAN_TX, USB_DP, TIM1_ETR |
| 34 | PA13 | bidirectional | 5 V tolerant general-purpose I/O port or JTMS/SWDIO debug port |
| 35 | VSS_2 | power_in | Ground |
| 36 | VDD_2 | power_in | Main power supply, 1.8 to 3.6 V |
| 37 | PA14 | bidirectional | 5 V tolerant general-purpose I/O port or JTCK/SWCLK debug port |
| 38 | PA15 | bidirectional | 5 V tolerant general-purpose I/O port or JTDI debug port, remappable to TIM2_CH1_ETR or SPI1_NSS |
| 39 | PB3 | bidirectional | 5 V tolerant general-purpose I/O port or JTDO/TRACESWO debug port, remappable to TIM2_CH2 or SPI1_SCK |
| 40 | PB4 | bidirectional | 5 V tolerant general-purpose I/O port or JNTRST debug port, remappable to TIM3_CH1 or SPI1_MISO |
| 41 | PB5 | bidirectional | General-purpose I/O port, supports I2C1_SMBA, remappable to TIM3_CH2 or SPI1_MOSI |
| 42 | PB6 | bidirectional | 5 V tolerant general-purpose I/O port, supports I2C1_SCL, remappable to TIM4_CH1 or USART1_TX |
| 43 | PB7 | bidirectional | 5 V tolerant general-purpose I/O port, supports I2C1_SDA, remappable to TIM4_CH2 or USART1_RX |
| 44 | BOOT0 | input | Boot configuration pin, sampled at reset to select boot mode |
| 45 | PB8 | bidirectional | 5 V tolerant general-purpose I/O port, supports TIM4_CH3, remappable to I2C1_SCL or CAN_RX |
| 46 | PB9 | bidirectional | 5 V tolerant general-purpose I/O port, supports TIM4_CH4, remappable to I2C1_SDA or CAN_TX |
| 47 | VSS_3 | power_in | Ground |
| 48 | VDD_3 | power_in | Main power supply, 1.8 to 3.6 V |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32F103CBT7 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32f103cbt7-etched.step/stm32f103cbt7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f103cbt7.step/stm32f103cbt7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (117 pp, sha256
4741c03c5793745c, retrieved 2026-10-01, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).