component
STM32F103C8T6-TD
Public Made by Adomby adom
TDSEMIC Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSTM32F103C8T6-TD
TDSEMIC · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32F103C8T6-TD from TDSEMIC, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup domain power supply pin, 1.8V to 3.6V range. |
| 2 | PC13-TAMPER-RTC | bidirectional | STD 3.3V standard I/O PC13 with default alternate function TAMPER-RTC. |
| 3 | PC14-OSC32_IN | bidirectional | STD 3.3V standard I/O PC14 with default alternate function OSC32_IN (32.768kHz crystal input). |
| 4 | PC15-OSC32_OUT | bidirectional | STD 3.3V standard I/O PC15 with default alternate function OSC32_OUT (32.768kHz crystal output). |
| 5 | PD0-OSC_IN | input | OSC_IN input, STD structure, remappable as PD0 (HSE 4-16MHz crystal/ceramic resonator input). |
| 6 | PD1-OSC_OUT | output | OSC_OUT output, STD structure, remappable as PD1 (HSE crystal/ceramic resonator output). |
| 7 | NRST | bidirectional | Bidirectional reset pin with built-in weak pull-up resistor (RST structure). |
| 8 | VSSA | power_in | Analog ground supply pin. |
| 9 | VDDA | power_in | Analog power supply pin, 2.0V to 3.6V range. |
| 10 | PA0-WKUP | bidirectional | STDA I/O PA0 with WKUP, USART2_CTS, ADC12_IN0 and TMR2_CH1_ETR alternate functions. |
| 11 | PA1 | bidirectional | STDA I/O with USART2_RTS, ADC12_IN1 and TMR2_CH2 alternate functions. |
| 12 | PA2 | bidirectional | STDA I/O with USART2_TX, ADC12_IN2 and TMR2_CH3 alternate functions. |
| 13 | PA3 | bidirectional | STDA I/O with USART2_RX, ADC12_IN3 and TMR2_CH4 alternate functions. |
| 14 | PA4 | bidirectional | STDA I/O with SPI1_NSS, USART2_CK and ADC12_IN4 alternate functions. |
| 15 | PA5 | bidirectional | STDA I/O with SPI1_SCK and ADC12_IN5 alternate functions. |
| 16 | PA6 | bidirectional | STDA I/O with SPI1_MISO, ADC12_IN6 and TMR3_CH1 alternate functions; remap TMR1_BKIN. |
| 17 | PA7 | bidirectional | STDA I/O with SPI1_MOSI, ADC12_IN7 and TMR3_CH2 alternate functions; remap TMR1_CH1N. |
| 18 | PB0 | bidirectional | STDA I/O with ADC12_IN8 and TMR3_CH3 alternate functions; remap TMR1_CH2N. |
| 19 | PB1 | bidirectional | STDA I/O with ADC12_IN9 and TMR3_CH4 alternate functions; remap TMR1_CH3N. |
| 20 | PB2 | bidirectional | 5V-tolerant (5T) I/O, PB2 which also serves as BOOT1 after reset. |
| 21 | PB10 | bidirectional | 5V-tolerant I/O with I2C2_SCL and USART3_TX alternate functions; remap TMR2_CH3. |
| 22 | PB11 | bidirectional | 5V-tolerant I/O with I2C2_SDA and USART3_RX alternate functions; remap TMR2_CH4. |
| 23 | VSS_1 | power_in | Digital ground supply pin. |
| 24 | VDD_1 | power_in | Digital power supply pin, 2.0V to 3.6V range. |
| 25 | PB12 | bidirectional | 5V-tolerant I/O with SPI2_NSS, I2C2_SMBAI, USART3_CK and TMR1_BKIN alternate functions. |
| 26 | PB13 | bidirectional | 5V-tolerant I/O with SPI2_SCK, USART3_CTS and TMR1_CH1N alternate functions. |
| 27 | PB14 | bidirectional | 5V-tolerant I/O with SPI2_MISO, USART3_RTS and TMR1_CH2N alternate functions. |
| 28 | PB15 | bidirectional | 5V-tolerant I/O with SPI2_MOSI and TMR1_CH3N alternate functions. |
| 29 | PA8 | bidirectional | 5V-tolerant I/O with USART1_CK, TMR1_CH1 and MCO alternate functions. |
| 30 | PA9 | bidirectional | 5V-tolerant I/O with USART1_TX and TMR1_CH2 alternate functions. |
| 31 | PA10 | bidirectional | 5V-tolerant I/O with USART1_RX and TMR1_CH3 alternate functions. |
| 32 | PA11 | bidirectional | 5V-tolerant I/O with USART1_CTS, USBDDM, CAN_RX and TMR1_CH4 alternate functions. |
| 33 | PA12 | bidirectional | 5V-tolerant I/O with USART1_RTS, USBDDP, CAN_TX and TMR1_ETR alternate functions. |
| 34 | PA13 | bidirectional | 5V-tolerant I/O, reset function JTMS/SWDIO. |
| 35 | VSS_2 | power_in | Digital ground supply pin. |
| 36 | VDD_2 | power_in | Digital power supply pin, 2.0V to 3.6V range. |
| 37 | PA14 | bidirectional | 5V-tolerant I/O, reset function JTCK/SWCLK. |
| 38 | PA15 | bidirectional | 5V-tolerant I/O, reset function JTDI, remap TMR2_CH1_ETR/PA15. |
| 39 | PB3 | bidirectional | I/O pin PB3 shown at pin 39 in the LQFP48 pinout diagram. |
| 40 | PB4 | bidirectional | I/O pin PB4 shown at pin 40 in the LQFP48 pinout diagram. |
| 41 | PB5 | bidirectional | I/O pin PB5 shown at pin 41 in the LQFP48 pinout diagram. |
| 42 | PB6 | bidirectional | I/O pin PB6 shown at pin 42 in the LQFP48 pinout diagram. |
| 43 | PB7 | bidirectional | I/O pin PB7 shown at pin 43 in the LQFP48 pinout diagram. |
| 44 | BOOT0 | input | Dedicated Boot0 pin (type B) shown at pin 44 in the LQFP48 pinout diagram. |
| 45 | PB8 | bidirectional | I/O pin PB8 shown at pin 45 in the LQFP48 pinout diagram. |
| 46 | PB9 | bidirectional | I/O pin PB9 shown at pin 46 in the LQFP48 pinout diagram. |
| 47 | VSS_3 | power_in | Digital ground supply pin shown at pin 47 in the LQFP48 pinout diagram. |
| 48 | VDD_3 | power_in | Digital power supply pin shown at pin 48 in the LQFP48 pinout diagram. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TDSEMIC |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32F103C8T6-TD - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32f103c8t6-td-etched.step/stm32f103c8t6-td-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f103c8t6-td.step/stm32f103c8t6-td.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TDSEMIC datasheet (57 pp, sha256
a0b97873550cc31c, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).