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STM32F103C6T6ATR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32F103C6T6ATR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32F103C6T6ATR from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Battery supply pin, operating voltage range 2.0 to 3.6 V for RTC and backup register supply.
2 PC13 bidirectional Port C bit 13 with TAMPER-RTC alternate function; output limited to 2 MHz with 30 pF load maximum, cannot source current (footnote 5).
3 PC14 bidirectional Port C bit 14, 32 kHz oscillator input main function; output speed limited to 2 MHz with 30 pF load maximum (footnote 5).
4 PC15 bidirectional Port C bit 15, 32 kHz oscillator output main function; output speed limited to 2 MHz with 30 pF load maximum (footnote 5).
5 OSC_IN input Main oscillator input for 4 to 16 MHz external crystal; remappable to PD0 GPIO (footnote 7).
6 OSC_OUT output Main oscillator output for external crystal resonator feedback; remappable to PD1 GPIO (footnote 7).
7 NRST input Active-low reset input pin, accepts voltages from 0 V to VDD with internal pull-up.
8 VSSA power_in Analog ground reference pin for ADC supply.
9 VDDA power_in Analog supply voltage pin, operating range 2.0 to 3.6 V for ADC and temperature sensor.
10 PA0 bidirectional Port A bit 0 / wakeup pin; supports ADC12_IN0, USART2_CTS, TIM2_CH1_ETR alternate functions.
11 PA1 bidirectional Port A bit 1; supports ADC12_IN1, USART2_RTS, TIM2_CH2 alternate functions.
12 PA2 bidirectional Port A bit 2; supports ADC12_IN2, USART2_TX, TIM2_CH3 alternate functions.
13 PA3 bidirectional Port A bit 3; supports ADC12_IN3, USART2_RX, TIM2_CH4 alternate functions.
14 PA4 bidirectional Port A bit 4; supports ADC12_IN4, SPI1_NSS, USART2_CK alternate functions.
15 PA5 bidirectional Port A bit 5; supports ADC12_IN5, SPI1_SCK alternate functions.
16 PA6 bidirectional Port A bit 6; supports ADC12_IN6, SPI1_MISO, TIM3_CH1 functions; remappable to TIM1_BKIN (footnote 9).
17 PA7 bidirectional Port A bit 7; supports ADC12_IN7, SPI1_MOSI, TIM3_CH2 functions; remappable to TIM1_CH1N (footnote 9).
18 PB0 bidirectional Port B bit 0; supports ADC12_IN8, TIM3_CH3 functions; remappable to TIM1_CH2N (footnote 9).
19 PB1 bidirectional Port B bit 1; supports ADC12_IN9, TIM3_CH4 functions; remappable to TIM1_CH3N (footnote 9).
20 PB2 bidirectional Port B bit 2 / BOOT1 boot select pin; 5 V tolerant I/O.
21 PB10 bidirectional Port B bit 10, 5 V tolerant; remappable to TIM2_CH3 alternate function.
22 PB11 bidirectional Port B bit 11, 5 V tolerant; remappable to TIM2_CH4 alternate function.
23 VSS_1 power_in Ground reference pin for digital supply.
24 VDD_1 power_in Digital supply voltage pin, operating range 2.0 to 3.6 V.
25 PB12 bidirectional Port B bit 12, 5 V tolerant; supports TIM1_BKIN alternate function.
26 PB13 bidirectional Port B bit 13, 5 V tolerant; supports TIM1_CH1N alternate function.
27 PB14 bidirectional Port B bit 14, 5 V tolerant; supports TIM1_CH2N alternate function.
28 PB15 bidirectional Port B bit 15, 5 V tolerant; supports TIM1_CH3N alternate function.
29 PA8 bidirectional Port A bit 8, 5 V tolerant; supports USART1_CK, TIM1_CH1, MCO (master clock output) functions.
30 PA9 bidirectional Port A bit 9, 5 V tolerant; supports USART1_TX, TIM1_CH2 alternate functions.
31 PA10 bidirectional Port A bit 10, 5 V tolerant; supports USART1_RX, TIM1_CH3 alternate functions.
32 PA11 bidirectional Port A bit 11, 5 V tolerant; supports USART1_CTS, CAN_RX, TIM1_CH4, USBDM (USB D minus) alternate functions.
33 PA12 bidirectional Port A bit 12, 5 V tolerant; supports USART1_RTS, CAN_TX, TIM1_ETR, USBDP (USB D plus) alternate functions.
34 PA13 bidirectional Port A bit 13 / JTMS-SWDIO, 5 V tolerant; JTAG test mode select or SWD data I/O debug interface pin.
35 VSS_2 power_in Ground reference pin for digital supply.
36 VDD_2 power_in Digital supply voltage pin, operating range 2.0 to 3.6 V.
37 PA14 bidirectional Port A bit 14 / JTCK-SWCLK, 5 V tolerant; JTAG test clock or SWD clock debug interface pin.
38 PA15 bidirectional Port A bit 15 / JTDI, 5 V tolerant; JTAG test data input debug interface; remappable to TIM2_CH1_ETR, SPI1_NSS (footnote 9).
39 PB3 bidirectional Port B bit 3 / JTDO, 5 V tolerant; JTAG test data output debug interface; remappable to TIM2_CH2, TRACESWO (footnote 9).
40 PB4 bidirectional Port B bit 4 / NJTRST, 5 V tolerant; JTAG test reset debug interface; remappable to TIM3_CH1, SPI1_MISO (footnote 9).
41 PB5 bidirectional Port B bit 5; supports I2C1_SMBA alternate function; remappable to TIM3_CH2, SPI1_MOSI (footnote 9).
42 PB6 bidirectional Port B bit 6, 5 V tolerant; I2C1_SCL main function; supports USART1_TX alternate function.
43 PB7 bidirectional Port B bit 7, 5 V tolerant; I2C1_SDA main function; supports USART1_RX alternate function.
44 BOOT0 input Boot mode selection input pin; sampled at reset to select boot from Flash memory (low) or system bootloader (high).
45 PB8 bidirectional Port B bit 8, 5 V tolerant; remappable to I2C1_SCL, CAN_RX alternate functions.
46 PB9 bidirectional Port B bit 9, 5 V tolerant; remappable to I2C1_SDA, CAN_TX alternate functions.
47 VSS_3 power_in Ground reference pin for digital supply.
48 VDD_3 power_in Digital supply voltage pin, operating range 2.0 to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32F103C6T6ATR
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f103c6t6atr-etched.step / stm32f103c6t6atr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f103c6t6atr.step / stm32f103c6t6atr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (99 pp, sha256 31ab1fe3de6e6cf3, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF