component
STM32F103C4T6A
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+84@@ -0,0 +1,84 @@+# STM32F103C4T6A++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)++STM32F103C4T6A from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup-domain supply pin for the RTC and backup registers (VBAT supply, per the Features list). |+| 2 | PC13-TAMPER-RTC | bidirectional | GPIO PC13 with TAMPER-RTC function; supplied through the power switch, so it sinks at most 3 mA, output speed must not exceed 2 MHz with a 30 pF maximum load, and it must not be used as a current source such as an LED driver. |+| 3 | PC14-OSC32_IN | bidirectional | GPIO PC14 with OSC32_IN function; power-switch supplied with the same limits as PC13 (3 mA sink, 2 MHz maximum output speed at 30 pF, not a current source). |+| 4 | PC15-OSC32_OUT | bidirectional | GPIO PC15 with OSC32_OUT function; power-switch supplied with the same limits as PC13 (3 mA sink, 2 MHz maximum output speed at 30 pF, not a current source). |+| 5 | OSC_IN | input | External oscillator input for the 4 to 16 MHz crystal; after reset this pin is OSC_IN and PD0 can be remapped onto it by software. |+| 6 | OSC_OUT | output | External oscillator output for the 4 to 16 MHz crystal; after reset this pin is OSC_OUT and PD1 can be remapped onto it by software. |+| 7 | NRST | bidirectional | Active reset pin of the microcontroller, with electrical limits given in the NRST pin characteristics section (5.3.14). |+| 8 | VSSA | power_in | Analog ground for the ADC and analog circuitry. |+| 9 | VDDA | power_in | Analog supply for the ADC and analog blocks; the ADC conversion range is 0 to 3.6 V and the temperature sensor requires 2 V < VDDA < 3.6 V. |+| 10 | PA0-WKUP | bidirectional | GPIO PA0 with WKUP, USART2_CTS, ADC12_IN0 and TIM2_CH1_ETR alternate functions; no 5 V tolerance marking in Table 5. |+| 11 | PA1 | bidirectional | GPIO PA1 with USART2_RTS, ADC12_IN1 and TIM2_CH2 alternate functions; no 5 V tolerance marking in Table 5. |+| 12 | PA2 | bidirectional | GPIO PA2 with USART2_TX, ADC12_IN2 and TIM2_CH3 alternate functions; no 5 V tolerance marking in Table 5. |+| 13 | PA3 | bidirectional | GPIO PA3 with USART2_RX, ADC12_IN3 and TIM2_CH4 alternate functions; no 5 V tolerance marking in Table 5. |+| 14 | PA4 | bidirectional | GPIO PA4 with SPI1_NSS, USART2_CK and ADC12_IN4 alternate functions; no 5 V tolerance marking in Table 5. |+| 15 | PA5 | bidirectional | GPIO PA5 with SPI1_SCK and ADC12_IN5 alternate functions; no 5 V tolerance marking in Table 5. |+| 16 | PA6 | bidirectional | GPIO PA6 with SPI1_MISO, ADC12_IN6 and TIM3_CH1 alternate functions (TIM1_BKIN remap); no 5 V tolerance marking in Table 5. |+| 17 | PA7 | bidirectional | GPIO PA7 with SPI1_MOSI, ADC12_IN7 and TIM3_CH2 alternate functions (TIM1_CH1N remap); no 5 V tolerance marking in Table 5. |+| 18 | PB0 | bidirectional | GPIO PB0 with ADC12_IN8 and TIM3_CH3 alternate functions (TIM1_CH2N remap); no 5 V tolerance marking in Table 5. |+| 19 | PB1 | bidirectional | GPIO PB1 with ADC12_IN9 and TIM3_CH4 alternate functions (TIM1_CH3N remap); no 5 V tolerance marking in Table 5. |+| 20 | PB2/BOOT1 | bidirectional | GPIO PB2 that also serves as the BOOT1 boot-mode pin; 5 V tolerant (FT) per Table 5. |+| 21 | PB10 | bidirectional | GPIO PB10 with TIM2_CH3 remap alternate function; 5 V tolerant (FT) per Table 5. |+| 22 | PB11 | bidirectional | GPIO PB11 with TIM2_CH4 remap alternate function; 5 V tolerant (FT) per Table 5. |+| 23 | VSS_1 | power_in | Digital ground pin 1 of the device. |+| 24 | VDD_1 | power_in | Digital supply pin 1; the application supply for I/Os and core is 2.0 to 3.6 V per the Features list. |+| 25 | PB12 | bidirectional | GPIO PB12 with TIM1_BKIN alternate function; 5 V tolerant (FT) per Table 5. |+| 26 | PB13 | bidirectional | GPIO PB13 with TIM1_CH1N alternate function; 5 V tolerant (FT) per Table 5. |+| 27 | PB14 | bidirectional | GPIO PB14 with TIM1_CH2N alternate function; 5 V tolerant (FT) per Table 5. |+| 28 | PB15 | bidirectional | GPIO PB15 with TIM1_CH3N alternate function; 5 V tolerant (FT) per Table 5. |+| 29 | PA8 | bidirectional | GPIO PA8 with USART1_CK, TIM1_CH1 and MCO alternate functions; 5 V tolerant (FT) per Table 5. |+| 30 | PA9 | bidirectional | GPIO PA9 with USART1_TX and TIM1_CH2 alternate functions; 5 V tolerant (FT) per Table 5. |+| 31 | PA10 | bidirectional | GPIO PA10 with USART1_RX and TIM1_CH3 alternate functions; 5 V tolerant (FT) per Table 5. |+| 32 | PA11 | bidirectional | GPIO PA11 with USART1_CTS, CAN_RX, TIM1_CH4 and USBDM alternate functions; 5 V tolerant (FT) per Table 5. |+| 33 | PA12 | bidirectional | GPIO PA12 with USART1_RTS, CAN_TX, TIM1_ETR and USBDP alternate functions; 5 V tolerant (FT) per Table 5. |+| 34 | PA13 | bidirectional | GPIO PA13 that is also the JTMS/SWDIO debug pin after reset; 5 V tolerant (FT) per Table 5. |+| 35 | VSS_2 | power_in | Digital ground pin 2 of the device. |+| 36 | VDD_2 | power_in | Digital supply pin 2; the application supply for I/Os and core is 2.0 to 3.6 V per the Features list. |+| 37 | PA14 | bidirectional | GPIO PA14 that is also the JTCK/SWCLK debug pin after reset; 5 V tolerant (FT) per Table 5. |+| 38 | PA15 | bidirectional | GPIO PA15 that is also the JTDI debug pin after reset, with TIM2_CH1_ETR and SPI1_NSS remap alternate functions; 5 V tolerant (FT) per Table 5. |+| 39 | PB3 | bidirectional | GPIO PB3 that is also the JTDO debug pin after reset, with TIM2_CH2 and TRACESWO remap alternate functions; 5 V tolerant (FT) per Table 5. |+| 40 | PB4 | bidirectional | GPIO PB4 that is also the NJTRST debug pin after reset, with TIM3_CH1 and SPI1_MISO remap alternate functions; 5 V tolerant (FT) per Table 5. |+| 41 | PB5 | bidirectional | GPIO PB5 with I2C1_SMBA alternate function and TIM3_CH2 and SPI1_MOSI remap options; no 5 V tolerance marking in Table 5. |+| 42 | PB6 | bidirectional | GPIO PB6 with I2C1_SCL and USART1_TX alternate functions; 5 V tolerant (FT) per Table 5. |+| 43 | PB7 | bidirectional | GPIO PB7 with I2C1_SDA and USART1_RX alternate functions; 5 V tolerant (FT) per Table 5. |+| 44 | BOOT0 | input | Boot-mode selection input BOOT0 (listed as an input without 5 V tolerance in Table 5). |+| 45 | PB8 | bidirectional | GPIO PB8 with I2C1_SCL and CAN_RX remap alternate functions; 5 V tolerant (FT) per Table 5. |+| 46 | PB9 | bidirectional | GPIO PB9 with I2C1_SDA and CAN_TX remap alternate functions; 5 V tolerant (FT) per Table 5. |+| 47 | VSS_3 | power_in | Digital ground pin 3 of the device. |+| 48 | VDD_3 | power_in | Digital supply pin 3; the application supply for I/Os and core is 2.0 to 3.6 V per the Features list. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-48(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 48 |++## CAD (KiCad official)++- Symbol: `STM32F103C4T6A`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32f103c4t6a-etched.step` / `stm32f103c4t6a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f103c4t6a.step` / `stm32f103c4t6a.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923652314714112) (99 pp, sha256 `31ab1fe3de6e6cf3`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f103c4t6a-datasheet.pdf)
page.jsonadded+439@@ -0,0 +1,439 @@+{+ "slug": "stm32f103c4t6a",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32f103c4t6a",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32f103c4t6a.kicad_sym",+ "stm32f103c4t6a.kicad_mod",+ "stm32f103c4t6a.glb",+ "stm32f103c4t6a.step",+ "stm32f103c4t6a.lbr",+ "docs/hero.png",+ "docs/stm32f103c4t6a-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32f103c4t6a-hero.glb",+ "stm32f103c4t6a-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32F103C4T6A",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-48(7x7)",+ "pin_count": 48,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923652314714112",+ "parts": {+ "symbol": "stm32f103c4t6a.kicad_sym",+ "footprint": "stm32f103c4t6a.kicad_mod",+ "model_3d": "stm32f103c4t6a-hero.glb",+ "model_3d_plain": "stm32f103c4t6a.glb",+ "model_3d_step": "stm32f103c4t6a-etched.step",+ "model_3d_step_plain": "stm32f103c4t6a.step",+ "lbr": "stm32f103c4t6a.lbr"+ },+ "distributor_links": {+ "lcsc": "C1337116",+ "digikey": "497-8316-ND",+ "mouser": "511-STM32F103C4T6A"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T04:22:50Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-8316-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32F103C4T6A",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup-domain supply pin for the RTC and backup registers (VBAT supply, per the Features list)."+ },+ {+ "number": "2",+ "name": "PC13-TAMPER-RTC",+ "type": "bidirectional",+ "description": "GPIO PC13 with TAMPER-RTC function; supplied through the power switch, so it sinks at most 3 mA, output speed must not exceed 2 MHz with a 30 pF maximum load, and it must not be used as a current source such as an LED driver."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "GPIO PC14 with OSC32_IN function; power-switch supplied with the same limits as PC13 (3 mA sink, 2 MHz maximum output speed at 30 pF, not a current source)."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "GPIO PC15 with OSC32_OUT function; power-switch supplied with the same limits as PC13 (3 mA sink, 2 MHz maximum output speed at 30 pF, not a current source)."+ },+ {+ "number": "5",+ "name": "OSC_IN",+ "type": "input",+ "description": "External oscillator input for the 4 to 16 MHz crystal; after reset this pin is OSC_IN and PD0 can be remapped onto it by software."+ },+ {+ "number": "6",+ "name": "OSC_OUT",+ "type": "output",+ "description": "External oscillator output for the 4 to 16 MHz crystal; after reset this pin is OSC_OUT and PD1 can be remapped onto it by software."+ },+ {+ "number": "7",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Active reset pin of the microcontroller, with electrical limits given in the NRST pin characteristics section (5.3.14)."+ },+ {+ "number": "8",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground for the ADC and analog circuitry."+ },+ {+ "number": "9",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply for the ADC and analog blocks; the ADC conversion range is 0 to 3.6 V and the temperature sensor requires 2 V < VDDA < 3.6 V."+ },+ {+ "number": "10",+ "name": "PA0-WKUP",+ "type": "bidirectional",+ "description": "GPIO PA0 with WKUP, USART2_CTS, ADC12_IN0 and TIM2_CH1_ETR alternate functions; no 5 V tolerance marking in Table 5."+ },+ {+ "number": "11",+ "name": "PA1",+ "type": "bidirectional",+ "description": "GPIO PA1 with USART2_RTS, ADC12_IN1 and TIM2_CH2 alternate functions; no 5 V tolerance marking in Table 5."+ },+ {+ "number": "12",+ "name": "PA2",+ "type": "bidirectional",+ "description": "GPIO PA2 with USART2_TX, ADC12_IN2 and TIM2_CH3 alternate functions; no 5 V tolerance marking in Table 5."+ },+ {+ "number": "13",+ "name": "PA3",+ "type": "bidirectional",+ "description": "GPIO PA3 with USART2_RX, ADC12_IN3 and TIM2_CH4 alternate functions; no 5 V tolerance marking in Table 5."+ },+ {+ "number": "14",+ "name": "PA4",+ "type": "bidirectional",+ "description": "GPIO PA4 with SPI1_NSS, USART2_CK and ADC12_IN4 alternate functions; no 5 V tolerance marking in Table 5."+ },+ {+ "number": "15",+ "name": "PA5",+ "type": "bidirectional",+ "description": "GPIO PA5 with SPI1_SCK and ADC12_IN5 alternate functions; no 5 V tolerance marking in Table 5."+ },+ {+ "number": "16",+ "name": "PA6",+ "type": "bidirectional",+ "description": "GPIO PA6 with SPI1_MISO, ADC12_IN6 and TIM3_CH1 alternate functions (TIM1_BKIN remap); no 5 V tolerance marking in Table 5."+ },+ {+ "number": "17",+ "name": "PA7",+ "type": "bidirectional",+ "description": "GPIO PA7 with SPI1_MOSI, ADC12_IN7 and TIM3_CH2 alternate functions (TIM1_CH1N remap); no 5 V tolerance marking in Table 5."+ },+ {+ "number": "18",+ "name": "PB0",+ "type": "bidirectional",+ "description": "GPIO PB0 with ADC12_IN8 and TIM3_CH3 alternate functions (TIM1_CH2N remap); no 5 V tolerance marking in Table 5."+ },+ {+ "number": "19",+ "name": "PB1",+ "type": "bidirectional",+ "description": "GPIO PB1 with ADC12_IN9 and TIM3_CH4 alternate functions (TIM1_CH3N remap); no 5 V tolerance marking in Table 5."+ },+ {+ "number": "20",+ "name": "PB2/BOOT1",+ "type": "bidirectional",+ "description": "GPIO PB2 that also serves as the BOOT1 boot-mode pin; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "21",+ "name": "PB10",+ "type": "bidirectional",+ "description": "GPIO PB10 with TIM2_CH3 remap alternate function; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "22",+ "name": "PB11",+ "type": "bidirectional",+ "description": "GPIO PB11 with TIM2_CH4 remap alternate function; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "23",+ "name": "VSS_1",+ "type": "power_in",+ "description": "Digital ground pin 1 of the device."+ },+ {+ "number": "24",+ "name": "VDD_1",+ "type": "power_in",+ "description": "Digital supply pin 1; the application supply for I/Os and core is 2.0 to 3.6 V per the Features list."+ },+ {+ "number": "25",+ "name": "PB12",+ "type": "bidirectional",+ "description": "GPIO PB12 with TIM1_BKIN alternate function; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "26",+ "name": "PB13",+ "type": "bidirectional",+ "description": "GPIO PB13 with TIM1_CH1N alternate function; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "27",+ "name": "PB14",+ "type": "bidirectional",+ "description": "GPIO PB14 with TIM1_CH2N alternate function; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "28",+ "name": "PB15",+ "type": "bidirectional",+ "description": "GPIO PB15 with TIM1_CH3N alternate function; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "29",+ "name": "PA8",+ "type": "bidirectional",+ "description": "GPIO PA8 with USART1_CK, TIM1_CH1 and MCO alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "30",+ "name": "PA9",+ "type": "bidirectional",+ "description": "GPIO PA9 with USART1_TX and TIM1_CH2 alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "31",+ "name": "PA10",+ "type": "bidirectional",+ "description": "GPIO PA10 with USART1_RX and TIM1_CH3 alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "32",+ "name": "PA11",+ "type": "bidirectional",+ "description": "GPIO PA11 with USART1_CTS, CAN_RX, TIM1_CH4 and USBDM alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "33",+ "name": "PA12",+ "type": "bidirectional",+ "description": "GPIO PA12 with USART1_RTS, CAN_TX, TIM1_ETR and USBDP alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "34",+ "name": "PA13",+ "type": "bidirectional",+ "description": "GPIO PA13 that is also the JTMS/SWDIO debug pin after reset; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "35",+ "name": "VSS_2",+ "type": "power_in",+ "description": "Digital ground pin 2 of the device."+ },+ {+ "number": "36",+ "name": "VDD_2",+ "type": "power_in",+ "description": "Digital supply pin 2; the application supply for I/Os and core is 2.0 to 3.6 V per the Features list."+ },+ {+ "number": "37",+ "name": "PA14",+ "type": "bidirectional",+ "description": "GPIO PA14 that is also the JTCK/SWCLK debug pin after reset; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "38",+ "name": "PA15",+ "type": "bidirectional",+ "description": "GPIO PA15 that is also the JTDI debug pin after reset, with TIM2_CH1_ETR and SPI1_NSS remap alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "39",+ "name": "PB3",+ "type": "bidirectional",+ "description": "GPIO PB3 that is also the JTDO debug pin after reset, with TIM2_CH2 and TRACESWO remap alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "40",+ "name": "PB4",+ "type": "bidirectional",+ "description": "GPIO PB4 that is also the NJTRST debug pin after reset, with TIM3_CH1 and SPI1_MISO remap alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "41",+ "name": "PB5",+ "type": "bidirectional",+ "description": "GPIO PB5 with I2C1_SMBA alternate function and TIM3_CH2 and SPI1_MOSI remap options; no 5 V tolerance marking in Table 5."+ },+ {+ "number": "42",+ "name": "PB6",+ "type": "bidirectional",+ "description": "GPIO PB6 with I2C1_SCL and USART1_TX alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "43",+ "name": "PB7",+ "type": "bidirectional",+ "description": "GPIO PB7 with I2C1_SDA and USART1_RX alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "44",+ "name": "BOOT0",+ "type": "input",+ "description": "Boot-mode selection input BOOT0 (listed as an input without 5 V tolerance in Table 5)."+ },+ {+ "number": "45",+ "name": "PB8",+ "type": "bidirectional",+ "description": "GPIO PB8 with I2C1_SCL and CAN_RX remap alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "46",+ "name": "PB9",+ "type": "bidirectional",+ "description": "GPIO PB9 with I2C1_SDA and CAN_TX remap alternate functions; 5 V tolerant (FT) per Table 5."+ },+ {+ "number": "47",+ "name": "VSS_3",+ "type": "power_in",+ "description": "Digital ground pin 3 of the device."+ },+ {+ "number": "48",+ "name": "VDD_3",+ "type": "power_in",+ "description": "Digital supply pin 3; the application supply for I/Os and core is 2.0 to 3.6 V per the Features list."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The LQFP48 pinout figure (Figure 5) text is garbled in the extraction, so the pin-to-name mapping wa; The ordering code STM32F103C4T6A decodes to 48 pins (C), LQFP package (T), 16 KB Flash (4), so the L; The datasheet gives no per-pin voltage limits beyond the 5 V-tolerant (FT) markings, the PC13-PC15 p"+ ],+ "pages_sent": 47,+ "cost_usd": 0.2131,+ "at": "2026-10-08T04:22:27"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923652314714112",+ "pages": 99,+ "sha256": "31ab1fe3de6e6cf3",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 48,+ "described": 48,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32f103c4t6a.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32f103c4t6a-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "21c70d3db0d05a3477f72d84cdd115cc1f4b75feac1f156787859307c05161d9",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}