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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32F102R8T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F102R8T6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup supply for the RTC and backup registers (VBAT supply for RTC and backup registers); the voltage limits are not in the provided excerpt.
2	PC13-TAMPER-RTC	bidirectional	General-purpose I/O PC13 (also TAMPER-RTC), supplied through the power switch that sinks only 3 mA, so output speed is limited to 2 MHz at 30 pF and it must not source current such as driving an LED.
3	PC14-OSC32_IN	bidirectional	General-purpose I/O PC14 (also OSC32_IN), supplied through the power switch with the same 3 mA sink limit and 2 MHz / 30 pF output-speed limit as PC13.
4	PC15-OSC32_OUT	bidirectional	General-purpose I/O PC15 (also OSC32_OUT), supplied through the power switch with the same 3 mA sink limit and 2 MHz / 30 pF output-speed limit as PC13.
5	PD0-OSC_IN	bidirectional	5 V-tolerant pin that is OSC_IN after reset (HSE oscillator input) and can be remapped to PD0; PD0 in output mode is limited to 50 MHz.
6	PD1-OSC_OUT	bidirectional	5 V-tolerant pin that is OSC_OUT after reset (HSE oscillator output) and can be remapped to PD1; PD1 in output mode is limited to 50 MHz.
7	NRST	bidirectional	Device reset pin, listed as I/O in the pin definition table; its electrical characteristics are given in section 5.3.14, which is not in the provided excerpt.
8	PC0	bidirectional	General-purpose I/O PC0, also ADC_IN10 analog input.
9	PC1	bidirectional	General-purpose I/O PC1, also ADC_IN11 analog input.
10	PC2	bidirectional	General-purpose I/O PC2, also ADC_IN12 analog input.
11	PC3	bidirectional	General-purpose I/O PC3, also ADC_IN13 analog input.
12	VSSA	power_in	Analog ground pin; the datasheet refers all voltages to VSS.
13	VDDA	power_in	Analog supply pin; the temperature sensor conversion range is 2 V < VDDA < 3.6 V and the ADC conversion range is 0 to 3.6 V.
14	PA0-WKUP	bidirectional	General-purpose I/O PA0, also WKUP wake-up input, USART2_CTS, ADC_IN0 and TIM2_CH1_ETR.
15	PA1	bidirectional	General-purpose I/O PA1, also USART2_RTS, ADC_IN1 and TIM2_CH2.
16	PA2	bidirectional	General-purpose I/O PA2, also USART2_TX, ADC_IN2 and TIM2_CH3.
17	PA3	bidirectional	General-purpose I/O PA3, also USART2_RX, ADC_IN3 and TIM2_CH4.
18	VSS_4	power_in	Digital ground pin for the I/O and core supply domain.
19	VDD_4	power_in	Digital supply pin for the I/Os and core; the application supply range is 2.0 to 3.6 V.
20	PA4	bidirectional	General-purpose I/O PA4, also SPI1_NSS, ADC_IN4 and USART2_CK.
21	PA5	bidirectional	General-purpose I/O PA5, also SPI1_SCK and ADC_IN5.
22	PA6	bidirectional	General-purpose I/O PA6, also SPI1_MISO, ADC_IN6 and TIM3_CH1.
23	PA7	bidirectional	General-purpose I/O PA7, also SPI1_MOSI, ADC_IN7 and TIM3_CH2.
24	PC4	bidirectional	General-purpose I/O PC4, also ADC_IN14 analog input.
25	PC5	bidirectional	General-purpose I/O PC5, also ADC_IN15 analog input.
26	PB0	bidirectional	General-purpose I/O PB0, also ADC_IN8 and TIM3_CH3.
27	PB1	bidirectional	General-purpose I/O PB1, also ADC_IN9 and TIM3_CH4.
28	PB2/BOOT1	bidirectional	5 V-tolerant general-purpose I/O PB2, which also serves as the BOOT1 boot-mode pin.
29	PB10	bidirectional	5 V-tolerant I/O PB10, also I2C2_SCL, USART3_TX and TIM2_CH3.
30	PB11	bidirectional	5 V-tolerant I/O PB11, also I2C2_SDA, USART3_RX and TIM2_CH4.
31	VSS_1	power_in	Digital ground pin for the I/O and core supply domain.
32	VDD_1	power_in	Digital supply pin for the I/Os and core; the application supply range is 2.0 to 3.6 V.
33	PB12	bidirectional	5 V-tolerant I/O PB12, also SPI2_NSS, I2C2_SMBA and USART3_CK.
34	PB13	bidirectional	5 V-tolerant I/O PB13, also SPI2_SCK and USART3_CTS.
35	PB14	bidirectional	5 V-tolerant I/O PB14, also SPI2_MISO and USART3_RTS.
36	PB15	bidirectional	5 V-tolerant I/O PB15, also SPI2_MOSI.
37	PC6	bidirectional	5 V-tolerant I/O PC6, also TIM3_CH1 (remap function).
38	PC7	bidirectional	5 V-tolerant I/O PC7, also TIM3_CH2 (remap function).
39	PC8	bidirectional	5 V-tolerant I/O PC8, also TIM3_CH3 (remap function).
40	PC9	bidirectional	5 V-tolerant I/O PC9, also TIM3_CH4 (remap function).
41	PA8	bidirectional	5 V-tolerant I/O PA8, also USART1_CK and MCO clock output.
42	PA9	bidirectional	5 V-tolerant I/O PA9, also USART1_TX.
43	PA10	bidirectional	5 V-tolerant I/O PA10, also USART1_RX.
44	PA11	bidirectional	5 V-tolerant I/O PA11, also USART1_CTS and USB_DM (USB full-speed D- line).
45	PA12	bidirectional	5 V-tolerant I/O PA12, also USART1_RTS and USB_DP (USB full-speed D+ line).
46	PA13	bidirectional	5 V-tolerant I/O PA13, which after reset is the JTMS/SWDIO debug pin.
47	VSS_2	power_in	Digital ground pin for the I/O and core supply domain.
48	VDD_2	power_in	Digital supply pin for the I/Os and core; the application supply range is 2.0 to 3.6 V.
49	PA14	bidirectional	5 V-tolerant I/O PA14, which after reset is the JTCK/SWCLK debug pin.
50	PA15	bidirectional	5 V-tolerant I/O PA15, which after reset is the JTDI debug pin; remap functions include TIM2_CH1_ETR and SPI1_NSS.
51	PC10	bidirectional	5 V-tolerant I/O PC10, also USART3_TX (remap function).
52	PC11	bidirectional	5 V-tolerant I/O PC11, also USART3_RX (remap function).
53	PC12	bidirectional	5 V-tolerant I/O PC12, also USART3_CK (remap function).
54	PD2	bidirectional	5 V-tolerant I/O PD2, also TIM3_ETR.
55	PB3	bidirectional	5 V-tolerant I/O PB3, which after reset is the JTDO debug pin; alternates include TRACESWO, TIM2_CH2 and SPI1_SCK.
56	PB4	bidirectional	5 V-tolerant I/O PB4, which after reset is the JNTRST debug pin; alternates include TIM3_CH1 and SPI1_MISO.
57	PB5	bidirectional	General-purpose I/O PB5 (not 5 V-tolerant per the FT column), also I2C1_SMBA, TIM3_CH2 and SPI1_MOSI.
58	PB6	bidirectional	5 V-tolerant I/O PB6, also I2C1_SCL, TIM4_CH1 and USART1_TX.
59	PB7	bidirectional	5 V-tolerant I/O PB7, also I2C1_SDA, TIM4_CH2 and USART1_RX.
60	BOOT0	input	Boot-mode selection input pin BOOT0; the electrical limits are not stated in the provided excerpt.
61	PB8	bidirectional	5 V-tolerant I/O PB8, also TIM4_CH3 and I2C1_SCL.
62	PB9	bidirectional	5 V-tolerant I/O PB9, also TIM4_CH4 and I2C1_SDA.
63	VSS_3	power_in	Digital ground pin for the I/O and core supply domain.
64	VDD_3	power_in	Digital supply pin for the I/Os and core; the application supply range is 2.0 to 3.6 V.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: STM32F102R8T6
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: stm32f102r8t6-etched.step / stm32f102r8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f102r8t6.step / stm32f102r8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (81 pp, sha256 276652841a00ce34, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF