Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Download PDF

Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32F102R4T6A

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F102R4T6A from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup supply input for the RTC and backup registers, as stated in the VBAT supply feature.
2	PC13-TAMPER-RTC	bidirectional	PC13 is powered through the power switch, which sinks only 3 mA, so in output mode it is limited to 2 MHz at 30 pF and must not source current such as an LED drive; alternate function TAMPER-RTC.
3	PC14-OSC32_IN	bidirectional	PC14 is powered through the same 3 mA power switch, so output use is limited to 2 MHz at 30 pF and no current sourcing; alternate function OSC32_IN.
4	PC15-OSC32_OUT	bidirectional	PC15 is powered through the same 3 mA power switch, so output use is limited to 2 MHz at 30 pF and no current sourcing; alternate function OSC32_OUT.
5	OSC_IN	bidirectional	Configured as OSC_IN (4 to 16 MHz crystal oscillator input) after reset; can be remapped by software to PD0, which is limited to 50 MHz in output mode.
6	OSC_OUT	bidirectional	Configured as OSC_OUT (4 to 16 MHz crystal oscillator output) after reset; can be remapped by software to PD1, which is limited to 50 MHz in output mode.
7	NRST	bidirectional	Device reset pin (listed as I/O in the pin definitions); its characteristics are given in the NRST pin characteristics section.
8	PC0	bidirectional	General-purpose I/O PC0 with ADC_IN10 analog input alternate function.
9	PC1	bidirectional	General-purpose I/O PC1 with ADC_IN11 analog input alternate function.
10	PC2	bidirectional	General-purpose I/O PC2 with ADC_IN12 analog input alternate function.
11	PC3	bidirectional	General-purpose I/O PC3 with ADC_IN13 analog input alternate function.
12	VSSA	power_in	Analog ground pin for the ADC and analog circuitry, referenced to VSS.
13	VDDA	power_in	Analog supply pin; the temperature sensor conversion range is stated as 2 V < VDDA < 3.6 V.
14	PA0-WKUP	bidirectional	PA0 with WKUP wake-up function and alternate functions USART2_CTS, ADC_IN0 and TIM2_CH1_ETR.
15	PA1	bidirectional	PA1 with alternate functions USART2_RTS, ADC_IN1 and TIM2_CH2.
16	PA2	bidirectional	PA2 with alternate functions USART2_TX, ADC_IN2 and TIM2_CH3.
17	PA3	bidirectional	PA3 with alternate functions USART2_RX, ADC_IN3 and TIM2_CH4.
18	VSS_4	power_in	Digital ground pin, with all voltages referred to VSS.
19	VDD_4	power_in	Digital supply pin; the application supply for the I/Os is 2.0 to 3.6 V.
20	PA4	bidirectional	PA4 with alternate functions SPI_NSS, ADC_IN4 and USART2_CK.
21	PA5	bidirectional	PA5 with alternate functions SPI_SCK and ADC_IN5.
22	PA6	bidirectional	PA6 with alternate functions SPI_MISO, ADC_IN6 and TIM3_CH1.
23	PA7	bidirectional	PA7 with alternate functions SPI_MOSI, ADC_IN7 and TIM3_CH2.
24	PC4	bidirectional	General-purpose I/O PC4 with ADC_IN14 analog input alternate function.
25	PC5	bidirectional	General-purpose I/O PC5 with ADC_IN15 analog input alternate function.
26	PB0	bidirectional	PB0 with alternate functions ADC_IN8 and TIM3_CH3.
27	PB1	bidirectional	PB1 with alternate functions ADC_IN9 and TIM3_CH4.
28	PB2/BOOT1	bidirectional	5 V-tolerant (FT) I/O listed with the BOOT1 function.
29	PB10	bidirectional	5 V-tolerant (FT) I/O with alternate function TIM2_CH3.
30	PB11	bidirectional	5 V-tolerant (FT) I/O with alternate function TIM2_CH4.
31	VSS_1	power_in	Digital ground pin, with all voltages referred to VSS.
32	VDD_1	power_in	Digital supply pin; the application supply for the I/Os is 2.0 to 3.6 V.
33	PB12	bidirectional	5 V-tolerant (FT) general-purpose I/O.
34	PB13	bidirectional	5 V-tolerant (FT) general-purpose I/O.
35	PB14	bidirectional	5 V-tolerant (FT) general-purpose I/O.
36	PB15	bidirectional	5 V-tolerant (FT) general-purpose I/O.
37	PC6	bidirectional	5 V-tolerant (FT) I/O with TIM3_CH1 remap function.
38	PC7	bidirectional	5 V-tolerant (FT) I/O with TIM3_CH2 remap function.
39	PC8	bidirectional	5 V-tolerant (FT) I/O with TIM3_CH3 remap function.
40	PC9	bidirectional	5 V-tolerant (FT) I/O with TIM3_CH4 remap function.
41	PA8	bidirectional	5 V-tolerant (FT) I/O with alternate functions USART1_CK and MCO.
42	PA9	bidirectional	5 V-tolerant (FT) I/O with alternate function USART1_TX.
43	PA10	bidirectional	5 V-tolerant (FT) I/O with alternate function USART1_RX.
44	PA11	bidirectional	5 V-tolerant (FT) I/O with alternate functions USART1_CTS and USB_DM.
45	PA12	bidirectional	5 V-tolerant (FT) I/O with alternate functions USART1_RTS and USB_DP.
46	PA13	bidirectional	5 V-tolerant (FT) I/O with the JTMS-SWDIO debug function.
47	VSS_2	power_in	Digital ground pin, with all voltages referred to VSS.
48	VDD_2	power_in	Digital supply pin; the application supply for the I/Os is 2.0 to 3.6 V.
49	PA14	bidirectional	5 V-tolerant (FT) I/O with the JTCK-SWCLK debug function.
50	PA15	bidirectional	5 V-tolerant (FT) I/O with JTDI debug function; remap alternate functions TIM2_CH1_ETR and SPI_NSS.
51	PC10	bidirectional	5 V-tolerant (FT) general-purpose I/O.
52	PC11	bidirectional	5 V-tolerant (FT) general-purpose I/O.
53	PC12	bidirectional	5 V-tolerant (FT) general-purpose I/O.
54	PD2	bidirectional	5 V-tolerant (FT) general-purpose I/O.
55	PB3	bidirectional	5 V-tolerant (FT) I/O with JTDO debug function; remap alternate functions TIM2_CH2, TRACESWO and SPI_SCK.
56	PB4	bidirectional	5 V-tolerant (FT) I/O with JNTRST debug function; remap alternate functions TIM3_CH1 and SPI_MISO.
57	PB5	bidirectional	I/O with alternate functions I2C_SMBA, TIM3_CH2 (remap) and SPI_MOSI (remap).
58	PB6	bidirectional	5 V-tolerant (FT) I/O with alternate functions I2C_SCL and USART1_TX.
59	PB7	bidirectional	5 V-tolerant (FT) I/O with alternate functions I2C_SDA and USART1_RX.
60	BOOT0	input	Boot mode selection input; the memory aliased at address 0x0000 0000 depends on the BOOT pins.
61	PB8	bidirectional	5 V-tolerant (FT) I/O with I2C_SCL remap function.
62	PB9	bidirectional	5 V-tolerant (FT) I/O with I2C_SDA remap function.
63	VSS_3	power_in	Digital ground pin, with all voltages referred to VSS.
64	VDD_3	power_in	Digital supply pin; the application supply for the I/Os is 2.0 to 3.6 V.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: STM32F102R4T6A
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: stm32f102r4t6a-etched.step / stm32f102r4t6a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f102r4t6a.step / stm32f102r4t6a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (79 pp, sha256 0045b6f265d99024, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF