# STM32F101VGT6

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F101VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V-tolerant I/O (FT) with default function PE2; alternate functions are TRACECLK and FSMC_A23. |
| 2 | PE3 | bidirectional | 5 V-tolerant I/O (FT) with default function PE3; alternate functions are TRACED0 and FSMC_A19. |
| 3 | PE4 | bidirectional | 5 V-tolerant I/O (FT) with default function PE4; alternate functions are TRACED1 and FSMC_A20. |
| 4 | PE5 | bidirectional | 5 V-tolerant I/O (FT) with default function PE5; alternate functions are TRACED2, FSMC_A21 and TIM9_CH1. |
| 5 | PE6 | bidirectional | 5 V-tolerant I/O (FT) with default function PE6; alternate functions are TRACED3, FSMC_A22 and TIM9_CH2. |
| 6 | VBAT | power_in | Backup supply pin for the RTC and backup registers. |
| 7 | PC13-TAMPER-RTC | bidirectional | I/O supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with a 30 pF maximum load and the pin must not source current such as driving an LED; alternate function TAMPER-RTC. |
| 8 | PC14-OSC32_IN | bidirectional | I/O supplied through the power switch (3 mA sink limit; output speed at most 2 MHz with 30 pF load, no current sourcing); alternate function OSC32_IN. |
| 9 | PC15-OSC32_OUT | bidirectional | I/O supplied through the power switch (3 mA sink limit; output speed at most 2 MHz with 30 pF load, no current sourcing); alternate function OSC32_OUT. |
| 10 | VSS_5 | power_in | Ground pin; all voltages are referenced to VSS. |
| 11 | VDD_5 | power_in | Digital supply pin of the 2.0 to 3.6 V application supply and I/Os. |
| 12 | OSC_IN | input | Input of the 4-to-16 MHz crystal oscillator (HSE). |
| 13 | OSC_OUT | output | Output of the 4-to-16 MHz crystal oscillator (HSE). |
| 14 | NRST | bidirectional | Reset pin (I/O); see the NRST pin characteristics section for its electrical limits. |
| 15 | PC0 | bidirectional | I/O port PC0 with alternate function ADC_IN10. |
| 16 | PC1 | bidirectional | I/O port PC1 with alternate function ADC_IN11. |
| 17 | PC2 | bidirectional | I/O port PC2 with alternate function ADC_IN12. |
| 18 | PC3 | bidirectional | I/O port PC3 with alternate function ADC_IN13. |
| 19 | VSSA | power_in | Analog ground pin. |
| 20 | VREF- | power_in | Negative reference voltage for the ADC; per the ADC note it can be internally connected to VSSA depending on the package. |
| 21 | VREF+ | power_in | Positive reference voltage for the ADC and DAC; per the ADC note it can be internally connected to VDDA depending on the package. |
| 22 | VDDA | power_in | Analog supply pin; ADC supply VDDA is specified from 2.4 V to 3.6 V. |
| 23 | PA0-WKUP | bidirectional | 5 V-tolerant I/O (FT) with wakeup function WKUP; alternate functions are USART2_CTS, ADC_IN0, TIM5_CH1 and TIM2_CH1_ETR. |
| 24 | PA1 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are USART2_RTS, ADC_IN1, TIM5_CH2 and TIM2_CH2. |
| 25 | PA2 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are USART2_TX, TIM5_CH3, ADC_IN2, TIM2_CH3 and TIM9_CH1. |
| 26 | PA3 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are USART2_RX, TIM5_CH4, ADC_IN3, TIM2_CH4 and TIM9_CH2. |
| 27 | VSS_4 | power_in | Ground pin; all voltages are referenced to VSS. |
| 28 | VDD_4 | power_in | Digital supply pin of the 2.0 to 3.6 V application supply and I/Os. |
| 29 | PA4 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are SPI1_NSS, DAC_OUT1, ADC_IN4 and USART2_CK. |
| 30 | PA5 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are SPI1_SCK, DAC_OUT2 and ADC_IN5. |
| 31 | PA6 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are SPI1_MISO, ADC_IN6, TIM3_CH1 and TIM13_CH1. |
| 32 | PA7 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are SPI1_MOSI, ADC_IN7, TIM3_CH2 and TIM14_CH1. |
| 33 | PC4 | bidirectional | I/O port PC4 with alternate function ADC_IN14. |
| 34 | PC5 | bidirectional | I/O port PC5 with alternate function ADC_IN15. |
| 35 | PB0 | bidirectional | I/O port PB0 with alternate functions ADC_IN8 and TIM3_CH3. |
| 36 | PB1 | bidirectional | I/O port PB1 with alternate functions ADC_IN9 and TIM3_CH4. |
| 37 | PB2/BOOT1 | bidirectional | 5 V-tolerant I/O (FT) shared with the BOOT1 boot-mode function. |
| 38 | PE7 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_D4. |
| 39 | PE8 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_D5. |
| 40 | PE9 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_D6. |
| 41 | PE10 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_D7. |
| 42 | PE11 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_D8. |
| 43 | PE12 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_D9. |
| 44 | PE13 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_D10. |
| 45 | PE14 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_D11. |
| 46 | PE15 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_D12. |
| 47 | PB10 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are I2C2_SCL, USART3_TX and TIM2_CH3. |
| 48 | PB11 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are I2C2_SDA, USART3_RX and TIM2_CH4. |
| 49 | VSS_1 | power_in | Ground pin; all voltages are referenced to VSS. |
| 50 | VDD_1 | power_in | Digital supply pin of the 2.0 to 3.6 V application supply and I/Os. |
| 51 | PB12 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are SPI2_NSS, I2C2_SMBA and USART3_CK. |
| 52 | PB13 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are SPI2_SCK and USART3_CTS. |
| 53 | PB14 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are SPI2_MISO, USART3_RTS and TIM12_CH1. |
| 54 | PB15 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are SPI2_MOSI and TIM12_CH2. |
| 55 | PD8 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_D13 and USART3_TX. |
| 56 | PD9 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_D14 and USART3_RX. |
| 57 | PD10 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_D15 and USART3_CK. |
| 58 | PD11 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_A16 and USART3_CTS. |
| 59 | PD12 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_A17, TIM4_CH1 and USART3_RTS. |
| 60 | PD13 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_A18 and TIM4_CH2. |
| 61 | PD14 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_D0 and TIM4_CH3. |
| 62 | PD15 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_D1 and TIM4_CH4. |
| 63 | PC6 | bidirectional | 5 V-tolerant I/O (FT) with alternate function TIM3_CH1. |
| 64 | PC7 | bidirectional | 5 V-tolerant I/O (FT) with alternate function TIM3_CH2. |
| 65 | PC8 | bidirectional | 5 V-tolerant I/O (FT) with alternate function TIM3_CH3. |
| 66 | PC9 | bidirectional | 5 V-tolerant I/O (FT) with alternate function TIM3_CH4. |
| 67 | PA8 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are USART1_CK and MCO. |
| 68 | PA9 | bidirectional | 5 V-tolerant I/O (FT) with alternate function USART1_TX. |
| 69 | PA10 | bidirectional | 5 V-tolerant I/O (FT) with alternate function USART1_RX. |
| 70 | PA11 | bidirectional | 5 V-tolerant I/O (FT) with alternate function USART1_CTS. |
| 71 | PA12 | bidirectional | 5 V-tolerant I/O (FT) with alternate function USART1_RTS. |
| 72 | PA13 | bidirectional | 5 V-tolerant I/O (FT); after reset the pin carries the JTMS-SWDIO debug function, otherwise it is PA13. |
| 73 | NC | unconnected | Not connected. |
| 74 | VSS_2 | power_in | Ground pin; all voltages are referenced to VSS. |
| 75 | VDD_2 | power_in | Digital supply pin of the 2.0 to 3.6 V application supply and I/Os. |
| 76 | PA14 | bidirectional | 5 V-tolerant I/O (FT); after reset the pin carries the JTCK-SWCLK debug function. |
| 77 | PA15 | bidirectional | 5 V-tolerant I/O (FT); after reset the pin carries the JTDI debug function; alternate functions are SPI3_NSS, TIM2_CH1_ETR and SPI1_NSS. |
| 78 | PC10 | bidirectional | I/O port PC10; alternate functions are UART4_TX and USART3_TX. |
| 79 | PC11 | bidirectional | I/O port PC11; alternate functions are UART4_RX and USART3_RX. |
| 80 | PC12 | bidirectional | I/O port PC12; alternate functions are UART5_TX and USART3_CK. |
| 81 | PD0 | bidirectional | 5 V-tolerant I/O (FT); on LQFP100 PD0 is available by default and its listed function is OSC_IN, with alternate function FSMC_D2. |
| 82 | PD1 | bidirectional | 5 V-tolerant I/O (FT); on LQFP100 PD1 is available by default and its listed function is OSC_OUT, with alternate function FSMC_D3. |
| 83 | PD2 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are TIM3_ETR and UART5_RX. |
| 84 | PD3 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_CLK and USART2_CTS. |
| 85 | PD4 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_NOE and USART2_RTS. |
| 86 | PD5 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_NWE and USART2_TX. |
| 87 | PD6 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_NWAIT and USART2_RX. |
| 88 | PD7 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are FSMC_NE1, FSMC_NCE2 and USART2_CK. |
| 89 | PB3 | bidirectional | 5 V-tolerant I/O (FT); after reset the pin carries the JTDO debug function; alternate functions are TRACESWO, SPI3_SCK, TIM2_CH2 and SPI1_SCK. |
| 90 | PB4 | bidirectional | 5 V-tolerant I/O (FT); after reset the pin carries the NJTRST debug function; alternate functions are SPI3_MISO, TIM3_CH1 and SPI1_MISO. |
| 91 | PB5 | bidirectional | I/O port PB5; alternate functions are I2C1_SMBA, SPI3_MOSI, TIM3_CH2 and SPI1_MOSI. |
| 92 | PB6 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are I2C1_SCL, TIM4_CH1 and USART1_TX. |
| 93 | PB7 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are I2C1_SDA, FSMC_NADV, TIM4_CH2 and USART1_RX. |
| 94 | BOOT0 | input | Boot mode selection input BOOT0. |
| 95 | PB8 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are TIM4_CH3 and I2C1_SCL. |
| 96 | PB9 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are TIM4_CH4 and I2C1_SDA. |
| 97 | PE0 | bidirectional | 5 V-tolerant I/O (FT); alternate functions are TIM4_ETR and FSMC_NBL0. |
| 98 | PE1 | bidirectional | 5 V-tolerant I/O (FT) with alternate function FSMC_NBL1. |
| 99 | VSS_3 | power_in | Ground pin; all voltages are referenced to VSS. |
| 100 | VDD_3 | power_in | Digital supply pin of the 2.0 to 3.6 V application supply and I/Os. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |

## CAD (KiCad official)

- Symbol: `STM32F101VGT6`
- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`
- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files: `stm32f101vgt6-etched.step` / `stm32f101vgt6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f101vgt6.step` / `stm32f101vgt6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586181422382534656) (108 pp, sha256 `18cfb115c8781336`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f101vgt6-datasheet.pdf)