# STM32F101VBT6

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F101VBT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | Port E bit 2; 5V-tolerant GPIO with trace clock output alternate function. |
| 2 | PE3 | bidirectional | Port E bit 3; 5V-tolerant GPIO with trace data 0 alternate function. |
| 3 | PE4 | bidirectional | Port E bit 4; 5V-tolerant GPIO with trace data 1 alternate function. |
| 4 | PE5 | bidirectional | Port E bit 5; 5V-tolerant GPIO with trace data 2 alternate function. |
| 5 | PE6 | bidirectional | Port E bit 6; 5V-tolerant GPIO with trace data 3 alternate function. |
| 6 | VBAT | power_in | Backup battery supply voltage input; 1.8V to 3.6V for RTC and backup registers. |
| 7 | PC13-TAMPER-RTC | bidirectional | Port C bit 13; GPIO with RTC tamper alternate function; powered through power switch with 3mA limit. |
| 8 | PC14-OSC32_IN | bidirectional | Port C bit 14; 32kHz oscillator input; powered through power switch with 3mA limit. |
| 9 | PC15-OSC32_OUT | bidirectional | Port C bit 15; 32kHz oscillator output; powered through power switch with 3mA limit. |
| 10 | VSS_5 | power_in | Ground connection. |
| 11 | VDD_5 | power_in | Supply voltage input; 2.0V to 3.6V. |
| 12 | OSC_IN | input | Main oscillator input for 4-16MHz external crystal. |
| 13 | OSC_OUT | output | Main oscillator output for 4-16MHz external crystal. |
| 14 | NRST | bidirectional | Active low reset input with internal pull-up; asynchronous reset to core. |
| 15 | PC0 | bidirectional | Port C bit 0; GPIO with ADC channel 10 alternate input. |
| 16 | PC1 | bidirectional | Port C bit 1; GPIO with ADC channel 11 alternate input. |
| 17 | PC2 | bidirectional | Port C bit 2; GPIO with ADC channel 12 alternate input. |
| 18 | PC3 | bidirectional | Port C bit 3; GPIO with ADC channel 13 alternate input. |
| 19 | VSSA | power_in | Analog ground connection. |
| 20 | VREF- | power_in | ADC negative reference voltage; connect to VSSA or externally. |
| 21 | VREF+ | power_in | ADC positive reference voltage input; 2.4V to 3.6V. |
| 22 | VDDA | power_in | Analog supply voltage input; 2.4V to 3.6V; powers ADC and temperature sensor. |
| 23 | PA0-WKUP | bidirectional | Port A bit 0; GPIO with wake-up, USART2_CTS, ADC channel 0, or TIM2_CH1_ETR alternate functions. |
| 24 | PA1 | bidirectional | Port A bit 1; GPIO with USART2_RTS, ADC channel 1, or TIM2_CH2 alternate functions. |
| 25 | PA2 | bidirectional | Port A bit 2; GPIO with USART2_TX, ADC channel 2, or TIM2_CH3 alternate functions. |
| 26 | PA3 | bidirectional | Port A bit 3; GPIO with USART2_RX, ADC channel 3, or TIM2_CH4 alternate functions. |
| 27 | VSS_4 | power_in | Ground connection. |
| 28 | VDD_4 | power_in | Supply voltage input; 2.0V to 3.6V. |
| 29 | PA4 | bidirectional | Port A bit 4; GPIO with SPI1_NSS, ADC channel 4, or USART2_CK alternate functions. |
| 30 | PA5 | bidirectional | Port A bit 5; GPIO with SPI1_SCK or ADC channel 5 alternate functions. |
| 31 | PA6 | bidirectional | Port A bit 6; GPIO with SPI1_MISO, ADC channel 6, or TIM3_CH1 alternate functions. |
| 32 | PA7 | bidirectional | Port A bit 7; GPIO with SPI1_MOSI, ADC channel 7, or TIM3_CH2 alternate functions. |
| 33 | PC4 | bidirectional | Port C bit 4; GPIO with ADC channel 14 alternate input. |
| 34 | PC5 | bidirectional | Port C bit 5; GPIO with ADC channel 15 alternate input. |
| 35 | PB0 | bidirectional | Port B bit 0; GPIO with ADC channel 8 or TIM3_CH3 alternate functions. |
| 36 | PB1 | bidirectional | Port B bit 1; GPIO with ADC channel 9 or TIM3_CH4 alternate functions. |
| 37 | PB2 | bidirectional | Port B bit 2; 5V-tolerant GPIO with BOOT1 alternate function. |
| 38 | PE7 | bidirectional | Port E bit 7; 5V-tolerant GPIO. |
| 39 | PE8 | bidirectional | Port E bit 8; 5V-tolerant GPIO. |
| 40 | PE9 | bidirectional | Port E bit 9; 5V-tolerant GPIO. |
| 41 | PE10 | bidirectional | Port E bit 10; 5V-tolerant GPIO. |
| 42 | PE11 | bidirectional | Port E bit 11; 5V-tolerant GPIO. |
| 43 | PE12 | bidirectional | Port E bit 12; 5V-tolerant GPIO. |
| 44 | PE13 | bidirectional | Port E bit 13; 5V-tolerant GPIO. |
| 45 | PE14 | bidirectional | Port E bit 14; 5V-tolerant GPIO. |
| 46 | PE15 | bidirectional | Port E bit 15; 5V-tolerant GPIO. |
| 47 | PB10 | bidirectional | Port B bit 10; 5V-tolerant GPIO with I2C2_SCL, USART3_TX, or TIM2_CH3 alternate functions. |
| 48 | PB11 | bidirectional | Port B bit 11; 5V-tolerant GPIO with I2C2_SDA, USART3_RX, or TIM2_CH4 alternate functions. |
| 49 | VSS_1 | power_in | Ground connection. |
| 50 | VDD_1 | power_in | Supply voltage input; 2.0V to 3.6V. |
| 51 | PB12 | bidirectional | Port B bit 12; 5V-tolerant GPIO with SPI2_NSS, I2C2_SMBA, or USART3_CK alternate functions. |
| 52 | PB13 | bidirectional | Port B bit 13; 5V-tolerant GPIO with SPI2_SCK or USART3_CTS alternate functions. |
| 53 | PB14 | bidirectional | Port B bit 14; 5V-tolerant GPIO with SPI2_MISO or USART3_RTS alternate functions. |
| 54 | PB15 | bidirectional | Port B bit 15; 5V-tolerant GPIO with SPI2_MOSI alternate function. |
| 55 | PD8 | bidirectional | Port D bit 8; 5V-tolerant GPIO with USART3_TX alternate function. |
| 56 | PD9 | bidirectional | Port D bit 9; 5V-tolerant GPIO with USART3_RX alternate function. |
| 57 | PD10 | bidirectional | Port D bit 10; 5V-tolerant GPIO with USART3_CK alternate function. |
| 58 | PD11 | bidirectional | Port D bit 11; 5V-tolerant GPIO with USART3_CTS alternate function. |
| 59 | PD12 | bidirectional | Port D bit 12; 5V-tolerant GPIO with TIM4_CH1 or USART3_RTS alternate functions. |
| 60 | PD13 | bidirectional | Port D bit 13; 5V-tolerant GPIO with TIM4_CH2 alternate function. |
| 61 | PD14 | bidirectional | Port D bit 14; 5V-tolerant GPIO with TIM4_CH3 alternate function. |
| 62 | PD15 | bidirectional | Port D bit 15; 5V-tolerant GPIO with TIM4_CH4 alternate function. |
| 63 | PC6 | bidirectional | Port C bit 6; 5V-tolerant GPIO with TIM3_CH1 alternate function. |
| 64 | PC7 | bidirectional | Port C bit 7; 5V-tolerant GPIO with TIM3_CH2 alternate function. |
| 65 | PC8 | bidirectional | Port C bit 8; 5V-tolerant GPIO with TIM3_CH3 alternate function. |
| 66 | PC9 | bidirectional | Port C bit 9; 5V-tolerant GPIO with TIM3_CH4 alternate function. |
| 67 | PA8 | bidirectional | Port A bit 8; 5V-tolerant GPIO with USART1_CK or MCO alternate functions. |
| 68 | PA9 | bidirectional | Port A bit 9; 5V-tolerant GPIO with USART1_TX alternate function. |
| 69 | PA10 | bidirectional | Port A bit 10; 5V-tolerant GPIO with USART1_RX alternate function. |
| 70 | PA11 | bidirectional | Port A bit 11; 5V-tolerant GPIO with USART1_CTS alternate function. |
| 71 | PA12 | bidirectional | Port A bit 12; 5V-tolerant GPIO with USART1_RTS alternate function. |
| 72 | PA13 | bidirectional | Port A bit 13; 5V-tolerant GPIO or JTAG TMS/serial wire debug IO; requires configuration to avoid conflicts. |
| 73 | NC | unconnected | No internal connection. |
| 74 | VSS_2 | power_in | Ground connection. |
| 75 | VDD_2 | power_in | Supply voltage input; 2.0V to 3.6V. |
| 76 | PA14 | bidirectional | Port A bit 14; 5V-tolerant GPIO or JTAG TCK/serial wire debug clock; requires configuration to avoid conflicts. |
| 77 | PA15 | bidirectional | Port A bit 15; 5V-tolerant GPIO or JTAG TDI with TIM2_CH1_ETR or SPI1_NSS alternate functions; requires configuration. |
| 78 | PC10 | bidirectional | Port C bit 10; 5V-tolerant GPIO with USART3_TX alternate function. |
| 79 | PC11 | bidirectional | Port C bit 11; 5V-tolerant GPIO with USART3_RX alternate function. |
| 80 | PC12 | bidirectional | Port C bit 12; 5V-tolerant GPIO with USART3_CK alternate function. |
| 81 | PD0 | bidirectional | Port D bit 0; 5V-tolerant GPIO; remappable as main oscillator input. |
| 82 | PD1 | bidirectional | Port D bit 1; 5V-tolerant GPIO; remappable as main oscillator output. |
| 83 | PD2 | bidirectional | Port D bit 2; 5V-tolerant GPIO with TIM3_ETR alternate function. |
| 84 | PD3 | bidirectional | Port D bit 3; 5V-tolerant GPIO with USART2_CTS alternate function. |
| 85 | PD4 | bidirectional | Port D bit 4; 5V-tolerant GPIO with USART2_RTS alternate function. |
| 86 | PD5 | bidirectional | Port D bit 5; 5V-tolerant GPIO with USART2_TX alternate function. |
| 87 | PD6 | bidirectional | Port D bit 6; 5V-tolerant GPIO with USART2_RX alternate function. |
| 88 | PD7 | bidirectional | Port D bit 7; 5V-tolerant GPIO with USART2_CK alternate function. |
| 89 | PB3 | bidirectional | Port B bit 3; 5V-tolerant GPIO or JTAG TDO with SPI1_SCK, TIM2_CH2, or TRACESWO alternate functions; requires configuration. |
| 90 | PB4 | bidirectional | Port B bit 4; 5V-tolerant GPIO or JTAG NTRST with SPI1_MISO or TIM3_CH1 alternate functions; requires configuration. |
| 91 | PB5 | bidirectional | Port B bit 5; GPIO with I2C1_SMBA, TIM3_CH2, or SPI1_MOSI alternate functions. |
| 92 | PB6 | bidirectional | Port B bit 6; 5V-tolerant GPIO with I2C1_SCL, TIM4_CH1, or USART1_TX alternate functions. |
| 93 | PB7 | bidirectional | Port B bit 7; 5V-tolerant GPIO with I2C1_SDA, TIM4_CH2, or USART1_RX alternate functions. |
| 94 | BOOT0 | input | Boot mode selection input; 0=boot from main flash memory, 1=boot from system memory; sampled at reset. |
| 95 | PB8 | bidirectional | Port B bit 8; 5V-tolerant GPIO with TIM4_CH3 or I2C1_SCL alternate functions. |
| 96 | PB9 | bidirectional | Port B bit 9; 5V-tolerant GPIO with TIM4_CH4 or I2C1_SDA alternate functions. |
| 97 | PE0 | bidirectional | Port E bit 0; 5V-tolerant GPIO with TIM4_ETR alternate function. |
| 98 | PE1 | bidirectional | Port E bit 1; 5V-tolerant GPIO. |
| 99 | VSS_3 | power_in | Ground connection. |
| 100 | VDD_3 | power_in | Supply voltage input; 2.0V to 3.6V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |

## CAD (KiCad official)

- Symbol: `STM32F101VBT6`
- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`
- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files: `stm32f101vbt6-etched.step` / `stm32f101vbt6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f101vbt6.step` / `stm32f101vbt6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586172441973936128) (90 pp, sha256 `cf9864b2eb00694d`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f101vbt6-datasheet.pdf)