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STM32F100VCT6BTR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+136@@ -0,0 +1,136 @@+# STM32F100VCT6BTR++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)++STM32F100VCT6BTR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PE2 | bidirectional | General-purpose I/O, 5 V tolerant (FT); default function PE2, alternates TRACECK and FSMC_A23. |+| 2 | PE3 | bidirectional | General-purpose I/O, 5 V tolerant (FT); default function PE3, alternates TRACED0 and FSMC_A19. |+| 3 | PE4 | bidirectional | General-purpose I/O, 5 V tolerant (FT); default function PE4, alternates TRACED1 and FSMC_A20. |+| 4 | PE5 | bidirectional | General-purpose I/O, 5 V tolerant (FT); default function PE5, alternates TRACED2 and FSMC_A21. |+| 5 | PE6 | bidirectional | General-purpose I/O, 5 V tolerant (FT); default function PE6, alternates TRACED3 and FSMC_A22. |+| 6 | VBAT | power_in | Backup-domain supply for the RTC and backup registers. |+| 7 | PC13 | bidirectional | PC13 (TAMPER-RTC) is supplied through the power switch, which sinks only 3 mA, so output speed is limited to 2 MHz at 30 pF and it must not drive LEDs or act as a current source. |+| 8 | PC14 | bidirectional | PC14 (OSC32_IN) is supplied through the power switch, so output use is limited to 2 MHz at 30 pF and it must not act as a current source. |+| 9 | PC15 | bidirectional | PC15 (OSC32_OUT) is supplied through the power switch, so output use is limited to 2 MHz at 30 pF and it must not act as a current source. |+| 10 | VSS_5 | power_in | Ground pin of the digital supply domain. |+| 11 | VDD_5 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |+| 12 | OSC_IN | input | Oscillator input for the 4-to-24 MHz crystal oscillator. |+| 13 | OSC_OUT | output | Oscillator output for the 4-to-24 MHz crystal oscillator. |+| 14 | NRST | bidirectional | Reset pin (NRST) of the device. |+| 15 | PC0 | bidirectional | Standard I/O (not 5 V tolerant); alternate function ADC_IN10. |+| 16 | PC1 | bidirectional | Standard I/O (not 5 V tolerant); alternate function ADC_IN11. |+| 17 | PC2 | bidirectional | Standard I/O (not 5 V tolerant); alternate function ADC_IN12. |+| 18 | PC3 | bidirectional | Standard I/O (not 5 V tolerant); alternate function ADC_IN13. |+| 19 | VSSA | power_in | Analog ground pin. |+| 20 | VREF- | power_in | Negative reference voltage pin. |+| 21 | VREF+ | power_in | Positive reference voltage pin; the DAC uses VREF+ as its input voltage reference. |+| 22 | VDDA | power_in | Analog supply pin; the temperature sensor conversion range requires 2 V < VDDA < 3.6 V. |+| 23 | PA0 | bidirectional | I/O with WKUP wake-up function; alternates ADC_IN0, USART2_CTS, TIM2_CH1_ETR and TIM5_CH1. |+| 24 | PA1 | bidirectional | I/O; alternates USART2_RTS, ADC_IN1, TIM5_CH2 and TIM2_CH2. |+| 25 | PA2 | bidirectional | I/O; alternates USART2_TX, TIM5_CH3, ADC_IN2, TIM15_CH1 and TIM2_CH3. |+| 26 | PA3 | bidirectional | I/O; alternates USART2_RX, TIM5_CH4, ADC_IN3, TIM2_CH4 and TIM15_CH2. |+| 27 | VSS_4 | power_in | Ground pin of the digital supply domain. |+| 28 | VDD_4 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |+| 29 | PA4 | bidirectional | I/O; alternates SPI1_NSS, USART2_CK, DAC_OUT1 and ADC_IN4. |+| 30 | PA5 | bidirectional | I/O; alternates SPI1_SCK, DAC_OUT2 and ADC_IN5. |+| 31 | PA6 | bidirectional | I/O; alternates SPI1_MISO, ADC_IN6, TIM3_CH1, with remap TIM1_BKIN and TIM16_CH1. |+| 32 | PA7 | bidirectional | I/O; alternates SPI1_MOSI, ADC_IN7, TIM3_CH2, with remap TIM1_CH1N and TIM17_CH1. |+| 33 | PC4 | bidirectional | Standard I/O; alternates ADC_IN14 and TIM12_CH1. |+| 34 | PC5 | bidirectional | Standard I/O; alternates ADC_IN15 and TIM12_CH2. |+| 35 | PB0 | bidirectional | Standard I/O; alternates ADC_IN8 and TIM3_CH3, with remap TIM1_CH2N and TIM13_CH1. |+| 36 | PB1 | bidirectional | Standard I/O; alternates ADC_IN9 and TIM3_CH4, with remap TIM1_CH3N and TIM14_CH1. |+| 37 | PB2 | bidirectional | I/O, 5 V tolerant (FT); default function PB2 shared with BOOT1. |+| 38 | PE7 | bidirectional | I/O, 5 V tolerant (FT); default function PE7 with FSMC_D4, remap TIM1_ETR. |+| 39 | PE8 | bidirectional | I/O, 5 V tolerant (FT); default function PE8 with FSMC_D5, remap TIM1_CH1N. |+| 40 | PE9 | bidirectional | I/O, 5 V tolerant (FT); default function PE9 with FSMC_D6, remap TIM1_CH1. |+| 41 | PE10 | bidirectional | I/O, 5 V tolerant (FT); default function PE10 with FSMC_D7, remap TIM1_CH2N. |+| 42 | PE11 | bidirectional | I/O, 5 V tolerant (FT); default function PE11 with FSMC_D8, remap TIM1_CH2. |+| 43 | PE12 | bidirectional | I/O, 5 V tolerant (FT); default function PE12 with FSMC_D9, remap TIM1_CH3N. |+| 44 | PE13 | bidirectional | I/O, 5 V tolerant (FT); default function PE13 with FSMC_D10, remap TIM1_CH3. |+| 45 | PE14 | bidirectional | I/O, 5 V tolerant (FT); default function PE14 with FSMC_D11, remap TIM1_CH4. |+| 46 | PE15 | bidirectional | I/O, 5 V tolerant (FT); default function PE15 with FSMC_D12, remap TIM1_BKIN. |+| 47 | PB10 | bidirectional | I/O, 5 V tolerant (FT); alternates I2C2_SCL and USART3_TX, with remap TIM2_CH3 and HDMI_CEC. |+| 48 | PB11 | bidirectional | I/O, 5 V tolerant (FT); alternates I2C2_SDA and USART3_RX, with remap TIM2_CH4. |+| 49 | VSS_1 | power_in | Ground pin of the digital supply domain. |+| 50 | VDD_1 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |+| 51 | PB12 | bidirectional | I/O, 5 V tolerant (FT); alternates SPI2_NSS, I2C2_SMBA, USART3_CK and TIM1_BKIN, with remap TIM12_CH1. |+| 52 | PB13 | bidirectional | I/O, 5 V tolerant (FT); alternates SPI2_SCK, USART3_CTS and TIM1_CH1N, with remap TIM12_CH2. |+| 53 | PB14 | bidirectional | I/O, 5 V tolerant (FT); alternates SPI2_MISO, USART3_RTS, TIM1_CH2N and TIM15_CH1. |+| 54 | PB15 | bidirectional | I/O, 5 V tolerant (FT); alternates SPI2_MOSI, TIM1_CH3N, TIM15_CH1N and TIM15_CH2. |+| 55 | PD8 | bidirectional | I/O, 5 V tolerant (FT); default function PD8 with FSMC_D13 and USART3_TX. |+| 56 | PD9 | bidirectional | I/O, 5 V tolerant (FT); default function PD9 with FSMC_D14 and USART3_RX. |+| 57 | PD10 | bidirectional | I/O, 5 V tolerant (FT); default function PD10 with FSMC_D15 and USART3_CK. |+| 58 | PD11 | bidirectional | I/O, 5 V tolerant (FT); default function PD11 with FSMC_A16 and USART3_CTS. |+| 59 | PD12 | bidirectional | I/O, 5 V tolerant (FT); default function PD12 with FSMC_A17, TIM4_CH1 and USART3_RTS. |+| 60 | PD13 | bidirectional | I/O, 5 V tolerant (FT); default function PD13 with FSMC_A18 and TIM4_CH2. |+| 61 | PD14 | bidirectional | I/O, 5 V tolerant (FT); default function PD14 with FSMC_D0 and TIM4_CH3. |+| 62 | PD15 | bidirectional | I/O, 5 V tolerant (FT); default function PD15 with FSMC_D1 and TIM4_CH4. |+| 63 | PC6 | bidirectional | I/O, 5 V tolerant (FT); alternate function TIM3_CH1. |+| 64 | PC7 | bidirectional | I/O, 5 V tolerant (FT); alternate function TIM3_CH2. |+| 65 | PC8 | bidirectional | I/O, 5 V tolerant (FT); alternates TIM13_CH1 and TIM3_CH3. |+| 66 | PC9 | bidirectional | I/O, 5 V tolerant (FT); alternates TIM14_CH1 and TIM3_CH4. |+| 67 | PA8 | bidirectional | I/O, 5 V tolerant (FT); alternates USART1_CK, TIM1_CH1 and MCO. |+| 68 | PA9 | bidirectional | I/O, 5 V tolerant (FT); alternates USART1_TX, TIM1_CH2 and TIM15_BKIN. |+| 69 | PA10 | bidirectional | I/O, 5 V tolerant (FT); alternates USART1_RX, TIM1_CH3 and TIM17_BKIN. |+| 70 | PA11 | bidirectional | I/O, 5 V tolerant (FT); alternates USART1_CTS and TIM1_CH4. |+| 71 | PA12 | bidirectional | I/O, 5 V tolerant (FT); alternates USART1_RTS and TIM1_ETR. |+| 72 | PA13 | bidirectional | I/O, 5 V tolerant (FT); JTMS-SWDIO debug pin. |+| 73 | NC | unconnected | Not connected. |+| 74 | VSS_2 | power_in | Ground pin of the digital supply domain. |+| 75 | VDD_2 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |+| 76 | PA14 | bidirectional | I/O, 5 V tolerant (FT); JTCK-SWCLK debug pin. |+| 77 | PA15 | bidirectional | I/O, 5 V tolerant (FT); JTDI, with SPI3_NSS and TIM2_CH1_ETR / SPI1_NSS alternates. |+| 78 | PC10 | bidirectional | I/O, 5 V tolerant (FT); alternates UART4_TX and USART3_TX. |+| 79 | PC11 | bidirectional | I/O, 5 V tolerant (FT); alternates UART4_RX and USART3_RX. |+| 80 | PC12 | bidirectional | I/O, 5 V tolerant (FT); alternates UART5_TX and USART3_CK. |+| 81 | PD0 | bidirectional | I/O, 5 V tolerant (FT); default function PD0 with FSMC_D2, available by default on LQFP100. |+| 82 | PD1 | bidirectional | I/O, 5 V tolerant (FT); default function PD1 with FSMC_D3, available by default on LQFP100. |+| 83 | PD2 | bidirectional | I/O, 5 V tolerant (FT); alternates TIM3_ETR and UART5_RX. |+| 84 | PD3 | bidirectional | I/O, 5 V tolerant (FT); default function PD3 with FSMC_CLK and USART2_CTS. |+| 85 | PD4 | bidirectional | I/O, 5 V tolerant (FT); default function PD4 with FSMC_NOE and USART2_RTS. |+| 86 | PD5 | bidirectional | I/O, 5 V tolerant (FT); default function PD5 with FSMC_NWE and USART2_TX. |+| 87 | PD6 | bidirectional | I/O, 5 V tolerant (FT); default function PD6 with FSMC_NWAIT and USART2_RX. |+| 88 | PD7 | bidirectional | I/O, 5 V tolerant (FT); default function PD7 with FSMC_NE1 and USART2_CK. |+| 89 | PB3 | bidirectional | I/O, 5 V tolerant (FT); JTDO/TRACESWO debug function, with SPI3_SCK, TIM2_CH2 and SPI1_SCK alternates. |+| 90 | PB4 | bidirectional | I/O, 5 V tolerant (FT); NJTRST debug function, with SPI3_MISO, TIM3_CH1 and SPI1_MISO alternates. |+| 91 | PB5 | bidirectional | I/O (not 5 V tolerant per table); alternates I2C1_SMBA, SPI3_MOSI, TIM16_BKIN, TIM3_CH2 and SPI1_MOSI. |+| 92 | PB6 | bidirectional | I/O, 5 V tolerant (FT); alternates I2C1_SCL, TIM4_CH1, TIM16_CH1N and USART1_TX. |+| 93 | PB7 | bidirectional | I/O, 5 V tolerant (FT); alternates I2C1_SDA, FSMC_NADV, TIM4_CH2, TIM17_CH1N and USART1_RX. |+| 94 | BOOT0 | input | Boot mode selection input (BOOT0). |+| 95 | PB8 | bidirectional | I/O, 5 V tolerant (FT); alternates TIM4_CH3, TIM16_CH1, HDMI_CEC and I2C1_SCL. |+| 96 | PB9 | bidirectional | I/O, 5 V tolerant (FT); alternates TIM4_CH4, TIM17_CH1 and I2C1_SDA. |+| 97 | PE0 | bidirectional | I/O, 5 V tolerant (FT); alternates TIM4_ETR and FSMC_NBL0. |+| 98 | PE1 | bidirectional | I/O, 5 V tolerant (FT); alternate function FSMC_NBL1. |+| 99 | VSS_3 | power_in | Ground pin of the digital supply domain. |+| 100 | VDD_3 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-100(14x14) |+| Category | Embedded Processors & Controllers |+| Pins | 100 |++## CAD (KiCad official)++- Symbol: `STM32F100VCT6BTR`+- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`+- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)+- 3D model files: `stm32f100vct6btr-etched.step` / `stm32f100vct6btr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f100vct6btr.step` / `stm32f100vct6btr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603086173623496704) (107 pp, sha256 `37ac4e5d049f3b5d`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32f100vct6btr-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32f100vct6btr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32f100vct6btr.kicad_sym",+ "stm32f100vct6btr.kicad_mod",+ "stm32f100vct6btr.glb",+ "stm32f100vct6btr.step",+ "stm32f100vct6btr.lbr",+ "docs/hero.png",+ "docs/stm32f100vct6btr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32f100vct6btr-hero.glb",+ "stm32f100vct6btr-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32F100VCT6BTR",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-100(14x14)",+ "pin_count": 100,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603086173623496704",+ "parts": {+ "symbol": "stm32f100vct6btr.kicad_sym",+ "footprint": "stm32f100vct6btr.kicad_mod",+ "model_3d": "stm32f100vct6btr-hero.glb",+ "model_3d_plain": "stm32f100vct6btr.glb",+ "model_3d_step": "stm32f100vct6btr-etched.step",+ "model_3d_step_plain": "stm32f100vct6btr.step",+ "lbr": "stm32f100vct6btr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2971575",+ "digikey": "497-17377-2-ND",+ "mouser": "511-STM32F100VCT6BTR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:58:43Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-17377-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32F100VCT6BTR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PE2",+ "type": "bidirectional",+ "description": "General-purpose I/O, 5 V tolerant (FT); default function PE2, alternates TRACECK and FSMC_A23."+ },+ {+ "number": "2",+ "name": "PE3",+ "type": "bidirectional",+ "description": "General-purpose I/O, 5 V tolerant (FT); default function PE3, alternates TRACED0 and FSMC_A19."+ },+ {+ "number": "3",+ "name": "PE4",+ "type": "bidirectional",+ "description": "General-purpose I/O, 5 V tolerant (FT); default function PE4, alternates TRACED1 and FSMC_A20."+ },+ {+ "number": "4",+ "name": "PE5",+ "type": "bidirectional",+ "description": "General-purpose I/O, 5 V tolerant (FT); default function PE5, alternates TRACED2 and FSMC_A21."+ },+ {+ "number": "5",+ "name": "PE6",+ "type": "bidirectional",+ "description": "General-purpose I/O, 5 V tolerant (FT); default function PE6, alternates TRACED3 and FSMC_A22."+ },+ {+ "number": "6",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup-domain supply for the RTC and backup registers."+ },+ {+ "number": "7",+ "name": "PC13",+ "type": "bidirectional",+ "description": "PC13 (TAMPER-RTC) is supplied through the power switch, which sinks only 3 mA, so output speed is limited to 2 MHz at 30 pF and it must not drive LEDs or act as a current source."+ },+ {+ "number": "8",+ "name": "PC14",+ "type": "bidirectional",+ "description": "PC14 (OSC32_IN) is supplied through the power switch, so output use is limited to 2 MHz at 30 pF and it must not act as a current source."+ },+ {+ "number": "9",+ "name": "PC15",+ "type": "bidirectional",+ "description": "PC15 (OSC32_OUT) is supplied through the power switch, so output use is limited to 2 MHz at 30 pF and it must not act as a current source."+ },+ {+ "number": "10",+ "name": "VSS_5",+ "type": "power_in",+ "description": "Ground pin of the digital supply domain."+ },+ {+ "number": "11",+ "name": "VDD_5",+ "type": "power_in",+ "description": "Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V."+ },+ {+ "number": "12",+ "name": "OSC_IN",+ "type": "input",+ "description": "Oscillator input for the 4-to-24 MHz crystal oscillator."+ },+ {+ "number": "13",+ "name": "OSC_OUT",+ "type": "output",+ "description": "Oscillator output for the 4-to-24 MHz crystal oscillator."+ },+ {+ "number": "14",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Reset pin (NRST) of the device."+ },+ {+ "number": "15",+ "name": "PC0",+ "type": "bidirectional",+ "description": "Standard I/O (not 5 V tolerant); alternate function ADC_IN10."+ },+ {+ "number": "16",+ "name": "PC1",+ "type": "bidirectional",+ "description": "Standard I/O (not 5 V tolerant); alternate function ADC_IN11."+ },+ {+ "number": "17",+ "name": "PC2",+ "type": "bidirectional",+ "description": "Standard I/O (not 5 V tolerant); alternate function ADC_IN12."+ },+ {+ "number": "18",+ "name": "PC3",+ "type": "bidirectional",+ "description": "Standard I/O (not 5 V tolerant); alternate function ADC_IN13."+ },+ {+ "number": "19",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground pin."+ },+ {+ "number": "20",+ "name": "VREF-",+ "type": "power_in",+ "description": "Negative reference voltage pin."+ },+ {+ "number": "21",+ "name": "VREF+",+ "type": "power_in",+ "description": "Positive reference voltage pin; the DAC uses VREF+ as its input voltage reference."+ },+ {+ "number": "22",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply pin; the temperature sensor conversion range requires 2 V < VDDA < 3.6 V."+ },+ {+ "number": "23",+ "name": "PA0",+ "type": "bidirectional",+ "description": "I/O with WKUP wake-up function; alternates ADC_IN0, USART2_CTS, TIM2_CH1_ETR and TIM5_CH1."+ },+ {+ "number": "24",+ "name": "PA1",+ "type": "bidirectional",+ "description": "I/O; alternates USART2_RTS, ADC_IN1, TIM5_CH2 and TIM2_CH2."+ },+ {+ "number": "25",+ "name": "PA2",+ "type": "bidirectional",+ "description": "I/O; alternates USART2_TX, TIM5_CH3, ADC_IN2, TIM15_CH1 and TIM2_CH3."+ },+ {+ "number": "26",+ "name": "PA3",+ "type": "bidirectional",+ "description": "I/O; alternates USART2_RX, TIM5_CH4, ADC_IN3, TIM2_CH4 and TIM15_CH2."+ },+ {+ "number": "27",+ "name": "VSS_4",+ "type": "power_in",+ "description": "Ground pin of the digital supply domain."+ },+ {+ "number": "28",+ "name": "VDD_4",+ "type": "power_in",+ "description": "Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V."+ },+ {+ "number": "29",+ "name": "PA4",+ "type": "bidirectional",+ "description": "I/O; alternates SPI1_NSS, USART2_CK, DAC_OUT1 and ADC_IN4."+ },+ {+ "number": "30",+ "name": "PA5",+ "type": "bidirectional",+ "description": "I/O; alternates SPI1_SCK, DAC_OUT2 and ADC_IN5."+ },+ {+ "number": "31",+ "name": "PA6",+ "type": "bidirectional",+ "description": "I/O; alternates SPI1_MISO, ADC_IN6, TIM3_CH1, with remap TIM1_BKIN and TIM16_CH1."+ },+ {+ "number": "32",+ "name": "PA7",+ "type": "bidirectional",+ "description": "I/O; alternates SPI1_MOSI, ADC_IN7, TIM3_CH2, with remap TIM1_CH1N and TIM17_CH1."+ },+ {+ "number": "33",+ "name": "PC4",+ "type": "bidirectional",+ "description": "Standard I/O; alternates ADC_IN14 and TIM12_CH1."+ },+ {+ "number": "34",+ "name": "PC5",+ "type": "bidirectional",+ "description": "Standard I/O; alternates ADC_IN15 and TIM12_CH2."+ },+ {+ "number": "35",+ "name": "PB0",+ "type": "bidirectional",+ "description": "Standard I/O; alternates ADC_IN8 and TIM3_CH3, with remap TIM1_CH2N and TIM13_CH1."+ },+ {+ "number": "36",+ "name": "PB1",+ "type": "bidirectional",+ "description": "Standard I/O; alternates ADC_IN9 and TIM3_CH4, with remap TIM1_CH3N and TIM14_CH1."+ },+ {+ "number": "37",+ "name": "PB2",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PB2 shared with BOOT1."+ },+ {+ "number": "38",+ "name": "PE7",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PE7 with FSMC_D4, remap TIM1_ETR."+ },+ {+ "number": "39",+ "name": "PE8",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PE8 with FSMC_D5, remap TIM1_CH1N."+ },+ {+ "number": "40",+ "name": "PE9",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PE9 with FSMC_D6, remap TIM1_CH1."+ },+ {+ "number": "41",+ "name": "PE10",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PE10 with FSMC_D7, remap TIM1_CH2N."+ },+ {+ "number": "42",+ "name": "PE11",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PE11 with FSMC_D8, remap TIM1_CH2."+ },+ {+ "number": "43",+ "name": "PE12",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PE12 with FSMC_D9, remap TIM1_CH3N."+ },+ {+ "number": "44",+ "name": "PE13",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PE13 with FSMC_D10, remap TIM1_CH3."+ },+ {+ "number": "45",+ "name": "PE14",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PE14 with FSMC_D11, remap TIM1_CH4."+ },+ {+ "number": "46",+ "name": "PE15",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PE15 with FSMC_D12, remap TIM1_BKIN."+ },+ {+ "number": "47",+ "name": "PB10",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates I2C2_SCL and USART3_TX, with remap TIM2_CH3 and HDMI_CEC."+ },+ {+ "number": "48",+ "name": "PB11",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates I2C2_SDA and USART3_RX, with remap TIM2_CH4."+ },+ {+ "number": "49",+ "name": "VSS_1",+ "type": "power_in",+ "description": "Ground pin of the digital supply domain."+ },+ {+ "number": "50",+ "name": "VDD_1",+ "type": "power_in",+ "description": "Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V."+ },+ {+ "number": "51",+ "name": "PB12",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates SPI2_NSS, I2C2_SMBA, USART3_CK and TIM1_BKIN, with remap TIM12_CH1."+ },+ {+ "number": "52",+ "name": "PB13",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates SPI2_SCK, USART3_CTS and TIM1_CH1N, with remap TIM12_CH2."+ },+ {+ "number": "53",+ "name": "PB14",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates SPI2_MISO, USART3_RTS, TIM1_CH2N and TIM15_CH1."+ },+ {+ "number": "54",+ "name": "PB15",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates SPI2_MOSI, TIM1_CH3N, TIM15_CH1N and TIM15_CH2."+ },+ {+ "number": "55",+ "name": "PD8",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD8 with FSMC_D13 and USART3_TX."+ },+ {+ "number": "56",+ "name": "PD9",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD9 with FSMC_D14 and USART3_RX."+ },+ {+ "number": "57",+ "name": "PD10",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD10 with FSMC_D15 and USART3_CK."+ },+ {+ "number": "58",+ "name": "PD11",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD11 with FSMC_A16 and USART3_CTS."+ },+ {+ "number": "59",+ "name": "PD12",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD12 with FSMC_A17, TIM4_CH1 and USART3_RTS."+ },+ {+ "number": "60",+ "name": "PD13",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD13 with FSMC_A18 and TIM4_CH2."+ },+ {+ "number": "61",+ "name": "PD14",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD14 with FSMC_D0 and TIM4_CH3."+ },+ {+ "number": "62",+ "name": "PD15",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD15 with FSMC_D1 and TIM4_CH4."+ },+ {+ "number": "63",+ "name": "PC6",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternate function TIM3_CH1."+ },+ {+ "number": "64",+ "name": "PC7",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternate function TIM3_CH2."+ },+ {+ "number": "65",+ "name": "PC8",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates TIM13_CH1 and TIM3_CH3."+ },+ {+ "number": "66",+ "name": "PC9",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates TIM14_CH1 and TIM3_CH4."+ },+ {+ "number": "67",+ "name": "PA8",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates USART1_CK, TIM1_CH1 and MCO."+ },+ {+ "number": "68",+ "name": "PA9",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates USART1_TX, TIM1_CH2 and TIM15_BKIN."+ },+ {+ "number": "69",+ "name": "PA10",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates USART1_RX, TIM1_CH3 and TIM17_BKIN."+ },+ {+ "number": "70",+ "name": "PA11",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates USART1_CTS and TIM1_CH4."+ },+ {+ "number": "71",+ "name": "PA12",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates USART1_RTS and TIM1_ETR."+ },+ {+ "number": "72",+ "name": "PA13",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); JTMS-SWDIO debug pin."+ },+ {+ "number": "73",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected."+ },+ {+ "number": "74",+ "name": "VSS_2",+ "type": "power_in",+ "description": "Ground pin of the digital supply domain."+ },+ {+ "number": "75",+ "name": "VDD_2",+ "type": "power_in",+ "description": "Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V."+ },+ {+ "number": "76",+ "name": "PA14",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); JTCK-SWCLK debug pin."+ },+ {+ "number": "77",+ "name": "PA15",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); JTDI, with SPI3_NSS and TIM2_CH1_ETR / SPI1_NSS alternates."+ },+ {+ "number": "78",+ "name": "PC10",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates UART4_TX and USART3_TX."+ },+ {+ "number": "79",+ "name": "PC11",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates UART4_RX and USART3_RX."+ },+ {+ "number": "80",+ "name": "PC12",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates UART5_TX and USART3_CK."+ },+ {+ "number": "81",+ "name": "PD0",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD0 with FSMC_D2, available by default on LQFP100."+ },+ {+ "number": "82",+ "name": "PD1",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD1 with FSMC_D3, available by default on LQFP100."+ },+ {+ "number": "83",+ "name": "PD2",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates TIM3_ETR and UART5_RX."+ },+ {+ "number": "84",+ "name": "PD3",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD3 with FSMC_CLK and USART2_CTS."+ },+ {+ "number": "85",+ "name": "PD4",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD4 with FSMC_NOE and USART2_RTS."+ },+ {+ "number": "86",+ "name": "PD5",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD5 with FSMC_NWE and USART2_TX."+ },+ {+ "number": "87",+ "name": "PD6",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD6 with FSMC_NWAIT and USART2_RX."+ },+ {+ "number": "88",+ "name": "PD7",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); default function PD7 with FSMC_NE1 and USART2_CK."+ },+ {+ "number": "89",+ "name": "PB3",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); JTDO/TRACESWO debug function, with SPI3_SCK, TIM2_CH2 and SPI1_SCK alternates."+ },+ {+ "number": "90",+ "name": "PB4",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); NJTRST debug function, with SPI3_MISO, TIM3_CH1 and SPI1_MISO alternates."+ },+ {+ "number": "91",+ "name": "PB5",+ "type": "bidirectional",+ "description": "I/O (not 5 V tolerant per table); alternates I2C1_SMBA, SPI3_MOSI, TIM16_BKIN, TIM3_CH2 and SPI1_MOSI."+ },+ {+ "number": "92",+ "name": "PB6",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates I2C1_SCL, TIM4_CH1, TIM16_CH1N and USART1_TX."+ },+ {+ "number": "93",+ "name": "PB7",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates I2C1_SDA, FSMC_NADV, TIM4_CH2, TIM17_CH1N and USART1_RX."+ },+ {+ "number": "94",+ "name": "BOOT0",+ "type": "input",+ "description": "Boot mode selection input (BOOT0)."+ },+ {+ "number": "95",+ "name": "PB8",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates TIM4_CH3, TIM16_CH1, HDMI_CEC and I2C1_SCL."+ },+ {+ "number": "96",+ "name": "PB9",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates TIM4_CH4, TIM17_CH1 and I2C1_SDA."+ },+ {+ "number": "97",+ "name": "PE0",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternates TIM4_ETR and FSMC_NBL0."+ },+ {+ "number": "98",+ "name": "PE1",+ "type": "bidirectional",+ "description": "I/O, 5 V tolerant (FT); alternate function FSMC_NBL1."+ },+ {+ "number": "99",+ "name": "VSS_3",+ "type": "power_in",+ "description": "Ground pin of the digital supply domain."+ },+ {+ "number": "100",+ "name": "VDD_3",+ "type": "power_in",+ "description": "Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The LQFP100 column of Table 4 was read from text extraction in which cells are space-collapsed (e.g.; Pin 73 is printed as 'Not connected' in the table; it is kept as an unconnected pin rather than a po; Footnote 7 says PD0 and PD1 are available by default on LQFP100 and do not need remapping. Pins 81 a"+ ],+ "pages_sent": 42,+ "cost_usd": 0.2767,+ "at": "2026-10-08T18:57:55"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603086173623496704",+ "pages": 107,+ "sha256": "37ac4e5d049f3b5d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 100,+ "described": 100,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32f100vct6btr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "51720097260ffba41c3062f85f67623721102fa535901c47cb555a1f444feeb3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32f100vct6btr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "98edb0ef779d5959ec3de22f6962cc86065840afe301b2d4a5d614fd8b643da3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}