component
STM32F100R8T6B
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F100R8T6B
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32F100R8T6B from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup supply for RTC, LSE oscillator, and backup registers; 1.8-3.6 V; powers these blocks via internal power switch when VDD is absent. |
| 2 | PC13-TAMPER-RTC | bidirectional | GPIO PC13 supplied through backup-domain power switch (max 3 mA, 2 MHz, 30 pF load); alternate functions TAMPER and RTC; not 5 V tolerant. |
| 3 | PC14-OSC32_IN | bidirectional | GPIO PC14 supplied through backup-domain power switch (max 3 mA, 2 MHz, 30 pF load); alternate function OSC32_IN for 32.768 kHz crystal oscillator; not 5 V tolerant. |
| 4 | PC15-OSC32_OUT | bidirectional | GPIO PC15 supplied through backup-domain power switch (max 3 mA, 2 MHz, 30 pF load); alternate function OSC32_OUT for 32.768 kHz crystal oscillator; not 5 V tolerant. |
| 5 | OSC_IN | input | HSE crystal/resonator oscillator input (4-24 MHz) or external user clock input (1-24 MHz); PD0 function can be remapped here by software. |
| 6 | OSC_OUT | output | HSE crystal/resonator oscillator output; PD1 function can be remapped here by software. |
| 7 | NRST | bidirectional | Active-low reset pin with permanent internal pull-up (30-50 kΩ); VIL max 0.8 V, VIH min 2 V; pulses shorter than 100 ns are filtered and do not generate a reset. |
| 8 | PC0 | bidirectional | GPIO PC0, standard I/O (not 5 V tolerant); alternate function ADC1_IN10. |
| 9 | PC1 | bidirectional | GPIO PC1, standard I/O (not 5 V tolerant); alternate function ADC1_IN11. |
| 10 | PC2 | bidirectional | GPIO PC2, standard I/O (not 5 V tolerant); alternate function ADC1_IN12. |
| 11 | PC3 | bidirectional | GPIO PC3, standard I/O (not 5 V tolerant); alternate function ADC1_IN13. |
| 12 | VSSA | power_in | Analog ground reference for ADC, DAC, reset blocks, RC oscillators, and PLL; must be connected to VSS. |
| 13 | VDDA | power_in | Analog supply for ADC, DAC, reset blocks, RC oscillators, and PLL; 2.0-3.6 V (minimum 2.4 V when ADC or DAC is used); VREF+ is internally connected to VDDA in LQFP64. |
| 14 | PA0-WKUP | bidirectional | GPIO PA0 with WKUP function (rising edge exits Standby mode); standard I/O (not 5 V tolerant); alternate functions USART2_CTS, ADC1_IN0, TIM2_CH1_ETR. |
| 15 | PA1 | bidirectional | GPIO PA1, standard I/O (not 5 V tolerant); alternate functions USART2_RTS, ADC1_IN1, TIM2_CH2. |
| 16 | PA2 | bidirectional | GPIO PA2, standard I/O (not 5 V tolerant); alternate functions USART2_TX, ADC1_IN2, TIM2_CH3, TIM15_CH1. |
| 17 | PA3 | bidirectional | GPIO PA3, standard I/O (not 5 V tolerant); alternate functions USART2_RX, ADC1_IN3, TIM2_CH4, TIM15_CH2. |
| 18 | VSS_4 | power_in | Digital ground decoupling supply pin; must be tied to VSS within 50 mV of all other ground pins; total VSS current sink limit 150 mA. |
| 19 | VDD_4 | power_in | Main digital supply decoupling pin, 2.0-3.6 V; sources I/Os and internal voltage regulator. |
| 20 | PA4 | bidirectional | GPIO PA4, standard I/O (not 5 V tolerant); alternate functions SPI1_NSS, ADC1_IN4, USART2_CK, DAC1_OUT. |
| 21 | PA5 | bidirectional | GPIO PA5, standard I/O (not 5 V tolerant); alternate functions SPI1_SCK, ADC1_IN5, DAC2_OUT. |
| 22 | PA6 | bidirectional | GPIO PA6, standard I/O (not 5 V tolerant); alternate functions SPI1_MISO, ADC1_IN6, TIM3_CH1; remap to TIM1_BKIN or TIM16_CH1. |
| 23 | PA7 | bidirectional | GPIO PA7, standard I/O (not 5 V tolerant); alternate functions SPI1_MOSI, ADC1_IN7, TIM3_CH2; remap to TIM1_CH1N or TIM17_CH1. |
| 24 | PC4 | bidirectional | GPIO PC4, standard I/O (not 5 V tolerant); alternate function ADC1_IN14. |
| 25 | PC5 | bidirectional | GPIO PC5, standard I/O (not 5 V tolerant); alternate function ADC1_IN15. |
| 26 | PB0 | bidirectional | GPIO PB0, standard I/O (not 5 V tolerant); alternate functions ADC1_IN8, TIM3_CH3; remap to TIM1_CH2N. |
| 27 | PB1 | bidirectional | GPIO PB1, standard I/O (not 5 V tolerant); alternate functions ADC1_IN9, TIM3_CH4; remap to TIM1_CH3N. |
| 28 | PB2 | bidirectional | GPIO PB2/BOOT1, 5 V tolerant; BOOT1 pin selects boot mode in combination with BOOT0; no alternate functions. |
| 29 | PB10 | bidirectional | GPIO PB10, 5 V tolerant; alternate functions I2C2_SCL, USART3_TX; remap to TIM2_CH3 or HDMI_CEC. |
| 30 | PB11 | bidirectional | GPIO PB11, 5 V tolerant; alternate functions I2C2_SDA, USART3_RX; remap to TIM2_CH4. |
| 31 | VSS_1 | power_in | Digital ground decoupling supply pin; must be tied to VSS within 50 mV of all other ground pins; total VSS current sink limit 150 mA. |
| 32 | VDD_1 | power_in | Main digital supply decoupling pin, 2.0-3.6 V; sources I/Os and internal voltage regulator. |
| 33 | PB12 | bidirectional | GPIO PB12, 5 V tolerant; alternate functions SPI2_NSS, I2C2_SMBA, TIM1_BKIN, USART3_CK. |
| 34 | PB13 | bidirectional | GPIO PB13, 5 V tolerant; alternate functions SPI2_SCK, TIM1_CH1N, USART3_CTS. |
| 35 | PB14 | bidirectional | GPIO PB14, 5 V tolerant; alternate functions SPI2_MISO, TIM1_CH2N, USART3_RTS; remap to TIM15_CH1. |
| 36 | PB15 | bidirectional | GPIO PB15, 5 V tolerant; alternate functions SPI2_MOSI, TIM1_CH3N, TIM15_CH1N; remap to TIM15_CH2. |
| 37 | PC6 | bidirectional | GPIO PC6, 5 V tolerant; remap alternate function TIM3_CH1. |
| 38 | PC7 | bidirectional | GPIO PC7, 5 V tolerant; remap alternate function TIM3_CH2. |
| 39 | PC8 | bidirectional | GPIO PC8, 5 V tolerant; remap alternate function TIM3_CH3. |
| 40 | PC9 | bidirectional | GPIO PC9, 5 V tolerant; remap alternate function TIM3_CH4. |
| 41 | PA8 | bidirectional | GPIO PA8, 5 V tolerant; alternate functions USART1_CK, MCO (master clock output up to 24 MHz), TIM1_CH1. |
| 42 | PA9 | bidirectional | GPIO PA9, 5 V tolerant; alternate functions USART1_TX, TIM1_CH2, TIM15_BKIN. |
| 43 | PA10 | bidirectional | GPIO PA10, 5 V tolerant; alternate functions USART1_RX, TIM1_CH3, TIM17_BKIN. |
| 44 | PA11 | bidirectional | GPIO PA11, 5 V tolerant; alternate functions USART1_CTS, TIM1_CH4. |
| 45 | PA12 | bidirectional | GPIO PA12, 5 V tolerant; alternate functions USART1_RTS, TIM1_ETR. |
| 46 | PA13 | bidirectional | GPIO PA13, 5 V tolerant; default function after reset is JTMS-SWDIO (JTAG TMS / SWD bidirectional data); remappable to PA13 GPIO by software. |
| 47 | VSS_2 | power_in | Digital ground decoupling supply pin; must be tied to VSS within 50 mV of all other ground pins; total VSS current sink limit 150 mA. |
| 48 | VDD_2 | power_in | Main digital supply decoupling pin, 2.0-3.6 V; sources I/Os and internal voltage regulator. |
| 49 | PA14 | bidirectional | GPIO PA14, 5 V tolerant; default function after reset is JTCK/SWCLK (JTAG TCK / SWD clock input); remappable to PA14 GPIO by software. |
| 50 | PA15 | bidirectional | GPIO PA15, 5 V tolerant; default function after reset is JTDI (JTAG data input); remap to TIM2_CH1_ETR, PA15, or SPI1_NSS by software. |
| 51 | PC10 | bidirectional | GPIO PC10, 5 V tolerant; remap alternate function USART3_TX. |
| 52 | PC11 | bidirectional | GPIO PC11, 5 V tolerant; remap alternate function USART3_RX. |
| 53 | PC12 | bidirectional | GPIO PC12, 5 V tolerant; remap alternate function USART3_CK. |
| 54 | PD2 | bidirectional | GPIO PD2, 5 V tolerant; alternate function TIM3_ETR. |
| 55 | PB3 | bidirectional | GPIO PB3, 5 V tolerant; default function after reset is JTDO (JTAG data output); remap to TIM2_CH2, TRACESWO, or SPI1_SCK by software. |
| 56 | PB4 | bidirectional | GPIO PB4, 5 V tolerant; default function after reset is NJTRST (JTAG TAP reset); remap to PB4, TIM3_CH1, or SPI1_MISO by software. |
| 57 | PB5 | bidirectional | GPIO PB5, standard I/O (not 5 V tolerant); alternate functions I2C1_SMBA, TIM16_BKIN; remap to TIM3_CH2 or SPI1_MOSI. |
| 58 | PB6 | bidirectional | GPIO PB6, 5 V tolerant; alternate functions I2C1_SCL, TIM4_CH1; remap to TIM16_CH1N or USART1_TX. |
| 59 | PB7 | bidirectional | GPIO PB7, 5 V tolerant; alternate functions I2C1_SDA, TIM17_CH1N, TIM4_CH2; remap to USART1_RX. |
| 60 | BOOT0 | input | Boot mode selection input; BOOT0=1 with BOOT1=0 boots from system memory (USART1 bootloader); BOOT0=0 boots from user Flash. |
| 61 | PB8 | bidirectional | GPIO PB8, 5 V tolerant; alternate functions TIM4_CH3, TIM16_CH1, CEC; remap to I2C1_SCL. |
| 62 | PB9 | bidirectional | GPIO PB9, 5 V tolerant; alternate functions TIM4_CH4, TIM17_CH1; remap to I2C1_SDA. |
| 63 | VSS_3 | power_in | Digital ground decoupling supply pin; must be tied to VSS within 50 mV of all other ground pins; total VSS current sink limit 150 mA. |
| 64 | VDD_3 | power_in | Main digital supply decoupling pin, 2.0-3.6 V; sources I/Os and internal voltage regulator; total VDD source current limit 150 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32F100R8T6B - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32f100r8t6b-etched.step/stm32f100r8t6b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f100r8t6b.step/stm32f100r8t6b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (95 pp, sha256
daf478e69d6806a1, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).