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STM32F100C4T7B
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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STM32F100C4T7B
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32F100C4T7B from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply for the RTC and backup registers. |
| 2 | PC13-TAMPER-RTC | bidirectional | General-purpose I/O PC13 (not 5 V tolerant) also used for TAMPER-RTC; it is supplied through the power switch, which sinks at most 3 mA, so output use is limited to 2 MHz at 30 pF and it must not source current such as driving an LED. |
| 3 | PC14-OSC32_IN | bidirectional | General-purpose I/O PC14 (not 5 V tolerant) that doubles as the 32 kHz oscillator input OSC32_IN; it has the same power-switch limits as PC13 (2 MHz maximum speed at 30 pF, 3 mA sink limit, no current sourcing). |
| 4 | PC15-OSC32_OUT | bidirectional | General-purpose I/O PC15 (not 5 V tolerant) that doubles as the 32 kHz oscillator output OSC32_OUT; it has the same power-switch limits as PC13 (2 MHz maximum speed at 30 pF, 3 mA sink limit, no current sourcing). |
| 5 | OSC_IN | input | High-speed external oscillator input for a 4 to 24 MHz crystal; after reset this pin is OSC_IN and PD0 can be remapped onto it by software. |
| 6 | OSC_OUT | output | High-speed external oscillator output for a 4 to 24 MHz crystal; after reset this pin is OSC_OUT and PD1 can be remapped onto it by software. |
| 7 | NRST | bidirectional | Device reset pin listed as I/O in Table 4; its electrical characteristics are given in section 5.3.14, which is outside this extract. |
| 8 | VSSA | power_in | Analog ground reference for the ADC and DAC. |
| 9 | VDDA | power_in | Analog supply for the ADC, specified at 2.4 to 3.6 V in Table 42. |
| 10 | PA0-WKUP | bidirectional | General-purpose I/O PA0 (not 5 V tolerant) with alternate functions WKUP, USART2_CTS, ADC1_IN0 and TIM2_CH1_ETR. |
| 11 | PA1 | bidirectional | General-purpose I/O PA1 (not 5 V tolerant) with alternate functions USART2_RTS, ADC1_IN1 and TIM2_CH2. |
| 12 | PA2 | bidirectional | General-purpose I/O PA2 (not 5 V tolerant) with alternate functions USART2_TX, ADC1_IN2, TIM2_CH3 and TIM15_CH1. |
| 13 | PA3 | bidirectional | General-purpose I/O PA3 (not 5 V tolerant) with alternate functions USART2_RX, ADC1_IN3, TIM2_CH4 and TIM15_CH2. |
| 14 | PA4 | bidirectional | General-purpose I/O PA4 (not 5 V tolerant) with alternate functions SPI1_NSS, USART2_CK, ADC1_IN4 and DAC1_OUT. |
| 15 | PA5 | bidirectional | General-purpose I/O PA5 (not 5 V tolerant) with alternate functions SPI1_SCK, ADC1_IN5 and DAC2_OUT. |
| 16 | PA6 | bidirectional | General-purpose I/O PA6 (not 5 V tolerant) with alternate functions SPI1_MISO, ADC1_IN6 and TIM3_CH1; TIM1_BKIN and TIM16_CH1 are remap options. |
| 17 | PA7 | bidirectional | General-purpose I/O PA7 (not 5 V tolerant) with alternate functions SPI1_MOSI, ADC1_IN7 and TIM3_CH2; TIM1_CH1N and TIM17_CH1 are remap options. |
| 18 | PB0 | bidirectional | General-purpose I/O PB0 (not 5 V tolerant) with alternate functions ADC1_IN8 and TIM3_CH3; TIM1_CH2N is a remap option. |
| 19 | PB1 | bidirectional | General-purpose I/O PB1 (not 5 V tolerant) with alternate functions ADC1_IN9 and TIM3_CH4; TIM1_CH3N is a remap option. |
| 20 | PB2/BOOT1 | bidirectional | 5 V tolerant general-purpose I/O PB2 that also serves as the BOOT1 boot-mode pin. |
| 21 | PB10 | bidirectional | 5 V tolerant I/O PB10 with alternate functions I2C2_SCL, USART3_TX, TIM2_CH3 and HDMI_CEC; I2C2 is not present on low-density devices. |
| 22 | PB11 | bidirectional | 5 V tolerant I/O PB11 with alternate functions I2C2_SDA, USART3_RX and TIM2_CH4; I2C2 is not present on low-density devices. |
| 23 | VSS_1 | power_in | Digital ground. |
| 24 | VDD_1 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |
| 25 | PB12 | bidirectional | 5 V tolerant I/O PB12 with alternate functions SPI2_NSS, I2C2_SMBA, TIM1_BKIN and USART3_CK; SPI2 and I2C2 are not present on low-density devices. |
| 26 | PB13 | bidirectional | 5 V tolerant I/O PB13 with alternate functions SPI2_SCK, TIM1_CH1N and USART3_CTS; SPI2 is not present on low-density devices. |
| 27 | PB14 | bidirectional | 5 V tolerant I/O PB14 with alternate functions SPI2_MISO, TIM1_CH2N and USART3_RTS; TIM15_CH1 is a remap option and SPI2 is not present on low-density devices. |
| 28 | PB15 | bidirectional | 5 V tolerant I/O PB15 with alternate functions SPI2_MOSI, TIM1_CH3N and TIM15_CH1N; TIM15_CH2 is a remap option and SPI2 is not present on low-density devices. |
| 29 | PA8 | bidirectional | 5 V tolerant I/O PA8 with alternate functions USART1_CK, MCO and TIM1_CH1. |
| 30 | PA9 | bidirectional | 5 V tolerant I/O PA9 with alternate functions USART1_TX, TIM1_CH2 and TIM15_BKIN. |
| 31 | PA10 | bidirectional | 5 V tolerant I/O PA10 with alternate functions USART1_RX, TIM1_CH3 and TIM17_BKIN. |
| 32 | PA11 | bidirectional | 5 V tolerant I/O PA11 with alternate functions USART1_CTS and TIM1_CH4. |
| 33 | PA12 | bidirectional | 5 V tolerant I/O PA12 with alternate functions USART1_RTS and TIM1_ETR. |
| 34 | PA13 | bidirectional | 5 V tolerant I/O PA13 whose default function is the JTMS-SWDIO debug pin. |
| 35 | VSS_2 | power_in | Digital ground. |
| 36 | VDD_2 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |
| 37 | PA14 | bidirectional | 5 V tolerant I/O PA14 whose default function is the JTCK-SWCLK debug pin. |
| 38 | PA15 | bidirectional | 5 V tolerant I/O PA15 with default function JTDI and alternate functions TIM2_CH1_ETR and SPI1_NSS. |
| 39 | PB3 | bidirectional | 5 V tolerant I/O PB3 whose default function is JTDO; alternate functions include TIM2_CH2, TRACESWO and SPI1_SCK. |
| 40 | PB4 | bidirectional | 5 V tolerant I/O PB4 whose default function is NJTRST; alternate functions include TIM3_CH1 and SPI1_MISO. |
| 41 | PB5 | bidirectional | Non-5 V-tolerant I/O PB5 with alternate functions I2C1_SMBA, TIM16_BKIN, TIM3_CH2 and SPI1_MOSI. |
| 42 | PB6 | bidirectional | 5 V tolerant I/O PB6 with alternate functions I2C1_SCL, TIM16_CH1N and USART1_TX; TIM4_CH1 is not present on low-density devices. |
| 43 | PB7 | bidirectional | 5 V tolerant I/O PB7 with alternate functions I2C1_SDA, TIM17_CH1N and USART1_RX; TIM4_CH2 is not present on low-density devices. |
| 44 | BOOT0 | input | Boot mode selection input (type I, not 5 V tolerant) that works together with PB2/BOOT1. |
| 45 | PB8 | bidirectional | 5 V tolerant I/O PB8 with alternate functions TIM16_CH1, CEC and I2C1_SCL; TIM4_CH3 is not present on low-density devices. |
| 46 | PB9 | bidirectional | 5 V tolerant I/O PB9 with alternate functions TIM17_CH1 and I2C1_SDA; TIM4_CH4 is not present on low-density devices. |
| 47 | VSS_3 | power_in | Digital ground. |
| 48 | VDD_3 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32F100C4T7B - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32f100c4t7b-etched.step/stm32f100c4t7b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f100c4t7b.step/stm32f100c4t7b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (96 pp, sha256
360e3be010cabad4, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM32F100C4T7B
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32F100C4T7B from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply for the RTC and backup registers. |
| 2 | PC13-TAMPER-RTC | bidirectional | General-purpose I/O PC13 (not 5 V tolerant) also used for TAMPER-RTC; it is supplied through the power switch, which sinks at most 3 mA, so output use is limited to 2 MHz at 30 pF and it must not source current such as driving an LED. |
| 3 | PC14-OSC32_IN | bidirectional | General-purpose I/O PC14 (not 5 V tolerant) that doubles as the 32 kHz oscillator input OSC32_IN; it has the same power-switch limits as PC13 (2 MHz maximum speed at 30 pF, 3 mA sink limit, no current sourcing). |
| 4 | PC15-OSC32_OUT | bidirectional | General-purpose I/O PC15 (not 5 V tolerant) that doubles as the 32 kHz oscillator output OSC32_OUT; it has the same power-switch limits as PC13 (2 MHz maximum speed at 30 pF, 3 mA sink limit, no current sourcing). |
| 5 | OSC_IN | input | High-speed external oscillator input for a 4 to 24 MHz crystal; after reset this pin is OSC_IN and PD0 can be remapped onto it by software. |
| 6 | OSC_OUT | output | High-speed external oscillator output for a 4 to 24 MHz crystal; after reset this pin is OSC_OUT and PD1 can be remapped onto it by software. |
| 7 | NRST | bidirectional | Device reset pin listed as I/O in Table 4; its electrical characteristics are given in section 5.3.14, which is outside this extract. |
| 8 | VSSA | power_in | Analog ground reference for the ADC and DAC. |
| 9 | VDDA | power_in | Analog supply for the ADC, specified at 2.4 to 3.6 V in Table 42. |
| 10 | PA0-WKUP | bidirectional | General-purpose I/O PA0 (not 5 V tolerant) with alternate functions WKUP, USART2_CTS, ADC1_IN0 and TIM2_CH1_ETR. |
| 11 | PA1 | bidirectional | General-purpose I/O PA1 (not 5 V tolerant) with alternate functions USART2_RTS, ADC1_IN1 and TIM2_CH2. |
| 12 | PA2 | bidirectional | General-purpose I/O PA2 (not 5 V tolerant) with alternate functions USART2_TX, ADC1_IN2, TIM2_CH3 and TIM15_CH1. |
| 13 | PA3 | bidirectional | General-purpose I/O PA3 (not 5 V tolerant) with alternate functions USART2_RX, ADC1_IN3, TIM2_CH4 and TIM15_CH2. |
| 14 | PA4 | bidirectional | General-purpose I/O PA4 (not 5 V tolerant) with alternate functions SPI1_NSS, USART2_CK, ADC1_IN4 and DAC1_OUT. |
| 15 | PA5 | bidirectional | General-purpose I/O PA5 (not 5 V tolerant) with alternate functions SPI1_SCK, ADC1_IN5 and DAC2_OUT. |
| 16 | PA6 | bidirectional | General-purpose I/O PA6 (not 5 V tolerant) with alternate functions SPI1_MISO, ADC1_IN6 and TIM3_CH1; TIM1_BKIN and TIM16_CH1 are remap options. |
| 17 | PA7 | bidirectional | General-purpose I/O PA7 (not 5 V tolerant) with alternate functions SPI1_MOSI, ADC1_IN7 and TIM3_CH2; TIM1_CH1N and TIM17_CH1 are remap options. |
| 18 | PB0 | bidirectional | General-purpose I/O PB0 (not 5 V tolerant) with alternate functions ADC1_IN8 and TIM3_CH3; TIM1_CH2N is a remap option. |
| 19 | PB1 | bidirectional | General-purpose I/O PB1 (not 5 V tolerant) with alternate functions ADC1_IN9 and TIM3_CH4; TIM1_CH3N is a remap option. |
| 20 | PB2/BOOT1 | bidirectional | 5 V tolerant general-purpose I/O PB2 that also serves as the BOOT1 boot-mode pin. |
| 21 | PB10 | bidirectional | 5 V tolerant I/O PB10 with alternate functions I2C2_SCL, USART3_TX, TIM2_CH3 and HDMI_CEC; I2C2 is not present on low-density devices. |
| 22 | PB11 | bidirectional | 5 V tolerant I/O PB11 with alternate functions I2C2_SDA, USART3_RX and TIM2_CH4; I2C2 is not present on low-density devices. |
| 23 | VSS_1 | power_in | Digital ground. |
| 24 | VDD_1 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |
| 25 | PB12 | bidirectional | 5 V tolerant I/O PB12 with alternate functions SPI2_NSS, I2C2_SMBA, TIM1_BKIN and USART3_CK; SPI2 and I2C2 are not present on low-density devices. |
| 26 | PB13 | bidirectional | 5 V tolerant I/O PB13 with alternate functions SPI2_SCK, TIM1_CH1N and USART3_CTS; SPI2 is not present on low-density devices. |
| 27 | PB14 | bidirectional | 5 V tolerant I/O PB14 with alternate functions SPI2_MISO, TIM1_CH2N and USART3_RTS; TIM15_CH1 is a remap option and SPI2 is not present on low-density devices. |
| 28 | PB15 | bidirectional | 5 V tolerant I/O PB15 with alternate functions SPI2_MOSI, TIM1_CH3N and TIM15_CH1N; TIM15_CH2 is a remap option and SPI2 is not present on low-density devices. |
| 29 | PA8 | bidirectional | 5 V tolerant I/O PA8 with alternate functions USART1_CK, MCO and TIM1_CH1. |
| 30 | PA9 | bidirectional | 5 V tolerant I/O PA9 with alternate functions USART1_TX, TIM1_CH2 and TIM15_BKIN. |
| 31 | PA10 | bidirectional | 5 V tolerant I/O PA10 with alternate functions USART1_RX, TIM1_CH3 and TIM17_BKIN. |
| 32 | PA11 | bidirectional | 5 V tolerant I/O PA11 with alternate functions USART1_CTS and TIM1_CH4. |
| 33 | PA12 | bidirectional | 5 V tolerant I/O PA12 with alternate functions USART1_RTS and TIM1_ETR. |
| 34 | PA13 | bidirectional | 5 V tolerant I/O PA13 whose default function is the JTMS-SWDIO debug pin. |
| 35 | VSS_2 | power_in | Digital ground. |
| 36 | VDD_2 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |
| 37 | PA14 | bidirectional | 5 V tolerant I/O PA14 whose default function is the JTCK-SWCLK debug pin. |
| 38 | PA15 | bidirectional | 5 V tolerant I/O PA15 with default function JTDI and alternate functions TIM2_CH1_ETR and SPI1_NSS. |
| 39 | PB3 | bidirectional | 5 V tolerant I/O PB3 whose default function is JTDO; alternate functions include TIM2_CH2, TRACESWO and SPI1_SCK. |
| 40 | PB4 | bidirectional | 5 V tolerant I/O PB4 whose default function is NJTRST; alternate functions include TIM3_CH1 and SPI1_MISO. |
| 41 | PB5 | bidirectional | Non-5 V-tolerant I/O PB5 with alternate functions I2C1_SMBA, TIM16_BKIN, TIM3_CH2 and SPI1_MOSI. |
| 42 | PB6 | bidirectional | 5 V tolerant I/O PB6 with alternate functions I2C1_SCL, TIM16_CH1N and USART1_TX; TIM4_CH1 is not present on low-density devices. |
| 43 | PB7 | bidirectional | 5 V tolerant I/O PB7 with alternate functions I2C1_SDA, TIM17_CH1N and USART1_RX; TIM4_CH2 is not present on low-density devices. |
| 44 | BOOT0 | input | Boot mode selection input (type I, not 5 V tolerant) that works together with PB2/BOOT1. |
| 45 | PB8 | bidirectional | 5 V tolerant I/O PB8 with alternate functions TIM16_CH1, CEC and I2C1_SCL; TIM4_CH3 is not present on low-density devices. |
| 46 | PB9 | bidirectional | 5 V tolerant I/O PB9 with alternate functions TIM17_CH1 and I2C1_SDA; TIM4_CH4 is not present on low-density devices. |
| 47 | VSS_3 | power_in | Digital ground. |
| 48 | VDD_3 | power_in | Digital supply pin; the application supply and I/Os are specified at 2.0 to 3.6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
## CAD (KiCad official)
- Symbol: `STM32F100C4T7B`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `stm32f100c4t7b-etched.step` / `stm32f100c4t7b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f100c4t7b.step` / `stm32f100c4t7b.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923781562056704) (96 pp, sha256 `360e3be010cabad4`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm32f100c4t7b-datasheet.pdf)