Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Download PDF

Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32F098RCT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F098RCT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup power supply for the RTC, the 32 kHz oscillator and backup registers, specified at 1.65 V to 3.6 V when VDD is not present.
2	PC13	bidirectional	Standard 3.3 V I/O supplied through the power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF maximum load and the pin must not be used as a current source.
3	PC14-OSC32_IN	bidirectional	Standard 3.3 V I/O supplied through the power switch (3 mA limit, 2 MHz / 30 pF output limit) that also serves as OSC32_IN for the 32 kHz oscillator.
4	PC15-OSC32_OUT	bidirectional	Standard 3.3 V I/O supplied through the power switch (3 mA limit, 2 MHz / 30 pF output limit) that also serves as OSC32_OUT for the 32 kHz oscillator.
5	PF0-OSC_IN	bidirectional	5 V-tolerant FM+-capable I/O (FTf) that is also the OSC_IN pin for the 4 to 32 MHz crystal oscillator, with CRS_SYNC and I2C1_SDA alternate functions.
6	PF1-OSC_OUT	bidirectional	5 V-tolerant FM+-capable I/O (FTf) that is also the OSC_OUT pin for the 4 to 32 MHz crystal oscillator, with I2C1_SCL alternate function.
7	NRST	bidirectional	Bidirectional reset pin with embedded weak pull-up, acting as active-low device reset input and internal reset output.
8	PC0	bidirectional	3.3 V-tolerant TTa I/O directly connected to the ADC (ADC_IN10), also EVENTOUT, USART6_TX and USART7_TX.
9	PC1	bidirectional	3.3 V-tolerant TTa I/O directly connected to the ADC (ADC_IN11), also EVENTOUT, USART6_RX and USART7_RX.
10	PC2	bidirectional	3.3 V-tolerant TTa I/O directly connected to the ADC (ADC_IN12), also SPI2_MISO, I2S2_MCK, EVENTOUT and USART8_TX.
11	PC3	bidirectional	3.3 V-tolerant TTa I/O directly connected to the ADC (ADC_IN13), also SPI2_MOSI, I2S2_SD, EVENTOUT and USART8_RX.
12	VSSA	power_in	Analog ground for the ADC, DAC, RC oscillators and PLL.
13	VDDA	power_in	Analog power supply for ADC, DAC, RCs and PLL, from VDD up to 3.6 V, must be established first and must be at least 2.4 V when the ADC or DAC is used.
14	PA0	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN0, WKUP1, RTC_TAMP2, COMP1_OUT and COMP1_INM6 functions, plus USART2_CTS, TIM2_CH1_ETR, TSC_G1_IO1 and USART4_TX.
15	PA1	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN1 and COMP1_INP functions, plus USART2_RTS, TIM2_CH2, TIM15_CH1N, TSC_G1_IO2, USART4_RX and EVENTOUT.
16	PA2	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN2, WKUP4, COMP2_INM6 and COMP2_OUT functions, plus USART2_TX, TIM2_CH3, TIM15_CH1 and TSC_G1_IO3.
17	PA3	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN3 and COMP2_INP functions, plus USART2_RX, TIM2_CH4, TIM15_CH2 and TSC_G1_IO4.
18	VSS	power_in	Ground pin.
19	VDD	power_in	Digital power supply, 1.8 V ±8%, for I/O (VDDIO1) and digital logic.
20	PA4	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN4, DAC_OUT1, COMP1_INM4 and COMP2_INM4 functions, plus SPI1_NSS, I2S1_WS, TIM14_CH1, TSC_G2_IO1, USART2_CK and USART6_TX.
21	PA5	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN5, DAC_OUT2, COMP1_INM5 and COMP2_INM5 functions, plus SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2 and USART6_RX.
22	PA6	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN6 function, plus SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT and USART3_CTS.
23	PA7	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN7 function, plus SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4 and EVENTOUT.
24	PC4	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN14 function, plus EVENTOUT and USART3_TX.
25	PC5	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN15 and WKUP5 functions, plus TSC_G3_IO1 and USART3_RX.
26	PB0	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN8 function, plus TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT and USART3_CK.
27	PB1	bidirectional	3.3 V-tolerant TTa I/O with ADC_IN9 function, plus TIM3_CH4, USART3_RTS, TIM14_CH1, TIM1_CH3N and TSC_G3_IO3.
28	NPOR	input	Device power-on reset input (active low) with embedded pull-up, powered from VDDA, which must be held low until VDD is stable.
29	PB10	bidirectional	5 V-tolerant FM+-capable I/O (FTf) with SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_TX, CEC, TSC_SYNC and TIM2_CH3 functions.
30	PB11	bidirectional	5 V-tolerant FM+-capable I/O (FTf) with USART3_RX, TIM2_CH4, EVENTOUT, TSC_G6_IO1 and I2C2_SDA functions.
31	VSS	power_in	Ground pin.
32	VDD	power_in	Digital power supply, 1.8 V ±8%, for I/O (VDDIO1) and digital logic.
33	PB12	bidirectional	5 V-tolerant I/O (FT) with TIM1_BKIN, TIM15_BKIN, SPI2_NSS, I2S2_WS, USART3_CK, TSC_G6_IO2 and EVENTOUT functions.
34	PB13	bidirectional	5 V-tolerant FM+-capable I/O (FTf) with SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_CTS, TIM1_CH1N and TSC_G6_IO3 functions.
35	PB14	bidirectional	5 V-tolerant FM+-capable I/O (FTf) with SPI2_MISO, I2S2_MCK, I2C2_SDA, USART3_RTS, TIM1_CH2N, TIM15_CH1 and TSC_G6_IO4 functions.
36	PB15	bidirectional	5 V-tolerant I/O (FT) with SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM15_CH1N, TIM15_CH2, WKUP7 and RTC_REFIN functions.
37	PC6	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with TIM3_CH1 and USART7_TX functions.
38	PC7	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with TIM3_CH2 and USART7_RX functions.
39	PC8	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with TIM3_CH3 and USART8_TX functions.
40	PC9	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with TIM3_CH4 and USART8_RX functions.
41	PA8	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with USART1_CK, TIM1_CH1, EVENTOUT, MCO and CRS_SYNC functions.
42	PA9	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with USART1_TX, TIM1_CH2, TIM15_BKIN, MCO, TSC_G4_IO1 and I2C1_SCL functions.
43	PA10	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2 and I2C1_SDA functions.
44	PA11	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with CAN_RX, USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT and I2C2_SCL functions.
45	PA12	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with CAN_TX, USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT and I2C2_SDA functions.
46	PA13	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2 that after reset is SWDIO with internal pull-up enabled, also IR_OUT.
47	VSS	power_in	Ground pin.
48	VDDIO2	power_in	Digital power supply for the marked I/Os, 1.65 V to 3.6 V, completely independent from VDD or VDDA but not to be provided without a valid VDD supply.
49	PA14	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2 that after reset is SWCLK with internal pull-down enabled, also USART2_TX.
50	PA15	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with SPI1_NSS, I2S1_WS, USART2_RX, USART4_RTS, TIM2_CH1_ETR and EVENTOUT functions.
51	PC10	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with USART3_TX and USART4_TX functions.
52	PC11	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with USART3_RX and USART4_RX functions.
53	PC12	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with USART3_CK, USART4_CK and USART5_TX functions.
54	PD2	bidirectional	5 V-tolerant I/O (FT) supplied by VDDIO2, with USART3_RTS, TIM3_ETR and USART5_RX functions.
55	PB3	bidirectional	5 V-tolerant I/O (FT) with SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT and USART5_TX functions.
56	PB4	bidirectional	5 V-tolerant I/O (FT) with SPI1_MISO, I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, EVENTOUT and USART5_RX functions.
57	PB5	bidirectional	5 V-tolerant I/O (FT) with SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2, USART5_CK_RTS and WKUP6 functions.
58	PB6	bidirectional	5 V-tolerant FM+-capable I/O (FTf) with I2C1_SCL, USART1_TX, TIM16_CH1N and TSC_G5_IO3 functions.
59	PB7	bidirectional	5 V-tolerant FM+-capable I/O (FTf) with I2C1_SDA, USART1_RX, USART4_CTS, TIM17_CH1N and TSC_G5_IO4 functions.
60	PF11-BOOT0	bidirectional	5 V-tolerant I/O (FT) that is also the BOOT0 pin used for boot memory selection, and the boot pin can be disabled through the boot selector option bits.
61	PB8	bidirectional	5 V-tolerant FM+-capable I/O (FTf) with I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC and CAN_RX functions.
62	PB9	bidirectional	5 V-tolerant FM+-capable I/O (FTf) with SPI2_NSS, I2S2_WS, I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT and CAN_TX functions.
63	VSS	power_in	Ground pin.
64	VDD	power_in	Digital power supply, 1.8 V ±8%, for I/O (VDDIO1) and digital logic.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: STM32F098RCT6
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: stm32f098rct6-etched.step / stm32f098rct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f098rct6.step / stm32f098rct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (128 pp, sha256 15088ea414db56a4, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF