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Ray Initial commit: component/stm32f091vct6 5d1d195 9d ago

STM32F091VCT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F091VCT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional FT GPIO; alternate functions TSC_G7_IO1 (touch sensing group 7), TIM3_ETR; 5 V-tolerant input, ±8 mA output drive.
2 PE3 bidirectional FT GPIO; alternate functions TSC_G7_IO2, TIM3_CH1; 5 V-tolerant input, ±8 mA output drive.
3 PE4 bidirectional FT GPIO; alternate functions TSC_G7_IO3, TIM3_CH2; 5 V-tolerant input, ±8 mA output drive.
4 PE5 bidirectional FT GPIO; alternate functions TSC_G7_IO4, TIM3_CH3; 5 V-tolerant input, ±8 mA output drive.
5 PE6 bidirectional FT GPIO; alternate function TIM3_CH4; additional functions WKUP3, RTC_TAMP3; 5 V-tolerant input, ±8 mA output drive.
6 VBAT power_in Backup domain power supply for RTC, 32 kHz oscillator, and backup registers when VDD is absent; 1.65 to 3.6 V.
7 PC13 bidirectional TC GPIO supplied through power switch; limited to 3 mA max current, 2 MHz max speed, 30 pF max load; additional functions WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT.
8 PC14-OSC32_IN bidirectional TC GPIO / 32.768 kHz oscillator input (OSC32_IN); supplied through power switch (3 mA, 2 MHz, 30 pF limit); function depends on RTC registers after first power-up.
9 PC15-OSC32_OUT bidirectional TC GPIO / 32.768 kHz oscillator output (OSC32_OUT); supplied through power switch (3 mA, 2 MHz, 30 pF limit); function depends on RTC registers after first power-up.
10 PF9 bidirectional FT GPIO; alternate functions TIM15_CH1, USART6_TX; 5 V-tolerant input, ±8 mA output drive.
11 PF10 bidirectional FT GPIO; alternate functions TIM15_CH2, USART6_RX; 5 V-tolerant input, ±8 mA output drive.
12 PF0-OSC_IN bidirectional FTf GPIO / HSE oscillator input (4-32 MHz); alternate functions CRS_SYNC, I2C1_SDA; 5 V-tolerant, Fast-mode Plus capable (20 mA sink).
13 PF1-OSC_OUT bidirectional FTf GPIO / HSE oscillator output; alternate function I2C1_SCL; 5 V-tolerant, Fast-mode Plus capable (20 mA sink).
14 NRST bidirectional Active-low bidirectional reset pin with embedded pull-up resistor (25-55 kΩ typical 40 kΩ); VIL max 0.3×VDD+0.07 V; minimum unfiltered pulse 300 ns (VDD > 2.7 V).
15 PC0 bidirectional TTa GPIO with ADC_IN10 analog input (0 to VDDA); alternate functions EVENTOUT, USART6_TX, USART7_TX; 3.3 V-tolerant, max ±8 mA output drive.
16 PC1 bidirectional TTa GPIO with ADC_IN11 analog input (0 to VDDA); alternate functions EVENTOUT, USART6_RX, USART7_RX; 3.3 V-tolerant, max ±8 mA output drive.
17 PC2 bidirectional TTa GPIO with ADC_IN12 analog input (0 to VDDA); alternate functions SPI2_MISO, I2S2_MCK, USART8_TX; 3.3 V-tolerant, max ±8 mA output drive.
18 PC3 bidirectional TTa GPIO with ADC_IN13 analog input (0 to VDDA); alternate functions SPI2_MOSI, I2S2_SD, USART8_RX; 3.3 V-tolerant, max ±8 mA output drive.
19 PF2 bidirectional FT GPIO; alternate functions EVENTOUT, USART7_TX, USART7_CK_RTS; additional function WKUP8; 5 V-tolerant, max ±8 mA output drive.
20 VSSA power_in Analog ground reference for ADC, DAC, comparators, internal oscillators, and PLL; must always be connected to VSS.
21 VDDA power_in Analog power supply for ADC, DAC, comparators, RCs, and PLL; VDD to 3.6 V (min 2.4 V when ADC or DAC used); must be ≥ VDD.
22 PF3 bidirectional FT GPIO; alternate functions EVENTOUT, USART7_RX, USART6_CK_RTS; 5 V-tolerant, max ±8 mA output drive.
23 PA0 bidirectional TTa GPIO with ADC_IN0, COMP1_INM6; alternate functions USART2_CTS, TIM2_CH1_ETR, TSC_G1_IO1, USART4_TX, COMP1_OUT; additional WKUP1, RTC_TAMP2.
24 PA1 bidirectional TTa GPIO with ADC_IN1, COMP1_INP; alternate functions USART2_RTS, TIM2_CH2, TIM15_CH1N, TSC_G1_IO2, USART4_RX; max ±8 mA output drive.
25 PA2 bidirectional TTa GPIO with ADC_IN2, COMP2_INM6; alternate functions USART2_TX, TIM2_CH3, TIM15_CH1, TSC_G1_IO3, COMP2_OUT; additional WKUP4.
26 PA3 bidirectional TTa GPIO with ADC_IN3, COMP2_INP; alternate functions USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4; max ±8 mA output drive.
27 VSS power_in Digital ground supply; 0 V reference for core logic and I/Os.
28 VDD power_in Main digital power supply (VDDIO1) for core logic and I/Os; 2.0 to 3.6 V; max 100 mA per pin.
29 PA4 bidirectional TTa GPIO with ADC_IN4, DAC_OUT1, COMP1_INM4, COMP2_INM4; alternate functions SPI1_NSS, I2S1_WS, TIM14_CH1, TSC_G2_IO1, USART2_CK, USART6_TX.
30 PA5 bidirectional TTa GPIO with ADC_IN5, DAC_OUT2, COMP1_INM5, COMP2_INM5; alternate functions SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2, USART6_RX.
31 PA6 bidirectional TTa GPIO with ADC_IN6; alternate functions SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, USART3_CTS; max ±8 mA output drive.
32 PA7 bidirectional TTa GPIO with ADC_IN7; alternate functions SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4; max ±8 mA output drive.
33 PC4 bidirectional TTa GPIO with ADC_IN14; alternate functions EVENTOUT, USART3_TX; 3.3 V-tolerant, max ±8 mA output drive.
34 PC5 bidirectional TTa GPIO with ADC_IN15; alternate functions TSC_G3_IO1, USART3_RX; additional WKUP5; 3.3 V-tolerant, max ±8 mA output drive.
35 PB0 bidirectional TTa GPIO with ADC_IN8; alternate functions TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT, USART3_CK; max ±8 mA output drive.
36 PB1 bidirectional TTa GPIO with ADC_IN9; alternate functions TIM3_CH4, USART3_RTS, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3; max ±8 mA output drive.
37 PB2 bidirectional FT GPIO; alternate function TSC_G3_IO4; 5 V-tolerant, max ±8 mA output drive.
38 PE7 bidirectional FT GPIO; alternate functions TIM1_ETR, USART5_CK_RTS; 5 V-tolerant, max ±8 mA output drive.
39 PE8 bidirectional FT GPIO; alternate functions TIM1_CH1N, USART4_TX; 5 V-tolerant, max ±8 mA output drive.
40 PE9 bidirectional FT GPIO; alternate functions TIM1_CH1, USART4_RX; 5 V-tolerant, max ±8 mA output drive.
41 PE10 bidirectional FT GPIO; alternate functions TIM1_CH2N, USART5_TX; 5 V-tolerant, max ±8 mA output drive.
42 PE11 bidirectional FT GPIO; alternate functions TIM1_CH2, USART5_RX; 5 V-tolerant, max ±8 mA output drive.
43 PE12 bidirectional FT GPIO; alternate functions SPI1_NSS, I2S1_WS, TIM1_CH3N; 5 V-tolerant, max ±8 mA output drive.
44 PE13 bidirectional FT GPIO; alternate functions SPI1_SCK, I2S1_CK, TIM1_CH3; 5 V-tolerant, max ±8 mA output drive.
45 PE14 bidirectional FT GPIO; alternate functions SPI1_MISO, I2S1_MCK, TIM1_CH4; 5 V-tolerant, max ±8 mA output drive.
46 PE15 bidirectional FT GPIO; alternate functions SPI1_MOSI, I2S1_SD, TIM1_BKIN; 5 V-tolerant, max ±8 mA output drive.
47 PB10 bidirectional FTf GPIO; alternate functions SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_TX, CEC, TSC_SYNC, TIM2_CH3; 5 V-tolerant, Fast-mode Plus capable (20 mA sink).
48 PB11 bidirectional FTf GPIO; alternate functions USART3_RX, TIM2_CH4, EVENTOUT, TSC_G6_IO1, I2C2_SDA; 5 V-tolerant, Fast-mode Plus capable (20 mA sink).
49 VSS power_in Digital ground supply; 0 V reference for core logic and I/Os.
50 VDD power_in Main digital power supply (VDDIO1) for core logic and I/Os; 2.0 to 3.6 V; max 100 mA per pin.
51 PB12 bidirectional FT GPIO; alternate functions TIM1_BKIN, TIM15_BKIN, SPI2_NSS, I2S2_WS, USART3_CK, TSC_G6_IO2; 5 V-tolerant, max ±8 mA output drive.
52 PB13 bidirectional FTf GPIO; alternate functions SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_CTS, TIM1_CH1N, TSC_G6_IO3; 5 V-tolerant, Fast-mode Plus capable (20 mA sink).
53 PB14 bidirectional FTf GPIO; alternate functions SPI2_MISO, I2S2_MCK, I2C2_SDA, USART3_RTS, TIM1_CH2N, TIM15_CH1, TSC_G6_IO4; 5 V-tolerant, Fm+ capable.
54 PB15 bidirectional FT GPIO; alternate functions SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM15_CH1N, TIM15_CH2; additional functions WKUP7, RTC_REFIN; 5 V-tolerant.
55 PD8 bidirectional FT GPIO; alternate function USART3_TX; 5 V-tolerant, max ±8 mA output drive.
56 PD9 bidirectional FT GPIO; alternate function USART3_RX; 5 V-tolerant, max ±8 mA output drive.
57 PD10 bidirectional FT GPIO; alternate function USART3_CK; 5 V-tolerant, max ±8 mA output drive.
58 PD11 bidirectional FT GPIO; alternate function USART3_CTS; 5 V-tolerant, max ±8 mA output drive.
59 PD12 bidirectional FT GPIO; alternate functions USART3_RTS, TSC_G8_IO1, USART8_CK_RTS; 5 V-tolerant, max ±8 mA output drive.
60 PD13 bidirectional FT GPIO; alternate functions TSC_G8_IO2, USART8_TX; 5 V-tolerant, max ±8 mA output drive.
61 PD14 bidirectional FT GPIO; alternate functions TSC_G8_IO3, USART8_RX; 5 V-tolerant, max ±8 mA output drive.
62 PD15 bidirectional FT GPIO; alternate functions TSC_G8_IO4, CRS_SYNC, USART7_CK_RTS; 5 V-tolerant, max ±8 mA output drive.
63 PC6 bidirectional FT GPIO supplied by VDDIO2; alternate functions TIM3_CH1, USART7_TX; 5 V-tolerant, max ±8 mA output drive (max 40 mA total VDDIO2-sourced current).
64 PC7 bidirectional FT GPIO supplied by VDDIO2; alternate functions TIM3_CH2, USART7_RX; 5 V-tolerant, max ±8 mA output drive.
65 PC8 bidirectional FT GPIO supplied by VDDIO2; alternate functions TIM3_CH3, USART8_TX; 5 V-tolerant, max ±8 mA output drive.
66 PC9 bidirectional FT GPIO supplied by VDDIO2; alternate functions TIM3_CH4, USART8_RX; 5 V-tolerant, max ±8 mA output drive.
67 PA8 bidirectional FT GPIO supplied by VDDIO2; alternate functions USART1_CK, TIM1_CH1, MCO (clock output), CRS_SYNC; 5 V-tolerant, max ±8 mA output drive.
68 PA9 bidirectional FT GPIO supplied by VDDIO2; alternate functions USART1_TX, TIM1_CH2, TIM15_BKIN, MCO, TSC_G4_IO1, I2C1_SCL; 5 V-tolerant.
69 PA10 bidirectional FT GPIO supplied by VDDIO2; alternate functions USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2, I2C1_SDA; 5 V-tolerant.
70 PA11 bidirectional FT GPIO supplied by VDDIO2; alternate functions CAN_RX, USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3, I2C2_SCL; 5 V-tolerant.
71 PA12 bidirectional FT GPIO supplied by VDDIO2; alternate functions CAN_TX, USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, I2C2_SDA; 5 V-tolerant.
72 PA13 bidirectional FT GPIO supplied by VDDIO2; default function SWDIO (with internal pull-up activated at reset); alternate function IR_OUT; 5 V-tolerant.
73 PF6 bidirectional FT GPIO supplied by VDDIO2; no alternate functions defined; 5 V-tolerant, max ±8 mA output drive.
74 VSS power_in Digital ground supply; 0 V reference for core logic and I/Os.
75 VDDIO2 power_in Independent I/O power supply for 19 I/Os (PA8-PA15, PC6-PC12, PD0-PD2, PF6); 1.65 to 3.6 V; must not be supplied without valid VDD; monitored by internal comparator against VREFINT.
76 PA14 bidirectional FT GPIO supplied by VDDIO2; default function SWCLK (with internal pull-down activated at reset); alternate function USART2_TX; 5 V-tolerant.
77 PA15 bidirectional FT GPIO supplied by VDDIO2; alternate functions SPI1_NSS, I2S1_WS, USART2_RX, USART4_RTS, TIM2_CH1_ETR; 5 V-tolerant.
78 PC10 bidirectional FT GPIO supplied by VDDIO2; alternate functions USART3_TX, USART4_TX; 5 V-tolerant, max ±8 mA output drive.
79 PC11 bidirectional FT GPIO supplied by VDDIO2; alternate functions USART3_RX, USART4_RX; 5 V-tolerant, max ±8 mA output drive.
80 PC12 bidirectional FT GPIO supplied by VDDIO2; alternate functions USART3_CK, USART4_CK, USART5_TX; 5 V-tolerant, max ±8 mA output drive.
81 PD0 bidirectional FT GPIO supplied by VDDIO2; alternate functions SPI2_NSS, I2S2_WS, CAN_RX; 5 V-tolerant, max ±8 mA output drive.
82 PD1 bidirectional FT GPIO supplied by VDDIO2; alternate functions SPI2_SCK, I2S2_CK, CAN_TX; 5 V-tolerant, max ±8 mA output drive.
83 PD2 bidirectional FT GPIO supplied by VDDIO2; alternate functions USART3_RTS, TIM3_ETR, USART5_RX; 5 V-tolerant, max ±8 mA output drive.
84 PD3 bidirectional FT GPIO; alternate functions SPI2_MISO, I2S2_MCK, USART2_CTS; 5 V-tolerant, max ±8 mA output drive.
85 PD4 bidirectional FT GPIO; alternate functions SPI2_MOSI, I2S2_SD, USART2_RTS; 5 V-tolerant, max ±8 mA output drive.
86 PD5 bidirectional FT GPIO; alternate function USART2_TX; 5 V-tolerant, max ±8 mA output drive.
87 PD6 bidirectional FT GPIO; alternate function USART2_RX; 5 V-tolerant, max ±8 mA output drive.
88 PD7 bidirectional FT GPIO; alternate function USART2_CK; 5 V-tolerant, max ±8 mA output drive.
89 PB3 bidirectional FT GPIO; alternate functions SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, USART5_TX; 5 V-tolerant, max ±8 mA output drive.
90 PB4 bidirectional FT GPIO; alternate functions SPI1_MISO, I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, USART5_RX; 5 V-tolerant.
91 PB5 bidirectional FT GPIO; alternate functions SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2, USART5_CK_RTS; additional WKUP6; 5 V-tolerant.
92 PB6 bidirectional FTf GPIO; alternate functions I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3; 5 V-tolerant, Fast-mode Plus capable (20 mA sink).
93 PB7 bidirectional FTf GPIO; alternate functions I2C1_SDA, USART1_RX, USART4_CTS, TIM17_CH1N, TSC_G5_IO4; 5 V-tolerant, Fast-mode Plus capable.
94 PF11-BOOT0 bidirectional FT GPIO; sampled at reset to select boot memory source (BOOT0 function); alternate functions none defined; 5 V-tolerant, max ±8 mA output drive.
95 PB8 bidirectional FTf GPIO; alternate functions I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC, CAN_RX; 5 V-tolerant, Fast-mode Plus capable (20 mA sink).
96 PB9 bidirectional FTf GPIO; alternate functions SPI2_NSS, I2S2_WS, I2C1_SDA, IR_OUT, TIM17_CH1, CAN_TX; 5 V-tolerant, Fast-mode Plus capable.
97 PE0 bidirectional FT GPIO; alternate functions EVENTOUT, TIM16_CH1; 5 V-tolerant, max ±8 mA output drive.
98 PE1 bidirectional FT GPIO; alternate functions EVENTOUT, TIM17_CH1; 5 V-tolerant, max ±8 mA output drive.
99 VSS power_in Digital ground supply; 0 V reference for core logic and I/Os.
100 VDD power_in Main digital power supply (VDDIO1) for core logic and I/Os; 2.0 to 3.6 V; max 100 mA per pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F091VCT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f091vct6-etched.step / stm32f091vct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f091vct6.step / stm32f091vct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (128 pp, sha256 f96a82f50344c619, retrieved 2026-09-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF