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STM32F072R8T6TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32F072R8T6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F072R8T6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply (1.65 to 3.6 V) for the RTC, the external 32 kHz oscillator and backup registers when VDD is not present.
2 PC13 bidirectional Standard 3.3 V I/O (TC) supplied through the power switch; the switch sinks only 3 mA, so output use is limited to 2 MHz with a 30 pF maximum load and the pin must not source current such as driving an LED. Additional functions: WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT.
3 PC14-OSC32_IN bidirectional Standard 3.3 V I/O (TC) supplied through the power switch with the same 3 mA and output-use limits as PC13; alternate function OSC32_IN is the 32 kHz oscillator input.
4 PC15-OSC32_OUT bidirectional Standard 3.3 V I/O (TC) supplied through the power switch with the same 3 mA and output-use limits as PC13; alternate function OSC32_OUT is the 32 kHz oscillator output.
5 PF0-OSC_IN bidirectional 5 V-tolerant I/O (FT); alternate function CRS_SYNC, and additional function OSC_IN is the high-speed (4 to 32 MHz) crystal oscillator input.
6 PF1-OSC_OUT bidirectional 5 V-tolerant I/O (FT); additional function OSC_OUT is the high-speed crystal oscillator output.
7 NRST bidirectional Bidirectional active-low reset pin with embedded weak pull-up, acting as device reset input and internal reset output.
8 PC0 bidirectional 3.3 V-tolerant I/O (TTa) connected directly to the ADC; alternate function EVENTOUT, additional function ADC_IN10.
9 PC1 bidirectional 3.3 V-tolerant I/O (TTa) connected directly to the ADC; alternate function EVENTOUT, additional function ADC_IN11.
10 PC2 bidirectional 3.3 V-tolerant I/O (TTa) connected directly to the ADC; alternate functions SPI2_MISO, I2S2_MCK, EVENTOUT, additional function ADC_IN12.
11 PC3 bidirectional 3.3 V-tolerant I/O (TTa) connected directly to the ADC; alternate functions SPI2_MOSI, I2S2_SD, EVENTOUT, additional function ADC_IN13.
12 VSSA power_in Analog ground pin for the ADC, DAC, reset block and RC oscillators.
13 VDDA power_in Analog power supply, from VDD up to 3.6 V and not below VDD; minimum 2.4 V when the ADC or DAC is used.
14 PA0 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1, USART4_TX; additional functions RTC_TAMP2, WKUP1, ADC_IN0, COMP1_INM6.
15 PA1 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions USART2_RTS, TIM2_CH2, TIM15_CH1N, TSC_G1_IO2, USART4_RX, EVENTOUT; additional functions ADC_IN1, COMP1_INP.
16 PA2 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions USART2_TX, COMP2_OUT, TIM2_CH3, TIM15_CH1, TSC_G1_IO3; additional functions ADC_IN2, COMP2_INM6, WKUP4.
17 PA3 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4; additional functions ADC_IN3, COMP2_INP.
18 VSS power_in Digital ground pin.
19 VDD power_in Digital power supply, 2.0 to 3.6 V, which also feeds the internal regulator.
20 PA4 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions SPI1_NSS, I2S1_WS, USART2_CK, TSC_G2_IO1, TIM14_CH1; additional functions ADC_IN4, DAC_OUT1, COMP1_INM4, COMP2_INM4.
21 PA5 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2; additional functions ADC_IN5, DAC_OUT2, COMP1_INM5, COMP2_INM5.
22 PA6 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT, USART3_CTS; additional function ADC_IN6.
23 PA7 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT; additional function ADC_IN7.
24 PC4 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions EVENTOUT, USART3_TX; additional function ADC_IN14.
25 PC5 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions TSC_G3_IO1, USART3_RX; additional functions ADC_IN15, WKUP5.
26 PB0 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT, USART3_CK; additional function ADC_IN8.
27 PB1 bidirectional 3.3 V-tolerant I/O (TTa) connected to the ADC; alternate functions TIM3_CH4, USART3_RTS, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3; additional function ADC_IN9.
28 PB2 bidirectional 5 V-tolerant I/O (FT); alternate function TSC_G3_IO4.
29 PB10 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI2_SCK, I2C2_SCL, USART3_TX, CEC, TSC_SYNC, TIM2_CH3.
30 PB11 bidirectional 5 V-tolerant I/O (FT); alternate functions USART3_RX, TIM2_CH4, EVENTOUT, TSC_G6_IO1, I2C2_SDA.
31 VSS power_in Digital ground pin.
32 VDD power_in Digital power supply, 2.0 to 3.6 V.
33 PB12 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_BKIN, TIM15_BKIN, SPI2_NSS, I2S2_WS, USART3_CK, TSC_G6_IO2, EVENTOUT.
34 PB13 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_CTS, TIM1_CH1N, TSC_G6_IO3.
35 PB14 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions SPI2_MISO, I2S2_MCK, I2C2_SDA, USART3_RTS, TIM1_CH2N, TIM15_CH1, TSC_G6_IO4.
36 PB15 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM15_CH1N, TIM15_CH2; additional functions WKUP7, RTC_REFIN.
37 PC6 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate function TIM3_CH1.
38 PC7 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate function TIM3_CH2.
39 PC8 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate function TIM3_CH3.
40 PC9 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate function TIM3_CH4.
41 PA8 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate functions USART1_CK, TIM1_CH1, EVENTOUT, MCO, CRS_SYNC.
42 PA9 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate functions USART1_TX, TIM1_CH2, TIM15_BKIN, TSC_G4_IO1.
43 PA10 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate functions USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2.
44 PA11 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate functions CAN_RX, USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT; additional function USB_DM.
45 PA12 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate functions CAN_TX, USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT; additional function USB_DP.
46 PA13 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2; after reset it is SWDIO with internal pull-up enabled; alternate functions IR_OUT, USB_NOE.
47 VSS power_in Digital ground pin.
48 VDDIO2 power_in Digital power supply for marked I/Os, 1.65 to 3.6 V, independent of VDD/VDDA but must not be present without a valid VDD supply.
49 PA14 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2; after reset it is SWCLK with internal pull-down enabled; alternate function USART2_TX.
50 PA15 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2; alternate functions SPI1_NSS, I2S1_WS, USART2_RX, USART4_RTS, TIM2_CH1_ETR, EVENTOUT.
51 PC10 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate functions USART3_TX, USART4_TX.
52 PC11 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate functions USART3_RX, USART4_RX.
53 PC12 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate functions USART3_CK, USART4_CK.
54 PD2 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2 (1.65 to 3.6 V); alternate functions USART3_RTS, TIM3_ETR.
55 PB3 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT.
56 PB4 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI1_MISO, I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, EVENTOUT.
57 PB5 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2; additional function WKUP6.
58 PB6 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3.
59 PB7 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions I2C1_SDA, USART1_RX, USART4_CTS, TIM17_CH1N, TSC_G5_IO4.
60 BOOT0 input Dedicated BOOT0 pin that selects the boot memory (User Flash, System Memory or embedded SRAM) at startup together with the boot option bit.
61 PB8 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC, CAN_RX.
62 PB9 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions SPI2_NSS, I2S2_WS, I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT, CAN_TX.
63 VSS power_in Digital ground pin.
64 VDD power_in Digital power supply, 2.0 to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F072R8T6TR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f072r8t6tr-etched.step / stm32f072r8t6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f072r8t6tr.step / stm32f072r8t6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (128 pp, sha256 b01391f094699aeb, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF