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3D Model

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Symbol & Footprint

Schematic Symbol

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Datasheet

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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32F072CBU6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)

STM32F072CBU6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup power supply 1.65 to 3.6 V for RTC and backup registers when VDD is not present
2	PC13	bidirectional	GPIO port C pin 13, 3.3 V tolerant with alternate functions WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT
3	PC14-OSC32_IN	bidirectional	GPIO port C pin 14 or 32 kHz oscillator input, 3.3 V tolerant
4	PC15-OSC32_OUT	bidirectional	GPIO port C pin 15 or 32 kHz oscillator output, 3.3 V tolerant
5	PF0-OSC_IN	bidirectional	GPIO port F pin 0 or main oscillator input, 5 V tolerant with alternate functions CRS_SYNC
6	PF1-OSC_OUT	bidirectional	GPIO port F pin 1 or main oscillator output, 5 V tolerant
7	NRST	bidirectional	Device reset input with embedded weak pull-up resistor, also functions as internal reset output (active low)
8	VSSA	power_in	Analog ground
9	VDDA	power_in	Analog power supply 2.4 to 3.6 V for ADC, DAC, and analog circuits
10	PA0	bidirectional	GPIO port A pin 0, 3.3 V tolerant ADC-connected (ADC_IN0) with alternate functions USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1, USART4_TX
11	PA1	bidirectional	GPIO port A pin 1, 3.3 V tolerant ADC-connected (ADC_IN1) with alternate functions USART2_RTS, TIM2_CH2, TIM15_CH1N, TSC_G1_IO2, USART4_RX, EVENTOUT
12	PA2	bidirectional	GPIO port A pin 2, 3.3 V tolerant ADC-connected (ADC_IN2) with alternate functions USART2_TX, COMP2_OUT, TIM2_CH3, TIM15_CH1, TSC_G1_IO3
13	PA3	bidirectional	GPIO port A pin 3, 3.3 V tolerant ADC-connected (ADC_IN3) with alternate functions USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4
14	PA4	bidirectional	GPIO port A pin 4, 3.3 V tolerant ADC-connected (ADC_IN4, DAC_OUT1) with alternate functions SPI1_NSS, I2S1_WS, TIM14_CH1, TSC_G2_IO1, USART2_CK
15	PA5	bidirectional	GPIO port A pin 5, 3.3 V tolerant ADC-connected (ADC_IN5, DAC_OUT2) with alternate functions SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2
16	PA6	bidirectional	GPIO port A pin 6, 3.3 V tolerant ADC-connected (ADC_IN6) with alternate functions SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3
17	PA7	bidirectional	GPIO port A pin 7, 3.3 V tolerant ADC-connected (ADC_IN7) with alternate functions SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4
18	PB0	bidirectional	GPIO port B pin 0, 3.3 V tolerant ADC-connected (ADC_IN8) with alternate functions TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT, USART3_CK
19	PB1	bidirectional	GPIO port B pin 1, 3.3 V tolerant ADC-connected (ADC_IN9) with alternate functions TIM3_CH4, USART3_RTS, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3
20	PB2	bidirectional	GPIO port B pin 2, 5 V tolerant with alternate function TSC_G3_IO4
21	PB10	bidirectional	GPIO port B pin 10, 5 V tolerant with alternate functions SPI2_SCK, I2C2_SCL, USART3_TX, CEC, TSC_SYNC, TIM2_CH3
22	PB11	bidirectional	GPIO port B pin 11, 5 V tolerant with alternate functions USART3_RX, TIM2_CH4, EVENTOUT, TSC_G6_IO1, I2C2_SDA
23	VSS	power_in	Ground
24	VDD	power_in	Digital power supply 2.0 to 3.6 V
25	PB12	bidirectional	GPIO port B pin 12, 5 V tolerant with alternate functions TIM1_BKIN, TIM15_BKIN, SPI2_NSS, I2S2_WS, USART3_CK, TSC_G6_IO2, EVENTOUT
26	PB13	bidirectional	GPIO port B pin 13, 5 V tolerant FM+ capable with alternate functions SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_CTS, TIM1_CH1N, TSC_G6_IO3
27	PB14	bidirectional	GPIO port B pin 14, 5 V tolerant FM+ capable with alternate functions SPI2_MISO, I2S2_MCK, I2C2_SDA, USART3_RTS, TIM1_CH2N, TIM15_CH1, TSC_G6_IO4
28	PB15	bidirectional	GPIO port B pin 15, 5 V tolerant with alternate functions SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM15_CH1N, TIM15_CH2 with wakeup WKUP7, RTC_REFIN
29	PA8	bidirectional	GPIO port A pin 8, 5 V tolerant VDDIO2-supplied with alternate functions USART1_CK, TIM1_CH1, EVENTOUT, MCO, CRS_SYNC
30	PA9	bidirectional	GPIO port A pin 9, 5 V tolerant VDDIO2-supplied with alternate functions USART1_TX, TIM1_CH2, TIM15_BKIN, TSC_G4_IO1
31	PA10	bidirectional	GPIO port A pin 10, 5 V tolerant VDDIO2-supplied with alternate functions USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2
32	PA11	bidirectional	GPIO port A pin 11, 5 V tolerant VDDIO2-supplied with alternate functions CAN_RX, USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT, USB_DM
33	PA12	bidirectional	GPIO port A pin 12, 5 V tolerant VDDIO2-supplied with alternate functions CAN_TX, USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT, USB_DP
34	PA13	bidirectional	GPIO port A pin 13 or SWDIO, 5 V tolerant VDDIO2-supplied with alternate functions IR_OUT, USB_NOE
35	VSS	power_in	Ground
36	VDDIO2	power_in	Digital power supply 1.65 to 3.6 V for VDDIO2 I/Os, independent from VDD and VDDA
37	PA14	bidirectional	GPIO port A pin 14 or SWCLK, 5 V tolerant VDDIO2-supplied with alternate function USART2_TX
38	PA15	bidirectional	GPIO port A pin 15, 5 V tolerant with alternate functions SPI1_NSS, I2S1_WS, USART2_RX, USART4_RTS, TIM2_CH1_ETR, EVENTOUT
39	PB3	bidirectional	GPIO port B pin 3, 5 V tolerant with alternate functions SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT
40	PB4	bidirectional	GPIO port B pin 4, 5 V tolerant with alternate functions SPI1_MISO, I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, EVENTOUT
41	PB5	bidirectional	GPIO port B pin 5, 5 V tolerant with alternate functions SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2 with wakeup WKUP6
42	PB6	bidirectional	GPIO port B pin 6, 5 V tolerant FM+ capable with alternate functions I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3
43	PB7	bidirectional	GPIO port B pin 7, 5 V tolerant FM+ capable with alternate functions I2C1_SDA, USART1_RX, USART4_CTS, TIM17_CH1N, TSC_G5_IO4
44	BOOT0	input	Boot memory selection pin determining whether device boots from flash memory or system memory
45	PB8	bidirectional	GPIO port B pin 8, 5 V tolerant FM+ capable with alternate functions I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC, CAN_RX
46	PB9	bidirectional	GPIO port B pin 9, 5 V tolerant FM+ capable with alternate functions SPI2_NSS, I2S2_WS, I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT, CAN_TX
47	VSS	power_in	Ground
48	VDD	power_in	Digital power supply 2.0 to 3.6 V
49	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	UFQFPN-48(7x7)
Category	Embedded Processors & Controllers
Pins	49

CAD (KiCad official)

Symbol: STM32F072CBU6
Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
3D model files: stm32f072cbu6-etched.step / stm32f072cbu6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f072cbu6.step / stm32f072cbu6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (127 pp, sha256 10dab1a5e0d68379, retrieved 2026-10-03, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF