component
STM32F071CBT6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F071CBT6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32F071CBT6TR from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup power supply (1.65 V to 3.6 V) for RTC, external 32 kHz oscillator and backup registers when VDD is not present. |
| 2 | PC13 | bidirectional | General-purpose I/O (TC, 5V not tolerant standard) supplied through the RTC power switch (limited to 3 mA sink, ≤2 MHz output, ≤30 pF load); after first RTC domain power-up also provides WKUP2, RTC_TAMP1, RTC_TS and RTC_OUT functions. |
| 3 | PC14-OSC32_IN | bidirectional | GPIO (PC14, TC) supplied through the RTC power switch, or LSE 32.768 kHz crystal oscillator input (OSC32_IN). |
| 4 | PC15-OSC32_OUT | bidirectional | GPIO (PC15, TC) supplied through the RTC power switch, or LSE 32.768 kHz crystal oscillator output (OSC32_OUT). |
| 5 | PF0-OSC_IN | bidirectional | 5V-tolerant GPIO (PF0) or HSE 4-32 MHz crystal/resonator oscillator input (OSC_IN); alternate function CRS_SYNC. |
| 6 | PF1-OSC_OUT | bidirectional | 5V-tolerant GPIO (PF1) or HSE crystal/resonator oscillator output (OSC_OUT). |
| 7 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor (RPU typ. 40 kΩ): device reset input / internal reset output, active low. |
| 8 | VSSA | power_in | Analog ground reference for ADC, DAC, comparators and clock/PLL analog blocks. |
| 9 | VDDA | power_in | External analog power supply for ADC, DAC, reset block, RC oscillators and PLL; must be ≥VDD, range VDD to 3.6 V (2.4 V to 3.6 V minimum when ADC or DAC is used). |
| 10 | PA0 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions USART2_CTS, TIM2_CH1_ETR, TSC_G1_IO1, USART4_TX; additional functions RTC_TAMP2, WKUP1, COMP1_OUT, ADC_IN0, COMP1_INM6. |
| 11 | PA1 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions USART2_RTS, TIM2_CH2, TIM15_CH1N, TSC_G1_IO2, USART4_RX, EVENTOUT; additional functions ADC_IN1, COMP1_INP. |
| 12 | PA2 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions USART2_TX, TIM2_CH3, TIM15_CH1, TSC_G1_IO3; additional functions ADC_IN2, COMP2_OUT, COMP2_INM6, WKUP4. |
| 13 | PA3 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4; additional functions ADC_IN3, COMP2_INP. |
| 14 | PA4 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions SPI1_NSS/I2S1_WS, USART2_CK, TSC_G2_IO1, TIM14_CH1; additional functions COMP1_INM4, COMP2_INM4, ADC_IN4, DAC_OUT1. |
| 15 | PA5 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2; additional functions COMP1_INM5, COMP2_INM5, ADC_IN5, DAC_OUT2. |
| 16 | PA6 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT, USART3_CTS; additional function ADC_IN6. |
| 17 | PA7 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT; additional function ADC_IN7. |
| 18 | PB0 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT, USART3_CK; additional function ADC_IN8. |
| 19 | PB1 | bidirectional | 3.3V ADC-capable I/O (TTa): alternate functions TIM3_CH4, USART3_RTS, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3; additional function ADC_IN9. |
| 20 | PB2 | bidirectional | 5V-tolerant GPIO (FT) with alternate function TSC_G3_IO4. |
| 21 | PB10 | bidirectional | 5V-tolerant GPIO (FT): alternate functions SPI2_SCK/I2S2_CK, I2C2_SCL, USART3_TX, CEC, TSC_SYNC, TIM2_CH3. |
| 22 | PB11 | bidirectional | 5V-tolerant GPIO (FT): alternate functions USART3_RX, TIM2_CH4, EVENTOUT, TSC_G6_IO1, I2C2_SDA. |
| 23 | VSS | power_in | Digital ground. |
| 24 | VDD | power_in | Digital power supply, VDD = 2.0 V to 3.6 V for I/Os and internal regulator. |
| 25 | PB12 | bidirectional | 5V-tolerant GPIO (FT): alternate functions TIM1_BKIN, TIM15_BKIN, SPI2_NSS/I2S2_WS, USART3_CK, TSC_G6_IO2, EVENTOUT. |
| 26 | PB13 | bidirectional | 5V-tolerant Fast-mode-Plus-capable GPIO (FTf): alternate functions SPI2_SCK/I2S2_CK, I2C2_SCL, USART3_CTS, TIM1_CH1N, TSC_G6_IO3. |
| 27 | PB14 | bidirectional | 5V-tolerant Fast-mode-Plus-capable GPIO (FTf): alternate functions SPI2_MISO/I2S2_MCK, I2C2_SDA, USART3_RTS, TIM1_CH2N, TIM15_CH1, TSC_G6_IO4. |
| 28 | PB15 | bidirectional | 5V-tolerant GPIO (FT): alternate functions SPI2_MOSI/I2S2_SD, TIM1_CH3N, TIM15_CH1N, TIM15_CH2; additional functions WKUP7, RTC_REFIN. |
| 29 | PA8 | bidirectional | 5V-tolerant GPIO (FT) supplied from VDDIO2: alternate functions MCO, USART1_CK, TIM1_CH1, EVENTOUT, CRS_SYNC. |
| 30 | PA9 | bidirectional | 5V-tolerant GPIO (FT) supplied from VDDIO2: alternate functions TIM15_BKIN, USART1_TX, TIM1_CH2, TSC_G4_IO1. |
| 31 | PA10 | bidirectional | 5V-tolerant GPIO (FT) supplied from VDDIO2: alternate functions TIM17_BKIN, USART1_RX, TIM1_CH3, TSC_G4_IO2. |
| 32 | PA11 | bidirectional | 5V-tolerant GPIO (FT) supplied from VDDIO2: alternate functions EVENTOUT, USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3. |
| 33 | PA12 | bidirectional | 5V-tolerant GPIO (FT) supplied from VDDIO2: alternate functions EVENTOUT, USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4. |
| 34 | PA13 | bidirectional | 5V-tolerant GPIO (FT) supplied from VDDIO2; after reset configured as SWDIO alternate function with internal pull-up active; also IR_OUT alternate function. |
| 35 | VSS | power_in | Digital ground. |
| 36 | VDDIO2 | power_in | External I/O power supply, VDDIO2 = 1.65 V to 3.6 V, for marked (5V-tolerant, FT) I/Os; must not be supplied without a valid VDD supply. |
| 37 | PA14 | bidirectional | 5V-tolerant GPIO (FT) supplied from VDDIO2; after reset configured as SWCLK alternate function with internal pull-down active; also USART2_TX alternate function. |
| 38 | PA15 | bidirectional | 5V-tolerant GPIO (FT) supplied from VDDIO2: alternate functions SPI1_NSS/I2S1_WS, USART2_RX, USART4_RTS, TIM2_CH1_ETR, EVENTOUT. |
| 39 | PB3 | bidirectional | 5V-tolerant GPIO (FT): alternate functions SPI1_SCK/I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT. |
| 40 | PB4 | bidirectional | 5V-tolerant GPIO (FT): alternate functions SPI1_MISO/I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, EVENTOUT. |
| 41 | PB5 | bidirectional | 5V-tolerant GPIO (FT): alternate functions SPI1_MOSI/I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2; additional function WKUP6. |
| 42 | PB6 | bidirectional | 5V-tolerant Fast-mode-Plus-capable GPIO (FTf): alternate functions I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3. |
| 43 | PB7 | bidirectional | 5V-tolerant Fast-mode-Plus-capable GPIO (FTf): alternate functions I2C1_SDA, USART1_RX, USART4_CTS, TIM17_CH1N, TSC_G5_IO4. |
| 44 | BOOT0 | input | Dedicated boot memory selection input; input voltage range 0 to 5.5 V operating (0 to 9.0 V absolute maximum), sampled at reset to select boot from Flash, System memory or SRAM. |
| 45 | PB8 | bidirectional | 5V-tolerant Fast-mode-Plus-capable GPIO (FTf): alternate functions I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC. |
| 46 | PB9 | bidirectional | 5V-tolerant Fast-mode-Plus-capable GPIO (FTf): alternate functions SPI2_NSS/I2S2_WS, I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT. |
| 47 | VSS | power_in | Digital ground. |
| 48 | VDD | power_in | Digital power supply, VDD = 2.0 V to 3.6 V for I/Os and internal regulator. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32F071CBT6TR - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32f071cbt6tr-etched.step/stm32f071cbt6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f071cbt6tr.step/stm32f071cbt6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (122 pp, sha256
054f3806403d4305, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).