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STM32F051K8T6TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32F051K8T6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM32F051K8T6TR from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital power supply (2.0-3.6 V) for core logic and I/O drivers.
2 PF0-OSC_IN bidirectional 5V-tolerant input for external high-speed oscillator clock source (4-32 MHz) or bypass mode.
3 PF1-OSC_OUT bidirectional 5V-tolerant output for external high-speed oscillator.
4 NRST input Active-low reset input with embedded weak pull-up resistor (40 kΩ) and Schmitt-trigger input; provides internal reset output.
5 VDDA power_in Analog power supply voltage (2.4-3.6 V when ADC/DAC used; must be ≥ VDD).
6 PA0 bidirectional 3.3V-tolerant GPIO with ADC_IN0, supports USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1 alternate functions.
7 PA1 bidirectional 3.3V-tolerant GPIO with ADC_IN1, supports USART2_RTS, TIM2_CH2, TSC_G1_IO2 alternate functions.
8 PA2 bidirectional 3.3V-tolerant GPIO with ADC_IN2, supports USART2_TX, TIM2_CH3, TIM15_CH1, COMP2_OUT, TSC_G1_IO3 alternate functions.
9 PA3 bidirectional 3.3V-tolerant GPIO with ADC_IN3, supports USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4 alternate functions.
10 PA4 bidirectional 3.3V-tolerant GPIO with ADC_IN4 and DAC_OUT1, supports SPI1_NSS, USART2_CK, TIM14_CH1, TSC_G2_IO1 alternate functions.
11 PA5 bidirectional 3.3V-tolerant GPIO with ADC_IN5, supports SPI1_SCK, CEC, TIM2_CH1_ETR, TSC_G2_IO2 alternate functions.
12 PA6 bidirectional 3.3V-tolerant GPIO with ADC_IN6, supports SPI1_MISO, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3 alternate functions.
13 PA7 bidirectional 3.3V-tolerant GPIO with ADC_IN7, supports SPI1_MOSI, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4 alternate functions.
14 PB0 bidirectional 3.3V-tolerant GPIO with ADC_IN8, supports TIM3_CH3, TIM1_CH2N, TSC_G3_IO2 alternate functions.
15 PB1 bidirectional 3.3V-tolerant GPIO with ADC_IN9, supports TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3 alternate functions.
16 VSS power_in Ground reference for digital logic and analog circuitry.
17 VDD power_in Digital power supply (2.0-3.6 V) for core logic and I/O drivers.
18 PA8 bidirectional 5V-tolerant GPIO supporting USART1_CK, TIM1_CH1, MCO alternate functions.
19 PA9 bidirectional 5V-tolerant GPIO supporting USART1_TX, TIM1_CH2, TIM15_BKIN, TSC_G4_IO1 alternate functions.
20 PA10 bidirectional 5V-tolerant GPIO supporting USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2 alternate functions.
21 PA11 bidirectional 5V-tolerant GPIO supporting USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3 alternate functions.
22 PA12 bidirectional 5V-tolerant GPIO supporting USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4 alternate functions.
23 PA13 bidirectional 5V-tolerant GPIO with internal pull-up after reset, configured as SWDIO for serial-wire debug; supports IR_OUT alternate function.
24 PA14 bidirectional 5V-tolerant GPIO with internal pull-down after reset, configured as SWCLK for serial-wire debug; supports USART2_TX alternate function.
25 PA15 bidirectional 5V-tolerant GPIO supporting SPI1_NSS, USART2_RX, TIM2_CH1_ETR alternate functions.
26 PB3 bidirectional 5V-tolerant GPIO supporting SPI1_SCK, TIM2_CH2, TSC_G5_IO1 alternate functions.
27 PB4 bidirectional 5V-tolerant GPIO supporting SPI1_MISO, TIM3_CH1, TSC_G5_IO2 alternate functions.
28 PB5 bidirectional 5V-tolerant GPIO supporting SPI1_MOSI, TIM3_CH2, TIM16_BKIN, I2C1_SMBA alternate functions.
29 PB6 bidirectional Fast-Mode Plus (Fm+) I/O supporting I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3 alternate functions.
30 PB7 bidirectional Fast-Mode Plus (Fm+) I/O supporting I2C1_SDA, USART1_RX, TIM17_CH1N, TSC_G5_IO4 alternate functions.
31 BOOT0 input Dedicated boot selection pin (input voltage 0-5.5 V) for selecting boot memory at device startup.
32 VSS power_in Ground reference for digital logic and analog circuitry.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

CAD (KiCad official)

  • Symbol: STM32F051K8T6TR
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f051k8t6tr-etched.step / stm32f051k8t6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f051k8t6tr.step / stm32f051k8t6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (122 pp, sha256 80848a22804e56d8, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF