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STM32F051C8T7

STMicroelectronics · ST Microelectronics · LQFP-48(7x7)

STM32F051C8T7 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply for the RTC and backup registers.
2 PC13 bidirectional Standard 3.3 V I/O (TC) with RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2 functions; output use is limited by the power switch (3 mA sink, 2 MHz max at 30 pF).
3 PC14 bidirectional Standard 3.3 V I/O (TC) that doubles as the OSC32_IN 32 kHz oscillator input; output use is limited by the power switch (3 mA sink).
4 PC15 bidirectional Standard 3.3 V I/O (TC) that doubles as the OSC32_OUT 32 kHz oscillator output; output use is limited by the power switch (3 mA sink).
5 PF0 bidirectional 5 V-tolerant I/O (FT) that doubles as the OSC_IN high-speed oscillator input.
6 PF1 bidirectional 5 V-tolerant I/O (FT) that doubles as the OSC_OUT high-speed oscillator output.
7 NRST bidirectional Active-low bidirectional reset pin with embedded weak pull-up; device reset input and internal reset output.
8 VSSA power_in Analog ground; a distinct VSSA pin exists on 48-pin packages.
9 VDDA power_in Analog power supply, which may range from VDD up to 3.6 V.
10 PA0 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN0, WKUP1 and RTC_TAMP2 alternate functions.
11 PA1 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN1 and COMP1_INP functions.
12 PA2 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN2 and COMP2_INM6 functions.
13 PA3 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN3 and COMP2_INP functions.
14 PA4 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN4 and DAC_OUT1 functions.
15 PA5 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN5 and SPI1_SCK alternate function.
16 PA6 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN6 and SPI1_MISO alternate function.
17 PA7 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN7 and SPI1_MOSI alternate function.
18 PB0 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN8 and TSC_G3_IO2 functions.
19 PB1 bidirectional 3.3 V-tolerant I/O connected to the ADC, providing ADC_IN9 and TSC_G3_IO3 functions.
20 PB2 bidirectional 5 V-tolerant I/O (FT) with TSC_G3_IO4 alternate function.
21 PB10 bidirectional 5 V-tolerant I/O (FT) with I2C2_SCL, CEC, TIM2_CH3 and TSC_SYNC functions.
22 PB11 bidirectional 5 V-tolerant I/O (FT) with I2C2_SDA, TIM2_CH4, TSC_G6_IO1 and EVENTOUT functions.
23 VSS power_in Ground.
24 VDD power_in Digital power supply, 2.0 V to 3.6 V.
25 PB12 bidirectional 5 V-tolerant I/O (FT) with SPI2_NSS, TIM1_BKIN, TSC_G6_IO2 and EVENTOUT functions.
26 PB13 bidirectional 5 V-tolerant I/O (FT) with SPI2_SCK, TIM1_CH1N and TSC_G6_IO3 functions.
27 PB14 bidirectional 5 V-tolerant I/O (FT) with SPI2_MISO, TIM15_CH1, TIM1_CH2N and TSC_G6_IO4 functions.
28 PB15 bidirectional 5 V-tolerant I/O (FT) with SPI2_MOSI, TIM15_CH2, TIM1_CH3N and RTC_REFIN functions.
29 PA8 bidirectional 5 V-tolerant I/O (FT) with USART1_CK, TIM1_CH1, EVENTOUT and MCO functions.
30 PA9 bidirectional 5 V-tolerant I/O (FT) with USART1_TX, TIM1_CH2, TIM15_BKIN and TSC_G4_IO1 functions.
31 PA10 bidirectional 5 V-tolerant I/O (FT) with USART1_RX, TIM1_CH3, TIM17_BKIN and TSC_G4_IO2 functions.
32 PA11 bidirectional 5 V-tolerant I/O (FT) with USART1_CTS, TIM1_CH4, COMP1_OUT and TSC_G4_IO3 functions.
33 PA12 bidirectional 5 V-tolerant I/O (FT) with USART1_RTS, TIM1_ETR, COMP2_OUT and TSC_G4_IO4 functions.
34 PA13 bidirectional 5 V-tolerant I/O (FT) that after reset is the SWDIO serial wire debug data pin with internal pull-up enabled; also IR_OUT.
35 PF6 bidirectional 5 V-tolerant I/O (FT) with I2C2_SCL alternate function.
36 PF7 bidirectional 5 V-tolerant I/O (FT) with I2C2_SDA alternate function.
37 PA14 bidirectional 5 V-tolerant I/O (FT) that after reset is the SWCLK serial wire debug clock pin with internal pull-down enabled; also USART2_TX.
38 PA15 bidirectional 5 V-tolerant I/O (FT) with SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR and EVENTOUT functions.
39 PB3 bidirectional 5 V-tolerant I/O (FT) with SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1 and EVENTOUT functions.
40 PB4 bidirectional 5 V-tolerant I/O (FT) with SPI1_MISO, I2S1_MCK, TIM3_CH1, TSC_G5_IO2 and EVENTOUT functions.
41 PB5 bidirectional 5 V-tolerant I/O (FT) with SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN and TIM3_CH2 functions.
42 PB6 bidirectional 5 V-tolerant I/O (FTf) with I2C1_SCL, USART1_TX, TIM16_CH1N and TSC_G5_IO3 functions; FM+ capable.
43 PB7 bidirectional 5 V-tolerant I/O (FTf) with I2C1_SDA, USART1_RX, TIM17_CH1N and TSC_G5_IO4 functions; FM+ capable.
44 BOOT0 input Dedicated BOOT0 pin used for boot memory selection.
45 PB8 bidirectional 5 V-tolerant I/O (FTf) with I2C1_SCL, CEC, TIM16_CH1 and TSC_SYNC functions; FM+ capable.
46 PB9 bidirectional 5 V-tolerant I/O (FTf) with I2C1_SDA, IR_OUT, TIM17_CH1 and EVENTOUT functions; FM+ capable with 20 mA current sink.
47 VSS power_in Ground.
48 VDD power_in Digital power supply, 2.0 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32F051C8T7
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f051c8t7-etched.step / stm32f051c8t7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f051c8t7.step / stm32f051c8t7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (122 pp, sha256 80848a22804e56d8, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF