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STM32F051C6T6TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32F051C6T6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32F051C6T6TR from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply for the RTC and backup registers.
2 PC13 bidirectional Standard 3.3 V I/O (TC) supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz at 30 pF maximum load and it must not be used as a current source; additional functions RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2.
3 PC14/OSC32_IN bidirectional Standard 3.3 V I/O (TC) with the same power-switch limits as PC13 (3 mA, 2 MHz at 30 pF maximum, no current sourcing), also used as OSC32_IN for the 32 kHz oscillator.
4 PC15/OSC32_OUT bidirectional Standard 3.3 V I/O (TC) with the same power-switch limits as PC13 (3 mA, 2 MHz at 30 pF maximum, no current sourcing), also used as OSC32_OUT for the 32 kHz oscillator.
5 PF0/OSC_IN bidirectional 5 V tolerant I/O (FT) that also serves as the OSC_IN high-speed crystal oscillator input.
6 PF1/OSC_OUT bidirectional 5 V tolerant I/O (FT) that also serves as the OSC_OUT high-speed crystal oscillator output.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor; device reset input and internal reset output, active low.
8 VSSA power_in Analog ground.
9 VDDA power_in Analog power supply, separately supplied from 2.4 V up to 3.6 V for the ADC.
10 PA0 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN0); also TIM2_CH1_ETR, USART1_CTS (standard dies only), RTC_TAMP2 and WKUP1.
11 PA1 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN1); also TIM2_CH2, EVENTOUT and USART1_RTS (standard dies only).
12 PA2 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN2); also TIM2_CH3 and USART1_TX (standard dies only).
13 PA3 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN3); also TIM2_CH4 and USART1_RX (standard dies only).
14 PA4 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN4); also SPI1_NSS/I2S1_WS, TIM14_CH1 and USART1_CK (standard dies only).
15 PA5 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN5); also SPI1_SCK/I2S1_CK and TIM2_CH1_ETR.
16 PA6 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN6); also SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1 and EVENTOUT.
17 PA7 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN7); also SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1 and EVENTOUT.
18 PB0 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN8); also TIM3_CH3, TIM1_CH2N and EVENTOUT.
19 PB1 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC (ADC_IN9); also TIM3_CH4, TIM14_CH1 and TIM1_CH3N.
20 PB2 bidirectional 5 V tolerant general-purpose I/O (FT); no alternate function is listed for this pin in the pin definitions or alternate function tables.
21 PB10 bidirectional 5 V tolerant FM+ capable I/O (FTf) with TIM2_CH3 and I2C1_SCL (standard dies only).
22 PB11 bidirectional 5 V tolerant FM+ capable I/O (FTf) with TIM2_CH4, EVENTOUT and I2C1_SDA (standard dies only).
23 VSS power_in Ground.
24 VDD power_in Digital power supply; the device voltage range is 2.0 V to 3.6 V.
25 PB12 bidirectional 5 V tolerant I/O (FT) with TIM1_BKIN, EVENTOUT and SPI1_NSS (standard dies only).
26 PB13 bidirectional 5 V tolerant I/O (FT) with TIM1_CH1N and SPI1_SCK (standard dies only).
27 PB14 bidirectional 5 V tolerant I/O (FT) with TIM1_CH2N and SPI1_MISO (standard dies only).
28 PB15 bidirectional 5 V tolerant I/O (FT) with TIM1_CH3N, SPI1_MOSI (standard dies only) and RTC_REFIN.
29 PA8 bidirectional 5 V tolerant I/O (FT) with USART1_CK, TIM1_CH1, EVENTOUT and MCO.
30 PA9 bidirectional 5 V tolerant FM+ capable I/O (FTf) with USART1_TX, TIM1_CH2 and I2C1_SCL (standard dies only).
31 PA10 bidirectional 5 V tolerant FM+ capable I/O (FTf) with USART1_RX, TIM1_CH3, TIM17_BKIN and I2C1_SDA (standard dies only).
32 PA11 bidirectional 5 V tolerant I/O (FT) with USART1_CTS, TIM1_CH4 and EVENTOUT.
33 PA12 bidirectional 5 V tolerant I/O (FT) with USART1_RTS, TIM1_ETR and EVENTOUT.
34 PA13 bidirectional 5 V tolerant I/O (FT) that after reset is configured as the SWDAT serial wire data line with internal pull-up enabled; also IR_OUT.
35 PF6 bidirectional 5 V tolerant FM+ capable I/O (FTf) with I2C1_SCL (standard dies only).
36 PF7 bidirectional 5 V tolerant FM+ capable I/O (FTf) with I2C1_SDA (standard dies only).
37 PA14 bidirectional 5 V tolerant I/O (FT) that after reset is configured as the SWCLK serial wire clock with internal pull-down enabled; also USART1_TX (standard dies only).
38 PA15 bidirectional 5 V tolerant I/O (FT) with SPI1_NSS/I2S1_WS, TIM2_CH1_ETR, EVENTOUT and USART1_RX (standard dies only).
39 PB3 bidirectional 5 V tolerant I/O (FT) with SPI1_SCK/I2S1_CK, TIM2_CH2 and EVENTOUT.
40 PB4 bidirectional 5 V tolerant I/O (FT) with SPI1_MISO/I2S1_MCK, TIM3_CH1 and EVENTOUT.
41 PB5 bidirectional 5 V tolerant I/O (FT) with SPI1_MOSI/I2S1_SD, I2C1_SMBA, TIM16_BKIN and TIM3_CH2.
42 PB6 bidirectional 5 V tolerant FM+ capable I/O (FTf) with I2C1_SCL, USART1_TX and TIM16_CH1N.
43 PB7 bidirectional 5 V tolerant FM+ capable I/O (FTf) with I2C1_SDA, USART1_RX and TIM17_CH1N.
44 BOOT0 input Dedicated BOOT0 pin used for boot memory selection.
45 PB8 bidirectional 5 V tolerant FM+ capable I/O (FTf) with I2C1_SCL and TIM16_CH1.
46 PB9 bidirectional 5 V tolerant FM+ capable I/O (FTf) with I2C1_SDA, IR_OUT, TIM17_CH1 and EVENTOUT.
47 VSS power_in Ground.
48 VDD power_in Digital power supply; the device voltage range is 2.0 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32F051C6T6TR
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f051c6t6tr-etched.step / stm32f051c6t6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f051c6t6tr.step / stm32f051c6t6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (97 pp, sha256 b6bb8d8f1261ed9e, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF