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STM32F042F4P6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F042F4P6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STM32F042F4P6 from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB8 | bidirectional | 5V-tolerant FM+-capable (FTf) I/O; doubles as BOOT0 boot-memory-selection input; alternate functions I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC, CAN_RX. |
| 2 | PF0-OSC_IN | bidirectional | 5V-tolerant FM+-capable (FTf) I/O; default GPIO PF0 after reset; additional function OSC_IN (HSE crystal input, 4-32 MHz); alternate functions CRS_SYNC (AF0), I2C1_SDA (AF1). |
| 3 | PF1-OSC_OUT | bidirectional | 5V-tolerant FM+-capable (FTf) I/O; default GPIO PF1 after reset; additional function OSC_OUT (HSE crystal output); alternate function I2C1_SCL (AF1). |
| 4 | NRST | input | Active-low device reset input / internal reset output with embedded 25-55 kΩ pull-up resistor; input pulses shorter than 100 ns are filtered and not recognised as reset. |
| 5 | VDDA | power_in | Analog power supply 2.0-3.6 V (minimum 2.4 V when ADC is used); must be ≥ VDD; powers ADC, internal oscillators, PLL, and voltage reference. |
| 6 | PA0 | bidirectional | 3.3V-tolerant (TTa) analog-capable I/O; alternate functions USART2_CTS, TIM2_CH1_ETR, TSC_G1_IO1; additional functions WKUP1, RTC_TAMP2, ADC_IN0. |
| 7 | PA1 | bidirectional | 3.3V-tolerant (TTa) analog-capable I/O; input range 0 V to VDDA; alternate functions USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT; additional function ADC_IN1. |
| 8 | PA2 | bidirectional | 3.3V-tolerant (TTa) analog-capable I/O; alternate functions USART2_TX, TIM2_CH3, TSC_G1_IO3; additional functions ADC_IN2, WKUP4. |
| 9 | PA3 | bidirectional | 3.3V-tolerant (TTa) analog-capable I/O; alternate functions USART2_RX, TIM2_CH4, TSC_G1_IO4; additional function ADC_IN3. |
| 10 | PA4 | bidirectional | 3.3V-tolerant (TTa) analog-capable I/O; alternate functions SPI1_NSS/I2S1_WS, TIM14_CH1, TSC_G2_IO1, USART2_CK; additional functions USB_NOE, ADC_IN4. |
| 11 | PA5 | bidirectional | 3.3V-tolerant (TTa) analog-capable I/O; alternate functions SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2; additional function ADC_IN5. |
| 12 | PA6 | bidirectional | 3.3V-tolerant (TTa) analog-capable I/O; alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, TSC_G2_IO3, EVENTOUT; additional function ADC_IN6. |
| 13 | PA7 | bidirectional | 3.3V-tolerant (TTa) analog-capable I/O; alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, TSC_G2_IO4, EVENTOUT; additional function ADC_IN7. |
| 14 | PB1 | bidirectional | 3.3V-tolerant (TTa) analog-capable I/O; alternate functions TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3; additional function ADC_IN9. |
| 15 | VSSA | power_in | |
| 16 | VDD | power_in | 2.0-3.6 V main digital power supply; on TSSOP20 both VDD and VDDIO2 table entries map to this single pin, so VDDIO2-supplied I/Os (PA9, PA10, PA13, PA14) are also powered from here. |
| 17 | PA9 | bidirectional | 5V-tolerant FM+-capable (FTf) I/O supplied by VDDIO2; default PA9 (USART1_TX, TIM1_CH2, TSC_G4_IO1, I2C1_SCL); remappable to PA11 (CAN_RX, USART1_CTS, TIM1_CH4, USB_DM) via SYSCFG_CFGR1. |
| 18 | PA10 | bidirectional | 5V-tolerant FM+-capable (FTf) I/O supplied by VDDIO2; default PA10 (USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2, I2C1_SDA); remappable to PA12 (CAN_TX, USART1_RTS, TIM1_ETR, USB_DP) via SYSCFG_CFGR1. |
| 19 | PA13 | bidirectional | 5V-tolerant (FT) I/O supplied by VDDIO2; configured as SWDIO (internal pull-up activated) after reset; alternate functions IR_OUT (AF1), USB_NOE (AF2). |
| 20 | PA14 | bidirectional | 5V-tolerant (FT) I/O supplied by VDDIO2; configured as SWCLK (internal pull-down activated) after reset; alternate function USART2_TX (AF1). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
STM32F042F4P6 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
stm32f042f4p6-etched.step/stm32f042f4p6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f042f4p6.step/stm32f042f4p6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (117 pp, sha256
7af7ec8f5a596b23, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).