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STM32F042C6U7

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)

STM32F042C6U7 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply for the RTC, the 32 kHz oscillator and backup registers when VDD is not present, specified 1.65 to 3.6 V.
2 PC13 bidirectional Standard 3.3 V I/O (TC) supplied through the power switch, which sinks at most 3 mA so output use is limited to 2 MHz with 30 pF and it must not drive LEDs; also WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT.
3 PC14-OSC32_IN bidirectional Standard 3.3 V I/O (TC) supplied through the power switch with the same 3 mA limit as PC13; also OSC32_IN for the 32 kHz oscillator input.
4 PC15-OSC32_OUT bidirectional Standard 3.3 V I/O (TC) supplied through the power switch with the same 3 mA limit as PC13; also OSC32_OUT for the 32 kHz oscillator output.
5 PF0-OSC_IN bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions CRS_SYNC and I2C1_SDA; also OSC_IN for the high-speed crystal oscillator.
6 PF1-OSC_OUT bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate function I2C1_SCL; also OSC_OUT for the high-speed crystal oscillator.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up; active-low device reset input or internal reset output.
8 VSSA power_in Analog ground; a distinct VSSA pin exists only on 48-pin packages.
9 VDDA power_in Analog power supply for ADC, reset blocks, RCs and PLL; must be greater than or equal to VDD and 2.4 V minimum when the ADC is used, up to 3.6 V.
10 PA0 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions USART2_CTS, TIM2_CH1_ETR, TSC_G1_IO1; also RTC_TAMP2, WKUP1, ADC_IN0.
11 PA1 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT; also ADC_IN1.
12 PA2 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions USART2_TX, TIM2_CH3, TSC_G1_IO3; also ADC_IN2, WKUP4.
13 PA3 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions USART2_RX, TIM2_CH4, TSC_G1_IO4; also ADC_IN3.
14 PA4 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions SPI1_NSS, I2S1_WS, USART2_CK, USB_NOE, TIM14_CH1, TSC_G2_IO1; also ADC_IN4.
15 PA5 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2; also ADC_IN5.
16 PA6 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, TSC_G2_IO3, EVENTOUT; also ADC_IN6.
17 PA7 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, TSC_G2_IO4, EVENTOUT; also ADC_IN7.
18 PB0 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT; also ADC_IN8.
19 PB1 bidirectional 3.3 V-tolerant I/O directly connected to the ADC (TTa); alternate functions TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3; also ADC_IN9.
20 PB2 bidirectional 5 V-tolerant I/O (FT); alternate function TSC_G3_IO4.
21 PB10 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions SPI2_SCK, CEC, TSC_SYNC, TIM2_CH3, I2C1_SCL.
22 PB11 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions TIM2_CH4, EVENTOUT, I2C1_SDA.
23 VSS power_in Ground pin.
24 VDD power_in Digital power supply, 2.0 to 3.6 V for I/Os and the internal regulator.
25 PB12 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_BKIN, SPI2_NSS, EVENTOUT.
26 PB13 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions SPI2_SCK, TIM1_CH1N, I2C1_SCL.
27 PB14 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions SPI2_MISO, TIM1_CH2N, I2C1_SDA.
28 PB15 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI2_MOSI, TIM1_CH3N; also WKUP7, RTC_REFIN.
29 PA8 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2; alternate functions USART1_CK, TIM1_CH1, EVENTOUT, MCO, CRS_SYNC.
30 PA9 bidirectional 5 V-tolerant I/O with FM+ capability (FTf) supplied by VDDIO2; alternate functions USART1_TX, TIM1_CH2, TSC_G4_IO1, I2C1_SCL; can be remapped with PA11/PA12 via SYSCFG_CFGR1.
31 PA10 bidirectional 5 V-tolerant I/O with FM+ capability (FTf) supplied by VDDIO2; alternate functions USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2, I2C1_SDA; can be remapped with PA11/PA12 via SYSCFG_CFGR1.
32 PA11 bidirectional 5 V-tolerant I/O with FM+ capability (FTf) supplied by VDDIO2; alternate functions CAN_RX, USART1_CTS, TIM1_CH4, TSC_G4_IO3, EVENTOUT, I2C1_SCL; also USB_DM.
33 PA12 bidirectional 5 V-tolerant I/O with FM+ capability (FTf) supplied by VDDIO2; alternate functions CAN_TX, USART1_RTS, TIM1_ETR, TSC_G4_IO4, EVENTOUT, I2C1_SDA; also USB_DP.
34 PA13 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2; after reset it is SWDIO with internal pull-up enabled; also IR_OUT, USB_NOE.
35 VSS power_in Ground pin.
36 VDDIO2 power_in Digital power supply for the marked I/Os (PA8 to PA15), 1.65 to 3.6 V, independent of VDD but requires a valid VDD supply.
37 PA14 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2; after reset it is SWCLK with internal pull-down enabled; also USART2_TX.
38 PA15 bidirectional 5 V-tolerant I/O (FT) supplied by VDDIO2; alternate functions SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT, USB_NOE.
39 PB3 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT.
40 PB4 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI1_MISO, I2S1_MCK, TIM17_BKIN, TIM3_CH1, TSC_G5_IO2, EVENTOUT.
41 PB5 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2; also WKUP6.
42 PB6 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3.
43 PB7 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions I2C1_SDA, USART1_RX, TIM17_CH1N, TSC_G5_IO4.
44 PF11-BOOT0 bidirectional 5 V-tolerant I/O (FT) used as the boot memory selection pin BOOT0 at startup.
45 PB8 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC, CAN_RX.
46 PB9 bidirectional 5 V-tolerant I/O with FM+ capability (FTf); alternate functions SPI2_NSS, I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT, CAN_TX.
47 VSS power_in Ground pin.
48 VDD power_in Digital power supply, 2.0 to 3.6 V for I/Os and the internal regulator.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-48(7x7)
Category Embedded Processors & Controllers
Pins 49

CAD (KiCad official)

  • Symbol: STM32F042C6U7
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f042c6u7-etched.step / stm32f042c6u7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f042c6u7.step / stm32f042c6u7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (117 pp, sha256 7af7ec8f5a596b23, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF