# STM32F030R8T6TR

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F030R8T6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Complementary digital and I/O supply; the datasheet specifies VDD = 2.4 V to 3.6 V. |
| 2 | PC13 | bidirectional | Standard 3.3 V I/O supplied through the power switch, which sinks at most 3 mA, so output speed must not exceed 2 MHz with a 30 pF maximum load and it must not be used as a current source; additional functions RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2. |
| 3 | PC14 | bidirectional | Standard 3.3 V I/O supplied through the power switch with the same 3 mA limit, 2 MHz / 30 pF output speed limit and no current-source use; additional function OSC32_IN. |
| 4 | PC15 | bidirectional | Standard 3.3 V I/O supplied through the power switch with the same 3 mA limit, 2 MHz / 30 pF output speed limit and no current-source use; additional function OSC32_OUT. |
| 5 | PF0 | bidirectional | 5 V tolerant I/O; alternate function I2C1_SDA is marked for STM32F030xC devices only in Table 11, and additional function OSC_IN. |
| 6 | PF1 | bidirectional | 5 V tolerant I/O; alternate function I2C1_SCL is marked for STM32F030xC devices only in Table 11, and additional function OSC_OUT. |
| 7 | NRST | bidirectional | Active-low bidirectional reset pin with embedded weak pull-up, acting as device reset input and internal reset output. |
| 8 | PC0 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions EVENTOUT and USART6_TX (xC devices only), additional function ADC_IN10. |
| 9 | PC1 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions EVENTOUT and USART6_RX (xC devices only), additional function ADC_IN11. |
| 10 | PC2 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions SPI2_MISO and EVENTOUT, additional function ADC_IN12. |
| 11 | PC3 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions SPI2_MOSI and EVENTOUT, additional function ADC_IN13. |
| 12 | VSSA | power_in | Analog ground. |
| 13 | VDDA | power_in | Analog power supply; the datasheet specifies VDDA = VDD to 3.6 V. |
| 14 | PA0 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions USART1_CTS, USART2_CTS and USART4_TX, additional functions ADC_IN0, RTC_TAMP2, WKUP1. |
| 15 | PA1 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions USART1_RTS, USART2_RTS, EVENTOUT and USART4_RX, additional function ADC_IN1. |
| 16 | PA2 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions USART1_TX, USART2_TX and TIM15_CH1, additional functions ADC_IN2 and WKPU4. |
| 17 | PA3 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions USART1_RX, USART2_RX and TIM15_CH2, additional function ADC_IN3. |
| 18 | PF4 | bidirectional | 5 V tolerant I/O listed for STM32F030x4/6/8 devices only, with alternate function EVENTOUT. |
| 19 | PF5 | bidirectional | 5 V tolerant I/O listed for STM32F030x4/6/8 devices only, with alternate function EVENTOUT. |
| 20 | PA4 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions SPI1_NSS, USART1_CK, USART2_CK, TIM14_CH1 and USART6_TX, additional function ADC_IN4. |
| 21 | PA5 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions SPI1_SCK and USART6_RX, additional function ADC_IN5. |
| 22 | PA6 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions SPI1_MISO, TIM3_CH1, TIM1_BKIN, TIM16_CH1, EVENTOUT and USART3_CTS, additional function ADC_IN6. |
| 23 | PA7 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions SPI1_MOSI, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1 and EVENTOUT, additional function ADC_IN7. |
| 24 | PC4 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions EVENTOUT and USART3_TX, additional function ADC_IN14. |
| 25 | PC5 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate function USART3_RX, additional functions ADC_IN15 and WKPU5. |
| 26 | PB0 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions TIM3_CH3, TIM1_CH2N, EVENTOUT and USART3_CK, additional function ADC_IN8. |
| 27 | PB1 | bidirectional | 3.3 V tolerant I/O directly connected to the ADC; alternate functions TIM3_CH4, TIM14_CH1, TIM1_CH3N and USART3_RTS, additional function ADC_IN9. |
| 28 | PB2 | bidirectional | 5 V tolerant I/O (FT) with no alternate functions listed in Table 13; on LQFP32 this pin is unconnected, but on LQFP64 it is a regular I/O. |
| 29 | PB10 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_SCK, I2C1_SCL, I2C2_SCL and USART3_TX, with the I2C and SPI entries variant-specific per Table 11. |
| 30 | PB11 | bidirectional | 5 V tolerant I/O; alternate functions I2C1_SDA, I2C2_SDA, EVENTOUT and USART3_RX, with the I2C entries variant-specific per Table 11. |
| 31 | VSS | power_in | Ground. |
| 32 | VDD | power_in | Digital power supply; the datasheet specifies VDD = 2.4 V to 3.6 V. |
| 33 | PB12 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_NSS, SPI2_NSS, TIM1_BKIN, EVENTOUT and USART3_CK, with the SPI entries variant-specific per Table 11. |
| 34 | PB13 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_SCK, SPI2_SCK, I2C2_SCL, TIM1_CH1N and USART3_CTS, with the SPI and I2C entries variant-specific per Table 11. |
| 35 | PB14 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_MISO, SPI2_MISO, I2C2_SDA, TIM1_CH2N, TIM15_CH1 and USART3_RTS, with variant-specific entries per Table 11. |
| 36 | PB15 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_MOSI, SPI2_MOSI, TIM1_CH3N, TIM15_CH1N and TIM15_CH2 (variant-specific), additional functions RTC_REFIN and WKPU7. |
| 37 | PC6 | bidirectional | 5 V tolerant I/O with alternate function TIM3_CH1. |
| 38 | PC7 | bidirectional | 5 V tolerant I/O with alternate function TIM3_CH2. |
| 39 | PC8 | bidirectional | 5 V tolerant I/O with alternate function TIM3_CH3. |
| 40 | PC9 | bidirectional | 5 V tolerant I/O with alternate function TIM3_CH4. |
| 41 | PA8 | bidirectional | 5 V tolerant I/O; alternate functions USART1_CK, TIM1_CH1, EVENTOUT and MCO. |
| 42 | PA9 | bidirectional | 5 V tolerant I/O; alternate functions USART1_TX, TIM1_CH2, TIM15_BKIN and I2C1_SCL, with TIM15 and I2C entries variant-specific per Table 11. |
| 43 | PA10 | bidirectional | 5 V tolerant I/O; alternate functions USART1_RX, TIM1_CH3, TIM17_BKIN and I2C1_SDA, with the I2C entry variant-specific per Table 11. |
| 44 | PA11 | bidirectional | 5 V tolerant I/O; alternate functions USART1_CTS, TIM1_CH4, EVENTOUT and I2C2_SCL, with the I2C2 entry variant-specific per Table 11. |
| 45 | PA12 | bidirectional | 5 V tolerant I/O; alternate functions USART1_RTS, TIM1_ETR, EVENTOUT and I2C2_SDA, with the I2C2 entry variant-specific per Table 11. |
| 46 | PA13 | bidirectional | 5 V tolerant I/O that after reset is configured as SWDIO with an internal pull-up enabled; alternate function IR_OUT. |
| 47 | PF6 | bidirectional | 5 V tolerant I/O listed for STM32F030x4/6/8 devices only, with alternate functions I2C1_SCL and I2C2_SCL. |
| 48 | PF7 | bidirectional | 5 V tolerant I/O listed for STM32F030x4/6/8 devices only, with alternate functions I2C1_SDA and I2C2_SDA. |
| 49 | PA14 | bidirectional | 5 V tolerant I/O that after reset is configured as SWCLK with an internal pull-down enabled; alternate functions USART1_TX, USART2_TX and SWCLK, with the USART entries variant-specific per Table 11. |
| 50 | PA15 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_NSS, USART1_RX, USART2_RX, USART4_RTS and EVENTOUT, with the USART entries variant-specific per Table 11. |
| 51 | PC10 | bidirectional | 5 V tolerant I/O; alternate functions USART3_TX and USART4_TX, listed for STM32F030xC devices only. |
| 52 | PC11 | bidirectional | 5 V tolerant I/O; alternate functions USART3_RX and USART4_RX, listed for STM32F030xC devices only. |
| 53 | PC12 | bidirectional | 5 V tolerant I/O; alternate functions USART3_CK, USART4_CK and USART5_TX, listed for STM32F030xC devices only. |
| 54 | PD2 | bidirectional | 5 V tolerant I/O; alternate functions TIM3_ETR, USART3_RTS and USART5_RX, with the USART entries listed for STM32F030xC devices only. |
| 55 | PB3 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_SCK, EVENTOUT and USART5_TX, with USART5_TX listed for STM32F030xC devices only. |
| 56 | PB4 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_MISO, TIM3_CH1, EVENTOUT, TIM17_BKIN and USART5_RX, with the TIM17_BKIN and USART5_RX entries listed for STM32F030xC devices only. |
| 57 | PB5 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_MOSI, I2C1_SMBA, TIM16_BKIN, TIM3_CH2 and USART5_CK_RTS, with USART5_CK_RTS listed for STM32F030xC devices only, additional function WKPU6. |
| 58 | PB6 | bidirectional | 5 V tolerant I/O with FM+ capability; alternate functions I2C1_SCL, USART1_TX and TIM16_CH1N. |
| 59 | PB7 | bidirectional | 5 V tolerant I/O with FM+ capability; alternate functions I2C1_SDA, USART1_RX, TIM17_CH1N and USART4_CTS (xC devices only). |
| 60 | BOOT0 | input | Dedicated BOOT0 pin used for boot memory selection. |
| 61 | PB8 | bidirectional | 5 V tolerant I/O with FM+ capability; alternate functions I2C1_SCL and TIM16_CH1 (the pin is unconnected on LQFP32 but is a regular I/O on LQFP64). |
| 62 | PB9 | bidirectional | 5 V tolerant I/O with FM+ capability; alternate functions I2C1_SDA, IR_OUT, TIM17_CH1 and EVENTOUT, with SPI2_NSS listed for STM32F030xC devices only. |
| 63 | VSS | power_in | Ground. |
| 64 | VDD | power_in | Digital power supply; the datasheet specifies VDD = 2.4 V to 3.6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `STM32F030R8T6TR`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `stm32f030r8t6tr-etched.step` / `stm32f030r8t6tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f030r8t6tr.step` / `stm32f030r8t6tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586184053611094016) (91 pp, sha256 `faac9340687f6951`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f030r8t6tr-datasheet.pdf)