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STM32F030C8T6TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f030c8t6trfactory-2.0.0extractor-text
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Symbol & Footprint

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Datasheet

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Contents

README

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STM32F030C8T6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32F030C8T6TR from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Complementary power supply input; 2.4 to 3.6 V.
2 PC13 bidirectional Port C bit 13, 3.3 V I/O with limited output current for RTC alternate functions (TAMP1, TS, OUT) or GPIO.
3 PC14-OSC32_IN bidirectional Port C bit 14 configured as 32.768 kHz crystal oscillator input or standard 3.3 V GPIO.
4 PC15-OSC32_OUT bidirectional Port C bit 15 configured as 32.768 kHz crystal oscillator output or standard 3.3 V GPIO.
5 PF0-OSC_IN bidirectional Port F bit 0 for main crystal oscillator input (4-32 MHz) or 5V tolerant GPIO with I2C1_SDA alternate.
6 PF1-OSC_OUT bidirectional Port F bit 1 for main crystal oscillator output or 5V tolerant GPIO with I2C1_SCL alternate.
7 NRST bidirectional Device reset input with embedded weak pull-up resistor (25-55 kΩ); active low.
8 VSSA power_in Analog ground reference pin (0 V).
9 VDDA power_in Analog power supply for ADC, reference voltage, RC oscillators, and PLL; 2.4 to 3.6 V, must be ≥ VDD.
10 PA0 bidirectional Port A bit 0, 3.3 V ADC input (ADC_IN0) or GPIO supporting USART flow control and RTC wake-up functions.
11 PA1 bidirectional Port A bit 1, 3.3 V ADC input (ADC_IN1) or GPIO supporting USART flow control and timer alternate functions.
12 PA2 bidirectional Port A bit 2, 3.3 V ADC input (ADC_IN2) or GPIO supporting USART1/2 TX and TIM15 PWM output.
13 PA3 bidirectional Port A bit 3, 3.3 V ADC input (ADC_IN3) or GPIO supporting USART1/2 RX and TIM15 PWM output.
14 PA4 bidirectional Port A bit 4, 3.3 V ADC input (ADC_IN4) or GPIO supporting SPI1_NSS, USART clock, and TIM14_CH1.
15 PA5 bidirectional Port A bit 5, 3.3 V ADC input (ADC_IN5) or GPIO supporting SPI1 clock output.
16 PA6 bidirectional Port A bit 6, 3.3 V ADC input (ADC_IN6) or GPIO supporting SPI1 MISO and multiple timer channels (TIM3_CH1, TIM1_BKIN, TIM16_CH1).
17 PA7 bidirectional Port A bit 7, 3.3 V ADC input (ADC_IN7) or GPIO supporting SPI1 MOSI and PWM outputs from TIM3, TIM14, TIM1, TIM17.
18 PB0 bidirectional Port B bit 0, 3.3 V ADC input (ADC_IN8) or GPIO supporting TIM3_CH3, TIM1_CH2N, and USART3_CK.
19 PB1 bidirectional Port B bit 1, 3.3 V ADC input (ADC_IN9) or GPIO supporting TIM3_CH4, TIM14_CH1, TIM1_CH3N, and USART3_RTS.
20 PB2 bidirectional Port B bit 2, 5V tolerant GPIO for general-purpose I/O; unconnected on LQFP32 package.
21 PB10 bidirectional Port B bit 10, 5V tolerant GPIO supporting SPI2_SCK, I2C1/2 clock, and USART3_TX alternate functions.
22 PB11 bidirectional Port B bit 11, 5V tolerant GPIO supporting I2C1/2 data and USART3 alternate functions.
23 VSS power_in Digital ground reference pin (0 V).
24 VDD power_in Digital power supply input; 2.4 to 3.6 V.
25 PB12 bidirectional Port B bit 12, 5V tolerant GPIO supporting SPI1/2 NSS, TIM1_BKIN, and USART3_CK.
26 PB13 bidirectional Port B bit 13, 5V tolerant GPIO supporting SPI1/2 clock, I2C2_SDA, and TIM1_CH1N.
27 PB14 bidirectional Port B bit 14, 5V tolerant GPIO supporting SPI1/2 MISO, I2C2 data, and TIM1/TIM15 channels.
28 PB15 bidirectional Port B bit 15, 5V tolerant GPIO supporting SPI1/2 MOSI, multiple timer channels, and RTC reference input.
29 PA8 bidirectional Port A bit 8, 5V tolerant GPIO supporting USART1_CK, TIM1_CH1, and master clock output (MCO).
30 PA9 bidirectional Port A bit 9, 5V tolerant GPIO supporting USART1_TX, TIM1_CH2, TIM15_BKIN, and I2C1_SCL alternate.
31 PA10 bidirectional Port A bit 10, 5V tolerant GPIO supporting USART1_RX, TIM1_CH3, TIM17_BKIN, and I2C1_SDA alternate.
32 PA11 bidirectional Port A bit 11, 5V tolerant GPIO supporting USART1_CTS, TIM1_CH4, and I2C2_SCL alternate function.
33 PA12 bidirectional Port A bit 12, 5V tolerant GPIO supporting USART1_RTS, TIM1_ETR, and I2C2_SDA alternate function.
34 PA13 (SWDIO) bidirectional Port A bit 13 configured as serial wire debug data I/O with embedded pull-up; IR_OUT alternate function.
35 PF6 bidirectional Port F bit 6, 5V tolerant GPIO supporting I2C1_SCL and I2C2_SCL alternate functions.
36 PF7 bidirectional Port F bit 7, 5V tolerant GPIO supporting I2C1_SDA and I2C2_SDA alternate functions.
37 PA14 (SWCLK) bidirectional Port A bit 14 configured as serial wire debug clock output with embedded pull-down; USART alternate.
38 PA15 bidirectional Port A bit 15, 5V tolerant GPIO supporting SPI1_NSS, USART1/2 receive, USART4_RTS, and event output.
39 PB3 bidirectional Port B bit 3, 5V tolerant GPIO supporting SPI1_SCK and USART5_TX alternate function.
40 PB4 bidirectional Port B bit 4, 5V tolerant GPIO supporting SPI1_MISO, TIM3_CH1, TIM17_BKIN, and USART5_RX.
41 PB5 bidirectional Port B bit 5, 5V tolerant GPIO supporting SPI1_MOSI, I2C1_SMBA, TIM16_BKIN, and timer functions.
42 PB6 (FTf) bidirectional Port B bit 6 with FM+ capability, 5V tolerant GPIO supporting I2C1_SCL, USART1_TX, and TIM16_CH1N.
43 PB7 (FTf) bidirectional Port B bit 7 with FM+ capability, 5V tolerant GPIO supporting I2C1_SDA, USART1_RX, and timer functions.
44 BOOT0 input Boot selection pin determining boot mode at power-up; high selects system memory, low selects user Flash.
45 PB8 (FTf) bidirectional Port B bit 8 with FM+ capability, 5V tolerant GPIO supporting I2C1_SCL and TIM16_CH1.
46 PB9 (FTf) bidirectional Port B bit 9 with FM+ capability, 5V tolerant GPIO supporting I2C1_SDA, TIM17_CH1, and SPI2_NSS.
47 VSS power_in Digital ground reference pin (0 V).
48 VDD power_in Digital power supply input; 2.4 to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32F030C8T6TR
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f030c8t6tr-etched.step / stm32f030c8t6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f030c8t6tr.step / stm32f030c8t6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (96 pp, sha256 05ccdcefbb0ff12e, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF