Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

STM32C031C6T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32C031C6T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC13 bidirectional 5V-tolerant (FT) general-purpose I/O; alternate functions TIM1_ETR, TIM1_BKIN; additional functions RTC timestamp input (RTC_TS), RTC calibration/alarm output (RTC_OUT1) and wakeup pin WKUP2.
2 PC14-OSCX_IN (PC14) bidirectional 5V-tolerant (FT) I/O, default function is LSE 32.768 kHz oscillator input (OSCX_IN); alternate functions USART1_TX, TIM1_ETR, TIM1_BKIN2, IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA, EVENTOUT.
3 PC15-OSCX_OUT (PC15) bidirectional 5V-tolerant (FT) I/O, default function is LSE 32.768 kHz oscillator output (OSCX_OUT); alternate functions OSC32_EN, OSC_EN, TIM1_ETR, TIM3_CH3.
4 PF3 passive Pin listed as type S with no alternate or additional function in the pin assignment table; function/behavior is not further described in this datasheet section (see review note).
5 VREF+ power_in Positive analog reference voltage input for the ADC; must be between 2.0 V and VDDA, can be grounded when the analog peripherals using it are inactive.
6 VDD/VDDA power_in Main digital and analog power supply input, 2.0 V (1.96 V min functional) to 3.6 V, supplies the internal regulator, system analog blocks and the ADC.
7 VSS/VSSA power_in Digital and analog ground reference pin.
8 PF0-OSC_IN (PF0) bidirectional 5V-tolerant (FT) I/O, default function is HSE crystal/external clock input (OSC_IN, 4-48 MHz); alternate function TIM14_CH1.
9 PF1-OSC_OUT (PF1) bidirectional 5V-tolerant (FT) I/O, default function is HSE crystal oscillator output (OSC_OUT); alternate function OSC_EN.
10 PF2-NRST bidirectional 5V-tolerant (FT) I/O shared with the bidirectional reset pin NRST, which has an embedded weak pull-up resistor; alternate functions MCO, TIM1_CH4.
11 PA0 bidirectional 5V-tolerant (FT) I/O; alternate functions USART2_CTS, TIM16_CH1, USART1_TX, TIM1_CH1; additional functions ADC_IN0 and wakeup pin WKUP1.
12 PA1 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM17_CH1, USART1_RX, TIM1_CH2, I2C1_SMBA, EVENTOUT; additional function ADC_IN1.
13 PA2 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_MOSI/I2S1_SD, USART2_TX, TIM16_CH1N, TIM3_ETR, TIM1_CH3; additional functions ADC_IN2, wakeup pin WKUP4 and LSCO clock output.
14 PA3 bidirectional 5V-tolerant (FT) I/O; alternate functions USART2_RX, TIM1_CH1N, TIM1_CH4, EVENTOUT; additional function ADC_IN3.
15 PA4 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_NSS/I2S1_WS, USART2_TX, TIM1_CH2N, TIM14_CH1, TIM17_CH1N, EVENTOUT; additional functions ADC_IN4 and RTC_OUT2.
16 PA5 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_SCK/I2S1_CK, USART2_RX, TIM1_CH3N, TIM1_CH1, EVENTOUT; additional function ADC_IN5.
17 PA6 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1; additional function ADC_IN6.
18 PA7 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1; additional function ADC_IN7.
19 PB0 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N; additional function ADC_IN17.
20 PB1 bidirectional 5V-tolerant (FT) I/O; alternate functions TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH2N, EVENTOUT; additional function ADC_IN18.
21 PB2 bidirectional 5V-tolerant (FT) I/O; alternate functions USART1_RX, MCO2, EVENTOUT; additional function ADC_IN19.
22 PB10 bidirectional 5V-tolerant (FT) I/O with no listed alternate function; additional function ADC_IN20.
23 PB11 bidirectional 5V-tolerant (FT) I/O with no listed alternate function; additional function ADC_IN21.
24 PB12 bidirectional 5V-tolerant (FT) I/O; alternate functions TIM1_BKIN2, TIM1_BKIN, EVENTOUT; additional function ADC_IN22.
25 PB13 bidirectional 5V-tolerant (FT) I/O; alternate functions TIM1_CH1N, EVENTOUT; no additional function listed.
26 PB14 bidirectional 5V-tolerant (FT) I/O; alternate functions TIM1_CH2N, EVENTOUT; no additional function listed.
27 PB15 bidirectional 5V-tolerant (FT) I/O; alternate functions TIM1_CH3N, EVENTOUT; additional function RTC_REFIN.
28 PA8 bidirectional 5V-tolerant (FT) I/O; alternate functions MCO, USART2_TX, TIM1_CH1, EVENTOUT, SPI1_NSS/I2S1_WS, TIM1_CH2N, TIM1_CH3N, TIM3_CH3, TIM3_CH4, TIM14_CH1, USART1_RX, MCO2; additional function ADC_IN8.
29 PA9 bidirectional 5V-tolerant (FT) I/O; alternate functions MCO, USART1_TX, TIM1_CH2, TIM3_ETR, I2C1_SCL, EVENTOUT; can be remapped to appear on pin 33 in place of PA11 via SYSCFG_CFGR1.
30 PC6 bidirectional 5V-tolerant (FT) I/O; alternate function TIM3_CH1; no additional function listed.
31 PC7 bidirectional 5V-tolerant (FT) I/O; alternate function TIM3_CH2; no additional function listed.
32 PA10 bidirectional 5V-tolerant (FT) I/O; alternate functions USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA, EVENTOUT; can be remapped to appear on pin 34 in place of PA12 via SYSCFG_CFGR1.
33 PA11 [PA9] bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2; additional function ADC_IN11; PA9 function can be remapped onto this pin via SYSCFG_CFGR1.
34 PA12 [PA10] bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN; additional function ADC_IN12; PA10 function can be remapped onto this pin via SYSCFG_CFGR1.
35 PA13 bidirectional 5V-tolerant (FT) I/O; default alternate function SWDIO (SWD data), also IR_OUT, TIM3_ETR, USART2_RX, EVENTOUT; additional function ADC_IN13; internal pull-up active on this pin at reset.
36 PA14-BOOT0 bidirectional 5V-tolerant (FT) I/O; default alternate function SWCLK (SWD clock), also USART2_TX, EVENTOUT, SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK; additional functions ADC_IN14 and BOOT0 boot-selector; internal pull-down active on this pin at reset.
37 PA15 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK, EVENTOUT; no additional function listed.
38 PD0 bidirectional 5V-tolerant (FT) I/O; alternate functions EVENTOUT, TIM16_CH1; no additional function listed.
39 PD1 bidirectional 5V-tolerant (FT) I/O; alternate functions EVENTOUT, TIM17_CH1; no additional function listed.
40 PD2 bidirectional 5V-tolerant (FT) I/O; alternate functions TIM3_ETR, TIM1_CH1N; no additional function listed.
41 PD3 bidirectional 5V-tolerant (FT) I/O; alternate functions USART2_CTS, TIM1_CH2N; no additional function listed.
42 PB3 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH2, USART1_RTS_DE_CK, EVENTOUT; no additional function listed.
43 PB4 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT; no additional function listed.
44 PB5 bidirectional 5V-tolerant (FT) I/O; alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, TIM3_CH3, I2C1_SMBA; additional function wakeup pin WKUP6.
45 PB6 bidirectional 5V-tolerant (FT) I/O; alternate functions USART1_TX, TIM1_CH3, TIM16_CH1N, TIM3_CH3, USART1_RTS_DE_CK, USART1_CTS, I2C1_SCL, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI1_MISO/I2S1_MCK, SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH1, TIM3_CH2, TIM16_BKIN, TIM17_BKIN; additional function wakeup pin WKUP3.
46 PB7 bidirectional 5V-tolerant (FT) I/O; alternate functions USART1_RX, TIM1_CH4, TIM17_CH1N, TIM3_CH4, I2C1_SDA, EVENTOUT, USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL; no additional function listed on this package.
47 PB8 bidirectional 5V-tolerant (FT) I/O; alternate functions USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL, EVENTOUT; no additional function listed.
48 PB9 bidirectional 5V-tolerant (FT) I/O; alternate functions IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA, EVENTOUT; no additional function listed.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32C031C6T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32c031c6t6-etched.step / stm32c031c6t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32c031c6t6.step / stm32c031c6t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (108 pp, sha256 c0de50247b672919, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF