component
STISO620TR
Public Made by Adomby adom
STMicroelectronics Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# STISO620TR++**STMicroelectronics** · Digital Isolators · SOIC-8++STISO620TR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD1 | power_in | Supply voltage for transmit side, recommended operating range 3 V to 5.5 V with 2.75 V on-threshold |+| 2 | TXA | input | Transmit channel A logic input with Schmitt trigger thresholds of 0.8 V (low) and 2 V (high), supporting data rates up to 100 Mbps |+| 3 | TXB | input | Transmit channel B logic input with Schmitt trigger thresholds of 0.8 V (low) and 2 V (high), supporting data rates up to 100 Mbps |+| 4 | GND1 | power_in | Ground reference potential for transmit side |+| 5 | GND2 | power_in | Ground reference potential for receive side |+| 6 | RXB | output | Receive channel B logic output with 40-60 Ω output impedance, enters tri-state when VDD2 falls below UVLO threshold |+| 7 | RXA | output | Receive channel A logic output with 40-60 Ω output impedance, enters tri-state when VDD2 falls below UVLO threshold |+| 8 | VDD2 | power_in | Supply voltage for receive side, recommended operating range 3 V to 5.5 V with 2.75 V on-threshold |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-8 |+| Category | Signal Isolation Devices |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `STISO620TR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `stiso620tr-etched.step` / `stiso620tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stiso620tr.step` / `stiso620tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603223525230858240) (20 pp, sha256 `c7836da97d08f2d5`, retrieved 2026-10-06, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stiso620tr-datasheet.pdf)
page.jsonadded+158@@ -0,0 +1,158 @@+{+ "slug": "stiso620tr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "signal isolation devices",+ "stiso620tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stiso620tr.kicad_sym",+ "stiso620tr.kicad_mod",+ "stiso620tr.glb",+ "stiso620tr.step",+ "stiso620tr.lbr",+ "docs/hero.png",+ "docs/stiso620tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stiso620tr-hero.glb",+ "stiso620tr-hero.overlay.json"+ ],+ "component": {+ "mpn": "STISO620TR",+ "manufacturer": "STMicroelectronics",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Signal Isolation Devices",+ "subcategory": "Digital Isolators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603223525230858240",+ "parts": {+ "symbol": "stiso620tr.kicad_sym",+ "footprint": "stiso620tr.kicad_mod",+ "model_3d": "stiso620tr-hero.glb",+ "model_3d_plain": "stiso620tr.glb",+ "model_3d_step": "stiso620tr-etched.step",+ "model_3d_step_plain": "stiso620tr.step",+ "lbr": "stiso620tr.lbr"+ },+ "distributor_links": {+ "lcsc": 7089838,+ "digikey": "497-STISO620TR-ND",+ "mouser": "511-STISO620TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T03:08:25Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-STISO620TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-STISO620TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD1",+ "type": "power_in",+ "description": "Supply voltage for transmit side, recommended operating range 3 V to 5.5 V with 2.75 V on-threshold"+ },+ {+ "number": "2",+ "name": "TXA",+ "type": "input",+ "description": "Transmit channel A logic input with Schmitt trigger thresholds of 0.8 V (low) and 2 V (high), supporting data rates up to 100 Mbps"+ },+ {+ "number": "3",+ "name": "TXB",+ "type": "input",+ "description": "Transmit channel B logic input with Schmitt trigger thresholds of 0.8 V (low) and 2 V (high), supporting data rates up to 100 Mbps"+ },+ {+ "number": "4",+ "name": "GND1",+ "type": "power_in",+ "description": "Ground reference potential for transmit side"+ },+ {+ "number": "5",+ "name": "GND2",+ "type": "power_in",+ "description": "Ground reference potential for receive side"+ },+ {+ "number": "6",+ "name": "RXB",+ "type": "output",+ "description": "Receive channel B logic output with 40-60 Ω output impedance, enters tri-state when VDD2 falls below UVLO threshold"+ },+ {+ "number": "7",+ "name": "RXA",+ "type": "output",+ "description": "Receive channel A logic output with 40-60 Ω output impedance, enters tri-state when VDD2 falls below UVLO threshold"+ },+ {+ "number": "8",+ "name": "VDD2",+ "type": "power_in",+ "description": "Supply voltage for receive side, recommended operating range 3 V to 5.5 V with 2.75 V on-threshold"+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 20,+ "cost_usd": 0.0822,+ "at": "2026-10-06T03:08:11"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603223525230858240",+ "pages": 20,+ "sha256": "c7836da97d08f2d5",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}