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STGAP2SM

Public Made by Adom

by adom

STMicroelectronics Isolators - Gate Drivers, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)stgap2smfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
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STGAP2SM

STMicroelectronics · Isolators - Gate Drivers · SO-8

STGAP2SM from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Driver logic supply voltage, recommended 3.1 V to 5.5 V vs GND with 6.5 V absolute maximum.
2 IN+ input Driver logic input, active high, accepting 3.3 V and 5 V TTL/CMOS levels with hysteresis and 0 V to 5.5 V recommended range vs GND.
3 IN- input Driver logic input, active low, accepting 3.3 V and 5 V TTL/CMOS levels with hysteresis and 0 V to 5.5 V recommended range vs GND.
4 GND power_in Driver logic ground, the reference for VDD and the logic input pins.
5 VH power_in Gate driving positive supply, recommended 9.6 V to 26 V vs GNDISO with 28 V absolute maximum, and undervoltage lockout with VHoff of 7.9 V to 8.9 V.
6 GON output Source output of the separated-output option, with 4 A typical (3 A to 5 A over temperature) source short-circuit current and high level within 0.125 V typical of VH at 100 mA.
7 GOFF output Sink output of the separated-output option, with 4 A typical (3 A to 5 A over temperature) sink short-circuit current and an active clamp to SafeClp of 2.3 V typical (2.0 V to 2.3 V) at 0.2 A when VH is floating.
8 GNDISO power_in Isolated ground for the gate driving section, the reference for VH and the gate outputs, which must not exceed VH + 0.3 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: STGAP2SM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: stgap2sm-etched.step / stgap2sm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stgap2sm.step / stgap2sm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (23 pp, sha256 c88ffafc488db499, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF