Same idea as Rev 1, rebuilt around the one thing Rev 1 got wrong: legibility. Every letter is now a 5 x 7 bitmap, so the N has a real diagonal. Along the way every part got a real manufacturer part number from Adom's stocked reels, and the current came down under the USB-C default limit.

| Status | Designed and verified in software. Not fabricated yet. |
| Date | 2026-09-23 |
| Board | 136.4 x 44.4 mm, 2 layer FR4, Adom molecule 136x44 absolute, medium machine pins |
| Letters | 94 white 0603 LEDs, 5 x 7 pixel font, 3 mm pitch, 3 mm letter gap, 105 mm of text |
| Power | USB-C on the east edge, 5 V, about 400 mA with every LED lit |
| Result | 0 DRC errors, 98 of 98 nets connected, USB-C geometry on the guide's reference numbers |
| Parts | every line an Adom Basic Part with an MPN |
Orbit, zoom, hover any part for its refdes and net, x-ray the copper with the Nets panel, or run the guided walkthrough. The PCB, Schematic and Parts tabs across the top are live too. Open full screen.
Rev 1 showed that a 3 x 5 font cannot draw an N. Does a 5 x 7 font fix it, and can the same AI pipeline still route a board with 60% more LEDs packed at a tighter pitch?
The request, verbatim, from John Lauer on 2026-09-23 after seeing Rev 1:
can you make teh N for steven look more like an N? meaning the diagonal line in an N doesn't come through very well in that board you made
and on keeping Rev 1 rather than overwriting it:
do a new one and keep the old one so steven can see the progression of ideas of his board cuz they're all about running experiments and seeing evidence of each experiment
Font. A 5 x 7 bitmap per letter, taken from Adom's evan-led-nameplate, which had
already found that three columns cannot hold an N. The N diagonal walks column 1 to 2 to 3.
S, T, E and V were drawn the same way.

Parts. White LED IN-S63BT5UW (Inolux), 470 ohm CR0402-FX-4700GLF per LED, 4.7 kohm
CR0402-FX-4701GLF CC pulldowns, 10 uF CL21A106KOQNNNG bulk and 100 nF 0402B104J160CT
high-frequency decoupling, USB-C TYPE-C-31-M-12 (LCSC C165948). All are stocked on Adom's
pick-and-place reels.
Current budget. 94 LEDs at 330 ohm would draw about 560 mA, over the 500 mA a USB-C source gives without negotiation. At 470 ohm each LED runs about 4.3 mA ((5 V - 3.0 V) / 470), so the board draws about 400 mA.
Board size. The code derives the board from the text: BOARD_W = ceil((text + 30) / 2) * 2,
so 105 mm of text gives a 136 mm board with 20 mm reserved for the USB-C zone. Changing the
name is a one-line edit (TEXT).
USB-C placement. The guide's W/2 - 4 assumes a nominal-size molecule. This board is
absolute sized, which puts the real edge 1 mm further out (W/2 + 0.2 mm wing). The first
build at W/2 - 4 measured a 3.29 mm overhang and only 0.83 mm of board around the anchor
hole, so the connector moved to W/2 - 5.
Schematic. Every symbol has explicit coordinates (LED and resistor pairs on a 10-column
grid) so the schematic is readable. The USB-C wrapper was extended only to forward schX and
schY, which the adom-usbc guide allows. Its footprint and 3D offsets are untouched.
At 3 mm pitch the resistor lives between two LED rows, which leaves the router very little room.
On tscircuit 0.0.1753 (the Rev 1 toolchain):
| Layout | DRC errors | Nets split |
|---|---|---|
| resistor 1.6 mm below, rotated 180 degrees | 15 | 2 |
| 1.65 mm below, not rotated | 1 (router ran out of iterations, 0 traces) | 98 |
| 1.5 mm below, rotated | 19 | 2 |
| 1.75 mm below, rotated | 12 | 2 |
| 1.65 mm below, rotated | 17 | 2 |
None of these produced a working board, so the toolchain moved to tscircuit 0.0.2375, the version
evan-led-nameplate routed cleanly with. That router connected every net on the first try but
dropped a via inside a USB-C VBUS pad. Moving the four support parts (CC resistors and
decoupling) 1 mm left cleared it. Moving the USB-C for the edge fix then changed the routing
again, and a second sweep of the support-part position found the shipped layout:
| Support parts at | DRC errors | Nets split |
|---|---|---|
USB_X - 9 |
0 | 0 (shipped) |
USB_X - 11 |
0 | 1 |
USB_X - 10, resistor 1.65 mm below |
4 | 0 |
USB_X - 12 |
0 | 0 |
The lesson worth keeping: tscircuit's DRC and adom-tsci lint never flagged a split net. Every
one of the "0 errors, 1 split" rows would have shipped a board with dark LEDs if the only check
had been DRC.
| Check | Value |
|---|---|
| Components | 197: 94 LEDs, 96 resistors, 2 capacitors, 1 USB-C, 4 machine pins |
| Routing | 292 routed traces for 294 declared (the 2 are the merged same-net USB-C tabs), 92 vias |
DRC errors in circuit.json |
0 |
| Connectivity | 98 of 98 nets, each one island |
| USB-C pad gap to edge | 7.00 mm (guide reference 7.35, window 5 to 8) |
| USB-C anchor hole gap to edge | 1.83 mm (guide reference 1.83) |
| USB-C mouth overhang | 2.29 mm (guide reference 2.31) |
| USB-C pads / holes | 12 / 6 |
adom-tsci lint |
4 of 5 pass. The fifth is the four machine-pin symbols stacking in the schematic, a known limit of the molecule library that no board file can fix |

The adom-tsci preview re-bakes the 3D model at a higher texture resolution. With the newer
tscircuit's circuit-json-to-gltf the re-bake dropped the USB-C body (0 vertices), so the
connector showed as a flat white box. The board was fine. The fix was to serve the GLB that
tsci export --format glb produces, which carries the full 46,644-vertex receptacle, at the
cost of a 1024 px board texture instead of 2048.
| Tool | Version | What it did here | Get it |
|---|---|---|---|
| Claude Code, in Adom's Hydrogen desktop | Claude Opus 5.5 | The AI that wrote the board, ran every build and check, and wrote this page | Adom Hydrogen |
| bun | 1.4.0 | JavaScript runtime that runs tscircuit | curl -fsSL https://bun.sh/install | bash |
| tscircuit, @tscircuit/cli | 0.0.2375 / 0.1.2134 | Board description in TSX, autorouter, DRC, gerber and GLB export | bun install --frozen-lockfile (pinned in bun.lock) |
| @tsci/adom-inc.molecule, @tsci/adom-inc.library | 1.1.15 / 1.2.6 | Adom molecule outline and corner machine pins | same, through the .npmrc registry npm.tscircuit.com |
| adom-tsci | 1.4.24 | Live 3D / PCB / schematic preview, lint, gerber export, walkthrough, the viewer embedded on this page |
adom-wiki pkg install adom/adom-tsci |
| adom-usbc guide | ships with adom-tsci | The USB-C wrapper (copied verbatim) and the edge checks | ~/.claude/skills/adom-tsci/guides/adom-usbc.md |
scripts/check-connectivity.py |
this page | Geometric pad-trace-via connectivity per net; catches opens DRC misses | Python 3 standard library |
scripts/sweep.sh |
this page | Parallel layout sweep, reports DRC errors and split nets per variant | bash + bun |
scripts/make-bom.py |
this page | Real BOM and pick-and-place spliced into the gerber zip | Python 3 standard library |
| glb-datauri-textures.mjs, glb-make-zup.mjs | adom-tsci page | Makes the 3D models load in the wiki's sandbox and lie flat | https://wiki.adom.inc/adom/adom-tsci/render/scripts/ |
| pup (Adom Bridge) | The renders on this page, shot in a background browser | adom-bridge pup_open_window |
|
| adom-wiki | Publishing this page | preinstalled on Adom containers |
evan-led-nameplate and wrote one parameterized lib/index.tsx
(name, board size, USB-C position and support parts all derived from TEXT).@tsci registry in .npmrc),
rebuilt: every net connected, one via inside a USB-C pad. Swept the support-part position.adom-tsci lint; fixed the schematic by giving every symbol explicit schX/schY.scripts/sweep.sh).bunx tsci build lib/index.tsx --svgs --pcb-png --3d-png and
bunx tsci export lib/index.tsx --format glb for the 3D model.adom-tsci start; found the preview's re-baked GLB had a 0-vertex USB-C; served the
tscircuit-exported GLB instead and confirmed the console had no placeholder.adom-tsci export --format gerbers, then scripts/make-bom.py.adom-wiki.adom-wiki repo download adom/steven-led-nameplate --extract ./steven
cd steven/rev2/source
bun install --frozen-lockfile # pins tscircuit 0.0.2375, @tscircuit/cli 0.1.2134
bunx tsci build lib/index.tsx --svgs --pcb-png
bunx tsci export lib/index.tsx --format glb --output ../dist/lib/index/3d.glb
python3 scripts/check-connectivity.py # expect: 98 nets checked, 0 split
Expected: 0 *_error entries in dist/lib/index/circuit.json and 292 routed traces. On a newer
tscircuit the router will route differently; rerun the connectivity check before trusting it.
To make one for someone else, change TEXT in lib/index.tsx and add any missing letters to
FONT. The board resizes itself. Rerun the build, the connectivity check and adom-tsci lint,
and sweep PARTS_X and R_OFFSET if a net splits. That is exactly how
Ellaine's board was made.
Live 3D: the Rev 2 viewer, or the 3D Model view at the top of this page.
To fabricate: upload rev2/fab/gerbers.zip to a board house. The zip's
bom.csv and pick_and_place.csv carry real part numbers, replacing the empty stubs tscircuit
writes. Specify 1.6 mm FR4, 2 layers, any mask color.
| File | What it is | License |
|---|---|---|
rev2/source/lib/index.tsx |
The board, as tscircuit TSX, parameterized by TEXT |
MIT |
rev2/source/lib/UsbCReceptacle.tsx |
USB-C wrapper from the adom-usbc guide, plus schematic forwarding | MIT |
rev2/source/scripts/check-connectivity.py |
Geometric net connectivity check | MIT |
rev2/source/package.json, bun.lock, .npmrc |
Exact dependency pins | MIT |
rev2/viewer/circuit.json |
Complete circuit description | CC0 |
rev2/viewer/3d.glb, board.glb |
3D models (Y-up for the viewer, Z-up for the wiki) | CC0 |
rev2/fab/gerbers.zip |
Fabrication files with populated BOM and pick-and-place | CC0 |
rev2/fab/pcb.svg, schematic.svg |
Layout and schematic drawings | CC0 |
| this document | Method, results, negative results | CC BY 4.0 |
| Requested by | John Lauer, Adom Industries |
| Designed by | Claude Opus 5.5 (Anthropic), in Claude Code inside Adom's Hydrogen desktop |
| Toolchain | tscircuit 0.0.2375, @tscircuit/cli 0.1.2134, @tsci/adom-inc.molecule 1.1.15, @tsci/adom-inc.library 1.2.6, adom-tsci 1.4.24, bun 1.4.0 |
| Built on | Rev 1 of this page, and the 5 x 7 font from Adom's evan-led-nameplate |
| Human review | John Lauer, 2026-09-23 |
Contributor roles (CRediT): John Lauer, conceptualization and supervision. Claude (AI), design, software, validation, writing.
The node is funded by the U.S. National Science Foundation PCL Test Bed program (ROR 021nxhr62). Made as a worked example of open publishing for the Astera Institute (ROR 00ydx1s47); Astera did not fund it.