component
STD9N65M2
Public Made by Adomby adom
STMicroelectronics MOSFETs, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTD9N65M2
STMicroelectronics · MOSFETs · DPAK
STD9N65M2 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; the gate-source voltage is limited to ±25 V (absolute maximum rating). |
| 2 | D | passive | Drain terminal, electrically connected to the tab; continuous drain current is 5 A at TC = 25 °C with a minimum drain-source breakdown voltage of 650 V. |
| 3 | S | passive | Source terminal; the source-drain diode is rated for 5 A continuous and 20 A pulsed source-drain current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate-source voltage | VGS | -25 | 25 | V | 2 | ||
| Drain current (continuous) at TC = 25 °C | ID | 5 | A | TC = 25 °C | 2 | ||
| Drain current (continuous) at TC = 100 °C | ID | 3.2 | A | TC = 100 °C | 2 | ||
| Drain current (pulsed) | IDM | 20 | A | 2 | |||
| Total power dissipation at TC = 25 °C | PTOT | 60 | W | TC = 25 °C | 2 | ||
| Peak diode recovery voltage slope | dv/dt(3) | 15 | V/ns | ISD ≤ 5 A, di/dt = 400 A/μs; VDS(peak) < V(BR)DSS, VDD = 400 V | 2 | ||
| MOSFET dv/dt ruggedness | dv/dt(4) | 50 | V/ns | VDS ≤ 520 V | 2 | ||
| Storage temperature range | Tstg | -55 | 150 | °C | 2 | ||
| Operating junction temperature range | TJ | -55 | 150 | °C | 2 | ||
| Avalanche current, repetitive or not repetitive | IAR | 1 | A | pulse width limited by TJ max | 2 | ||
| Single pulse avalanche energy | EAS | 105 | mJ | starting TJ = 25 °C, ID = IAR; VDD = 50 V | 2 | ||
| Thermal resistance junction-case | Rthj-case | 2.08 | °C/W | DPAK | 2 | ||
| Thermal resistance junction-pcb | Rthj-pcb | 50 | °C/W | 2 | |||
| Thermal resistance junction-ambient | Rthj-amb | 62.5 | °C/W | When mounted on 1 inch2 FR-4, 2 Oz copper board | 2 | ||
| Drain-source breakdown voltage | V(BR)DSS | 650 | V | VGS = 0 V, ID = 1 mA | 3 | ||
| Zero gate voltage drain current | IDSS | 1 | µA | VGS = 0 V, VDS = 650 V | 3 | ||
| Zero gate voltage drain current | IDSS | 100 | µA | VGS = 0 V, VDS = 650 V, TC = 125 °C | 3 | ||
| Gate-body leakage current | IGSS | -10 | 10 | µA | VDS = 0 V, VGS = ±25 V | 3 | |
| Gate threshold voltage | VGS(th) | 2 | 3 | 4 | V | VDS = VGS, ID = 250 µA | 3 |
| Static drain-source on-resistance | RDS(on) | 0.79 | 0.9 | Ω | VGS = 10 V, ID = 2.5 A | 3 | |
| Source-drain current | ISD | 5 | A | 4 | |||
| Source-drain current (pulsed) | ISDM | 20 | A | 4 | |||
| Forward on voltage | VSD | 1.6 | V | ISD = 5 A, VGS = 0 V | 4 |
CAD (KiCad official)
- Symbol:
STD9N65M2 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files:
std9n65m2-etched.step/std9n65m2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);std9n65m2.step/std9n65m2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (28 pp, sha256
a66a6196d685cbf0, retrieved 2026-10-09, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).